Patents Assigned to KYOCERA CIRCUIT SOLUTIONS, INC.
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Patent number: 10813215Abstract: A multi-layer substrate with metal layers as a moisture diffusion barrier for reduced electrical performance degradation over time after moisture exposure and methods of design and manufacture. The method includes determining a diffusion rate of an insulator material provided between an upper metal layer and an underlying signal line. The method further includes calculating a diffusion distance between a plane opening of the upper metal layer and the underlying signal line using the diffusion rate of the insulator material.Type: GrantFiled: March 14, 2016Date of Patent: October 20, 2020Assignees: INTERNATIONAL BUSINESS MACHINES CORPORATION, KYOCERA CIRCUIT SOLUTIONS INC.Inventors: Jean Audet, Edmund D. Blackshear, Masahiro Fukui, Charles L. Reynolds, Kenji Terada, Tomoyuki Yamada
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Patent number: 10806030Abstract: A multi-layer substrate with metal layers as a moisture diffusion barrier for reduced electrical performance degradation over time after moisture exposure and methods of design and manufacture. The method includes determining a diffusion rate of an insulator material provided between an upper metal layer and an underlying signal line. The method further includes calculating a diffusion distance between a plane opening of the upper metal layer and the underlying signal line using the diffusion rate of the insulator material.Type: GrantFiled: January 15, 2015Date of Patent: October 13, 2020Assignees: INTERNATIONAL BUSINESS MACHINES CORPORATION, KYOCERA CIRCUIT SOLUTIONS INC.Inventors: Jean Audet, Edmund D. Blackshear, Masahiro Fukui, Charles L. Reynolds, Kenji Terada, Tomoyuki Yamada
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Publication number: 20160284636Abstract: A wiring board includes an insulating substrate having a plurality of laminated insulating layers and a mounting part in one surface of the insulating substrate, a large number of semiconductor element connection pads, a large number of external connection pads, and a solid pattern extending from a region corresponding to the mounting part to the peripheral portion of the insulating substrate, and including a straight line shaped current path without intervention of gas vent openings.Type: ApplicationFiled: March 23, 2016Publication date: September 29, 2016Applicant: KYOCERA Circuit Solutions, Inc.Inventors: Hiroki MATSUWAKA, Hisayoshi WADA
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Publication number: 20160245997Abstract: The optical circuit board includes a wiring board including a plurality of laminated insulating layers, and a wiring conductor disposed between the insulating layers; an optical waveguide including a lower clad layer, an upper clad layer and a core sandwiched between the lower clad layer and the upper clad layer, disposed on an upper surface of the wiring board, and extending in one direction; a reflection surface including an inner surface of a groove formed in a part of the core of the optical waveguide, and being perpendicular to an extending direction in a plane view and having a predetermined angle with respect to the upper surface in a cross sectional view; and a metal layer disposed on an upper surface of the insulating layer on the upper side than the wiring conductor of the wiring board, and set as a bottom surface of the groove.Type: ApplicationFiled: February 19, 2016Publication date: August 25, 2016Applicant: KYOCERA Circuit Solutions, Inc.Inventors: Kenji TERADA, Akifumi SAGARA
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Publication number: 20160247753Abstract: A method of manufacturing a cavity substrate of the present invention includes respectively laminating second and third substrates on upper and lower surfaces of a first substrate having an opening and having an external dimension larger than an external dimension of each of the second and third substrates to ensure that an end portion of the first substrate protrudes a first length from the second and third substrates, and cutting the end portion of the first substrate protruding from each of the second and third substrates to a second length smaller than the first length.Type: ApplicationFiled: February 19, 2016Publication date: August 25, 2016Applicant: KYOCERA Circuit Solutions, Inc.Inventor: Keizou SAKURAI
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Publication number: 20160224811Abstract: A wiring board of the present invention includes an insulating board including a core insulating plate and an insulating layer laminated on at least one surface of the insulating plate. A plurality of code information reading pads formed of a conductor layer are disposed on a surface of the insulating layer formed uppermost. A common conductor is disposed oppositely to the code information reading pads by interposing therebetween the insulating layer formed uppermost. At least one of the code information reading pads and the common conductor are electrically connected to each other through a via conductor penetrating through the insulating layer formed uppermost.Type: ApplicationFiled: February 1, 2016Publication date: August 4, 2016Applicant: KYOCERA Circuit Solutions, Inc.Inventor: Takafumi KAWASHIMA
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Publication number: 20160227643Abstract: A printed wiring board includes a digital circuit, an analog circuit, and a power supply path that is disposed on an insulating layer between the digital circuit and the analog circuit. EBG unit cells are disposed on a boundary between the digital circuit and the analog circuit one dimensionally or two dimensionally and periodically, and an interdigital electrode is formed. A magnetic body film is formed over the printed wiring board, partially formed on the EBG unit cells, or formed avoiding the EBG unit cells.Type: ApplicationFiled: January 29, 2016Publication date: August 4, 2016Applicants: National University Corporation Okayama University, KYOCERA Circuit Solutions, Inc.Inventors: Yoshitaka TOYOTA, Kengo IOKIBE, Yuki YAMASHITA, Masanori NAITO, Toshiyuki KANEKO, Kiyohiko KAIYA, Toshihisa UEHARA, Koichi KONDO
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Publication number: 20160219690Abstract: A wiring board of the present invention includes a core substrate, insulating layers laminated on upper and lower surfaces of the core substrate, and a conductor layer deposited on the upper and lower surfaces of the core substrate and a surface of each of the insulating layers, in such a manner as to make a difference in area occupation ratio between the upper and lower surfaces of the core substrate. A thickness of a conductor that has a large area occupation ratio is smaller than a thickness of a conductor that has a small area occupation ratio between the conductor layers deposited on the upper and lower surfaces of the core substrate, and between the conductor layers deposited on the surface of each of the insulating layers laminated at an identical level on upper and lower surface sides with the core substrate as a center.Type: ApplicationFiled: January 20, 2016Publication date: July 28, 2016Applicant: KYOCERA Circuit Solutions, Inc.Inventor: Yasuki ITOH
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Publication number: 20160219698Abstract: A wiring board of the present invention includes a build-up layer having a plurality of insulating layers laminated one upon another, a groove formed on a major surface of each of the insulating layers, and a wiring conductor formed in the groove. A surface of the wiring conductor lies lower than the major surface of each of the insulating layers which is formed in the wiring conductor in the groove.Type: ApplicationFiled: January 20, 2016Publication date: July 28, 2016Applicant: KYOCERA Circuit Solutions, Inc.Inventor: Masaharu YASUDA
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Publication number: 20160210398Abstract: A multi-layer substrate with metal layers as a moisture diffusion barrier for reduced electrical performance degradation over time after moisture exposure and methods of design and manufacture. The method includes determining a diffusion rate of an insulator material provided between an upper metal layer and an underlying signal line. The method further includes calculating a diffusion distance between a plane opening of the upper metal layer and the underlying signal line using the diffusion rate of the insulator material.Type: ApplicationFiled: March 14, 2016Publication date: July 21, 2016Applicant: Kyocera Circuit Solutions Inc.Inventors: Jean AUDET, Edmund D. BLACKSHEAR, Masahiro FUKUI, Charles L. REYNOLDS, Kenji TERADA, Tomoyuki YAMADA
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Publication number: 20160211481Abstract: A multi-layer substrate with metal layers as a moisture diffusion barrier for reduced electrical performance degradation over time after moisture exposure and methods of design and manufacture. The method includes determining a diffusion rate of an insulator material provided between an upper metal layer and an underlying signal line. The method further includes calculating a diffusion distance between a plane opening of the upper metal layer and the underlying signal line using the diffusion rate of the insulator material.Type: ApplicationFiled: January 15, 2015Publication date: July 21, 2016Applicant: KYOCERA CIRCUIT SOLUTIONS INC.Inventors: Jean AUDET, Edmund D. BLACKSHEAR, Masahiro FUKUI, Charles L. REYNOLDS, Kenji TERADA, Tomoyuki YAMADA
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Publication number: 20160211229Abstract: A multi-layer substrate with metal layers as a moisture diffusion barrier for reduced electrical performance degradation over time after moisture exposure and methods of design and manufacture. The method includes determining a diffusion rate of an insulator material provided between an upper metal layer and an underlying signal line. The method further includes calculating a diffusion distance between a plane opening of the upper metal layer and the underlying signal line using the diffusion rate of the insulator material.Type: ApplicationFiled: March 14, 2016Publication date: July 21, 2016Applicant: Kyocera Circuit Solutions Inc.Inventors: Jean AUDET, Edmund D. BLACKSHEAR, Masahiro FUKUI, Charles L. REYNOLDS, Kenji TERADA, Tomoyuki YAMADA
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Publication number: 20160189979Abstract: The method for producing a wiring board according to the present invention includes the steps of: preparing an insulating board including a cavity forming area and a wiring forming area; forming a first wiring conductor in the wiring forming area; forming a cavity in the cavity forming area and an opening in a part of the wiring forming area; inserting an electronic component including an external electrode into the cavity; forming insulating layers on upper and lower surfaces of the insulating board, the insulating layers filled into a gap in the cavity and into the opening; forming a through-hole penetrating through the opening from the insulating layer on an upper surface side to the insulating layer on a lower surface side; and forming a second wiring conductor on a surface of the insulating layer and in the through-hole.Type: ApplicationFiled: December 9, 2015Publication date: June 30, 2016Applicant: KYOCERA Circuit Solutions, Inc.Inventor: Yoshinori NAKATOMI
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Publication number: 20160192475Abstract: The wiring board in the present invention includes: an insulating board; external connection pads for a differential signal and external connection pads for grounding or a power supply formed on a lower surface of the insulating board; and a through-conductor formed in the insulating board. Each of the external connection pads is formed in a two-dimensional arrangement, a diameter and an arrangement pitch of the external connection pad for a differential signal are smaller than a diameter and an arrangement pitch of the external connection pad for grounding or a power supply, and an arrangement pitch of the through-conductor connected to the external connection pad for a differential signal is less than or equal to an arrangement pitch of the external connection pad for a differential signal.Type: ApplicationFiled: December 16, 2015Publication date: June 30, 2016Applicant: KYOCERA Circuit Solutions, Inc.Inventor: Yoshihiro NAKAGAWA
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Publication number: 20160157338Abstract: A printed wiring board includes a digital circuit, an analog circuit, and a power supply path that is disposed on an insulating layer between the digital circuit and the analog circuit. A plurality of open stub EBG structures are disposed at an end of a bridge section in a power supply plane. The open stub EBG structure is an open stub state whose one end is connected to the power supply path and other end is in an open state.Type: ApplicationFiled: November 25, 2015Publication date: June 2, 2016Applicants: National University Corporation Okayama University, KYOCERA Circuit Solutions, Inc.Inventors: Yoshitaka TOYOTA, Kengo IOKIBE, Yuki YAMASHITA, Toshiyuki KANEKO, Masanori NAITO, Kiyohiko KAIYA, Toshihisa UEHARA, Koichi KONDO
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Publication number: 20160128183Abstract: The wiring board of the present invention includes an insulating layer, a strip-shaped wiring conductor for signals disposed on a main surface of the insulating layer, and a plain conductor for grounding or power disposed on the main surface of the insulating layer; and the thickness of the plane conductor is larger than the thickness of the strip-shaped wiring conductor. In the wiring board of the present invention, the thickness of the plane conductor is preferably 1 to 15 ?m larger than the thickness of the strip-shaped wiring conductor. The strip-shaped wiring conductor has a thickness of preferably 3 to 10 ?m, and the plane conductor has a thickness of preferably 5 to 15 ?m.Type: ApplicationFiled: October 21, 2015Publication date: May 5, 2016Applicant: KYOCERA Circuit Solutions, Inc.Inventor: Keisaku MATSUMOTO
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Patent number: 9326389Abstract: Provided is a wiring board including: an insulating board having a mounting portion configured such that a semiconductor element is mounted on an upper surface thereof; a semiconductor element connection pad formed on the mounting portion; a conductor pillar formed on the semiconductor element connection pad; and a solder resist layer adhered on the insulating board. The solder resist layer has a first region with a thickness such that the semiconductor element connection pad and a lower end portion of the conductor pillar are embedded while an upper end portion of the conductor pillar protrudes, and a second region having a thickness larger than that of the first region and surrounding the first region.Type: GrantFiled: October 20, 2014Date of Patent: April 26, 2016Assignee: KYOCERA CIRCUIT SOLUTIONS, INC.Inventor: Mitsuzo Yokoyama
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Publication number: 20160095218Abstract: A composite wiring board includes a first wiring board having an opening for housing an electronic component, and including a plurality of first connection pads on an upper surface and a plurality of second connection pads on a lower surface, and a second wiring board having the electronic component mounted on a lower surface, including a third connection pad provided on the lower surface on an outer peripheral side and bonded to the first connection pad through a solder, and disposed on the first wiring board so as to cover the opening, in which a grounding inner wall conductor layer is deposited on an inner wall of the opening around the electronic component, and a grounding conductor layer is deposited on the lower surface of the second wiring board and connected to the inner wall conductor layer through a solder.Type: ApplicationFiled: September 18, 2015Publication date: March 31, 2016Applicant: KYOCERA Circuit Solutions, Inc.Inventor: Keizou SAKURAI
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Patent number: 9295154Abstract: A wiring board according to the present invention is provided with an insulating board and a connection pad, wherein the connection pad includes a main conductor layer formed of a low resistance material, a thin film resistor layer formed of a high resistance material and having a low soldering wettability, and a covering layer having a high soldering wettability, the main conductor layer, the thin film resistor layer, and the covering layer being sequentially laminated at the surface of the insulating layer in such a manner as to be electrically connected in series to each other, and the thin film resistor layer covers a main surface and a side surface of the main conductor layer, and further, a side surface of the thin film resistor layer is exposed from the covering layer.Type: GrantFiled: June 27, 2014Date of Patent: March 22, 2016Assignee: KYOCERA CIRCUIT SOLUTIONS, INC.Inventor: Makoto Shiroshita
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Patent number: 9282642Abstract: A wiring board includes a base wiring board 10 and a frame wiring board 20. The base wiring board 10 has an element mounting portion 1a and a frame-shaped frame joining portion 1b on the upper surface and a solder resist layer 4 deposited in a portion between the element mounting portion 1a and the frame joining portion 1b. In the wiring board 10, a first joining pad 6 provided in the frame joining portion 1b and a second joining pad 16 provided in a lower surface of the frame wiring board 20 are joined together via a solder bump H so that a gap may be formed between the frame joining portion 1b and the frame wiring board 20. The base wiring board 10 has a resin injection hole 8 penetrating through the base wiring board 10 in the frame joining portion 1b, and the gap is filled with a sealing resin 18.Type: GrantFiled: September 27, 2013Date of Patent: March 8, 2016Assignee: KYOCERA CIRCUIT SOLUTIONS, INC.Inventor: Keizou Sakurai