Patents Assigned to KYOCERA CIRCUIT SOLUTIONS, INC.
  • Publication number: 20160037644
    Abstract: In the wiring board of the present invention, the land pattern for power supply, connected to the semiconductor element connection pad for power supply through a via conductor and arranged below the segment region, includes a strip-shaped continued portion in the position corresponding to the outer peripheral portion except the outer peripheral side of the mounting portion in the segment region, and the strip-shaped continued portion and the power supply plane arranged therebelow are connected through a via conductor.
    Type: Application
    Filed: July 27, 2015
    Publication date: February 4, 2016
    Applicant: KYOCERA CIRCUIT SOLUTIONS, INC.
    Inventor: Yoshihiro NAKAGAWA
  • Publication number: 20160027724
    Abstract: The wiring board of the present invention includes at least one insulating layer and at least one conductor layer being alternately laminated, a semiconductor element connection pad formed on an upper surface of the insulating layer at an uppermost layer of the insulating layers, a cap connection pattern arranged so as to surround a region where the semiconductor element connection pad is formed, and at least one strip-shaped pattern extending from the semiconductor element connection pad to a region outside an end portion on the region side of the cap connection pattern. The cap connection pattern is formed by a plurality of island-shaped patterns spaced apart from one another, and the strip-shaped pattern is formed between the adjacent island-shaped patterns on the upper surface of the insulating layer at the uppermost layer.
    Type: Application
    Filed: July 23, 2015
    Publication date: January 28, 2016
    Applicant: KYOCERA Circuit Solutions, Inc.
    Inventor: Takayuki ITO
  • Patent number: 9237649
    Abstract: A wiring board 10 includes a lower wiring conductor 1, an upper insulating layer 2 laminated on the lower wiring conductor 1 and having a via hole 5 where a bottom surface is the lower wiring conductor 1, and a via conductor 3 connected to the lower wiring conductor 1 and filling the via hole 5; and the upper insulating layer 2 includes a first resin layer 2a and a second resin layer 2b sequentially laminated on the lower wiring conductor 1, the via hole 5 has an annular groove 5a over a whole circumference of the inner wall in a boundary between both resin layers 2a and 2b, and the via conductor 3 fills the groove 5.
    Type: Grant
    Filed: May 23, 2014
    Date of Patent: January 12, 2016
    Assignee: KYOCERA CIRCUIT SOLUTIONS, INC.
    Inventor: Hidetoshi Yugawa
  • Publication number: 20150382458
    Abstract: The printed wiring board includes: an insulating board including a conductive metal layer formed on both surfaces of an insulating resin; and a conductor layer formed on both surfaces of the insulating board, the conductor layer including a different circuit pattern depending on a region. The circuit patterns formed on both surfaces of the insulating board includes a pattern with line width accuracy of ±10 ?m or less, and a conductor layer thickness in a region having a dense circuit pattern area and a conductor layer thickness in a region having a sparse circuit pattern area have a following relational expression: conductor layer thickness in a dense region/conductor layer thickness in a sparse region=0.7 to 1.0.
    Type: Application
    Filed: June 25, 2015
    Publication date: December 31, 2015
    Applicant: KYOCERA Circuit Solutions, Inc.
    Inventors: Shinri SAEKI, Takashi ISHIOKA, Satoshi NAKAMURA
  • Publication number: 20150351257
    Abstract: A method for producing a wiring board includes the steps of forming an upper insulating layer on a lower insulating layer having a lower wiring conductor on its upper surface; forming a via-hole in the upper insulating layer; depositing a first base metal layer in the via-hole and on an upper surface of the upper insulating layer; forming a first plating resist layer on the first base metal layer; depositing a first electrolytically plated layer to completely fill at least the via-hole; forming a via conductor, and depositing a second base metal layer; forming a second plating resist layer on the second base metal layer; depositing a second electrolytically plated layer; and forming a wiring pattern.
    Type: Application
    Filed: May 27, 2015
    Publication date: December 3, 2015
    Applicant: KYOCERA CIRCUIT SOLUTIONS, INC.
    Inventors: Kohichi OHSUMI, Kazuki OKA
  • Publication number: 20150351227
    Abstract: A wiring board in the present invention includes an insulating layer, a via-hole penetrating from an upper surface to a lower surface of the insulating layer, a wiring formation layer, and a grounding or power supply conductor, in which the wiring formation layer is formed of a plurality of strip-shaped conductors, and an insulating resin portion filled in at least between the strip-shaped conductors, the grounding or power supply conductor is formed to partially face the strip-shaped conductors, and a relative permittivity of the insulating layer is higher than a relative permittivity of the insulating resin portion.
    Type: Application
    Filed: May 28, 2015
    Publication date: December 3, 2015
    Applicant: KYOCERA CIRCUIT SOLUTIONS, INC.
    Inventor: Yoshihiro HASEGAWA
  • Publication number: 20150342049
    Abstract: The multi-piece, wiring board according to the embodiment of the present invention includes a supporting board including a frame portion formed on an upper surface of a bottom plate, the frame portion configured to divide the upper surface of the bottom plate into a plurality of product forming regions, and a wiring board formed on the upper surface of the bottom plate in. each of the product forming regions, the: wiring board including an insulating layer formed so as to expose an upper surface of the frame portion, and a wiring conductor formed on the insulating layer.
    Type: Application
    Filed: May 21, 2015
    Publication date: November 26, 2015
    Applicant: KYOCERA CIRCUIT SOLUTIONS, INC.
    Inventors: Tomoharu TSUCHIDA, Kazuki OKA, Daichi OHMAE
  • Patent number: 9173299
    Abstract: There is provided a collective printed circuit board including a plurality of printed circuit boards each having a mounting unit on which a semiconductor element is mounted at an upper-surface central portion, and a frame having a plurality of through holes having sizes to surround the mounting portion. Upper-surface peripheral edge portions of the printed circuit boards and a through-hole peripheral portion of the frame are bonded to each other such that the mounting units are exposed from the through holes.
    Type: Grant
    Filed: September 29, 2011
    Date of Patent: October 27, 2015
    Assignee: KYOCERA CIRCUIT SOLUTIONS, INC.
    Inventors: Keizou Sakurai, Toshiaki Takagi
  • Publication number: 20150305155
    Abstract: The wiring board according to the embodiment of the present invention includes a core substrate including a through-hole for a grounding and a through-hole for a power supply disposed adjacent to each other, and a build-up layer formed on one surface of the core substrate. The through-hole for a grounding and the through-hole for a power supply have a cross-sectional shape perpendicular to a thickness direction of the core substrate, being any one of a triangular shape, a quadrangular shape and a hexagonal shape, containing a corner portion and a side portion connecting between the corner portions. The side portions of the through-hole for a grounding and the through-hole for a power supply being mutually adjacent are disposed so as to face each other.
    Type: Application
    Filed: April 20, 2015
    Publication date: October 22, 2015
    Applicant: KYOCERA Circuit Solutions, Inc.
    Inventors: Makoto SHIROSHITA, Hisayoshi WADA
  • Patent number: 9157932
    Abstract: A wiring board 3 according to the present invention includes a first resin layer 18a formed of a thermoplastic resin; a conductive layer 16 formed partially on the first resin layer 18a; a through hole P for insertion of a screw formed in a region where the conductive layer 16 is not formed and penetrating through the first resin layer 18a in a thickness direction thereof; and a dummy via hole D formed in a region between the through hole P and the conductive layer 16 and penetrating through the first resin layer 18a.
    Type: Grant
    Filed: December 27, 2012
    Date of Patent: October 13, 2015
    Assignee: KYOCERA Circuit Solutions, Inc.
    Inventors: Takayuki Taguchi, Kenji Terada
  • Publication number: 20150214625
    Abstract: The antenna board of the present invention includes: a dielectric board where a plurality of dielectric layers are laminated, a ground conductor layer, a strip conductor, a first patch conductor, a second patch conductor, a third patch conductor, and a penetration conductor. The first patch conductor, the second patch conductor, and the third patch conductor are electrically independent of each other. The penetration conductor includes at least two penetration conductors aligned adjacent to each other in the extending direction of the strip conductor.
    Type: Application
    Filed: January 23, 2015
    Publication date: July 30, 2015
    Applicant: KYOCERA CIRCUIT SOLUTIONS, INC.
    Inventor: Yoshinobu SAWA
  • Publication number: 20150195922
    Abstract: A method for manufacturing a wiring board includes steps of forming a groove portion in an outer periphery portion of a support metal foil provided metal foil in a shape of frame, in which a metal foil is held on the support metal foil with a release layer interposed between them, mounting the support metal foil provided metal foil on a principal surface of a support board containing an uncured thermosetting resin, pressing and heating them, forming a laminated body on an upper surface of the metal foil located at least in an inside region of the groove portion, cutting out the laminated body and the support board located in the inside region, and separating the laminated body from the support metal foil.
    Type: Application
    Filed: December 15, 2014
    Publication date: July 9, 2015
    Applicant: KYOCERA CIRCUIT SOLUTIONS, INC.
    Inventor: Masaharu YASUDA
  • Publication number: 20150156875
    Abstract: An wiring board of the present invention includes an insulating board, a pair of signal external connection pads, a pair of ground external connection pads, a pair of signal through-hole conductors, a pair of around through-hole conductors, a core ground conductor layer having an opening, a via-hole conductor, a strip-shaped wiring conductor, an upper-side signal connection conductor, and a lower-side signal connection conductor, in which the pair of the ground through-hole conductors is arranged across the opening from each other.
    Type: Application
    Filed: November 25, 2014
    Publication date: June 4, 2015
    Applicant: KYOCERA Circuit Solutions, Inc.
    Inventor: Yoshihiro NAKAGAWA
  • Publication number: 20150144390
    Abstract: A wiring board of the present invention includes an insulating board having a mounting portion on an upper surface to mount a semiconductor element, and semiconductor element connection pads formed on the mounting portion, on which at least three first dummy pads arranged on a center portion of the mounting portion, and at least three second dummy pads arranged on a peripheral portion of the mounting portion, are formed, and a dummy solder bump is formed on each of the first dummy pad and the second dummy pad.
    Type: Application
    Filed: November 25, 2014
    Publication date: May 28, 2015
    Applicant: KYOCERA CIRCUIT SOLUTIONS, INC.
    Inventor: Takayuki NEJIME
  • Publication number: 20150118463
    Abstract: Provided is a wiring board including an insulating board, and a wiring conductor formed on upper and lower surfaces of the insulating board, the wiring conductor including a differential line having two parallel strip-shaped conductors on the insulating board, the insulating board having a glass cloth and an insulating resin portion, in which the glass cloth is a bundle of glass fibers woven in a matrix, contains gaps, and has uneven surfaces, the insulating resin portion has flat surfaces and is formed on upper and lower surfaces of the glass cloth so as to fill the gaps and reduce the unevenness, and a difference in the dielectric constant between the glass cloth and the insulating resin portion is not larger than 0.5.
    Type: Application
    Filed: October 21, 2014
    Publication date: April 30, 2015
    Applicant: KYOCERA Circuit Solutions, Inc.
    Inventor: Satoshi NAKAMURA
  • Publication number: 20150116967
    Abstract: Provided is a wiring board including: an insulating board having a mounting portion configured such that a semiconductor element is mounted on an upper surface thereof; a semiconductor element connection pad formed on the mounting portion; a conductor pillar formed on the semiconductor element connection pad; and a solder resist layer adhered on the insulating board. The solder resist layer has a first region with a thickness such that the semiconductor element connection pad and a lower end portion of the conductor pillar are embedded while an upper end portion of the conductor pillar protrudes, and a second region having a thickness larger than that of the first region and surrounding the first region.
    Type: Application
    Filed: October 20, 2014
    Publication date: April 30, 2015
    Applicant: KYOCERA CIRCUIT SOLUTIONS, INC.
    Inventor: Mitsuzo YOKOYAMA