Patents Assigned to LG Siltron Inc.
  • Patent number: 9777395
    Abstract: An apparatus for growing a silicon single crystal according to embodiments includes a chamber including a crucible accommodating silicon melt; a support shaft rotating and lifting the crucible while supporting the crucible; a main heater part for applying heat to the crucible side, the heater disposed beside the crucible; an upper heat insulation member located over the crucible; and upper heater parts located at a lower end portion of the upper heat insulation member, wherein the upper heater parts have diameters different from each other with respect to a center of the crucible, and include a plurality of ring-shaped heaters which are spaced apart from each other. Due to the individually controllable upper heater parts, a uniform thermal environment can be provided for silicon melt accommodated in a crucible, and localized solidification of the silicon melt can be prevented so that the quality of a silicon single crystal and the ingot pulling speed can be readily controlled.
    Type: Grant
    Filed: June 5, 2014
    Date of Patent: October 3, 2017
    Assignee: LG Siltron, Inc.
    Inventor: Su-In Jeon
  • Patent number: 9721817
    Abstract: Provided are an apparatus for measuring impurities on a wafer and a method of measuring impurities on a wafer. The apparatus includes: a wafer aligning device for aligning a wafer; a loading robot for moving and loading the aligned wafer; a rotation stage for rotating the loaded wafer; a scan robot for holding a natural oxide layer etching solution for the wafer and a metallic impurity recovery solution; and a container for receiving a predetermined etching solution and a recovery solution, wherein the scan robot removes an oxide layer on an edge region of the wafer.
    Type: Grant
    Filed: September 7, 2016
    Date of Patent: August 1, 2017
    Assignee: LG Siltron Inc.
    Inventor: Seung Wook Lee
  • Patent number: 9638376
    Abstract: A susceptor includes a first body including a plurality of first holes and a second body including a plurality of second holes. According to one arrangement, the second body is spaced from the first body to form a gap which allows a gas to pass from the second holes to the first holes. According to this or another arrangement, the first body is removably or rotatably coupled to the second body, or both. Rotation of the second body by a first amount or in a first direction brings at least one first hole in alignment with at least one second hole. And, rotation of the second body by a second amount or in a second direction causes a misalignment to occur between these holes.
    Type: Grant
    Filed: August 24, 2012
    Date of Patent: May 2, 2017
    Assignee: LG Siltron Inc.
    Inventors: Ju Jin Kang, Young Su Ku
  • Patent number: 9592584
    Abstract: An embodiment of the present invention provides a surface plate provided at a wafer double-side grinding device for grinding a wafer. The surface plate includes a plurality of first surface plate grooves formed in a first direction, and a plurality of second surface plate grooves formed in a second direction different from the first direction. The first surface plate grooves and the second surface plate grooves have first and second surface plate groove portions arranged therein, the first and second surface plate groove portions having steps formed in a direction toward the center or an outer periphery of a lower surface plate.
    Type: Grant
    Filed: January 20, 2014
    Date of Patent: March 14, 2017
    Assignee: LG SILTRON INC.
    Inventor: Dae-Hoon Kim
  • Patent number: 9583575
    Abstract: Provided is a semiconductor substrate including a seed layer disposed on a substrate, a buffer layer disposed on the seed layer, a plurality of nitride semiconductor layers disposed on the buffer layer, and at least one stress control layer between the plurality of nitride semiconductor layers. The buffer layer includes a plurality of step regions and at least one heterogeneous region. The plurality of step regions includes the same nitride semiconductor material. The heterogeneous region includes a different nitride semiconductor material from the step regions.
    Type: Grant
    Filed: January 3, 2014
    Date of Patent: February 28, 2017
    Assignee: LG SILTRON INC.
    Inventors: Kye-Jin Lee, Ho-Jun Lee, Young-Jae Choi, Jung-Hyun Eum, Chung-Hyun Lee
  • Patent number: 9500694
    Abstract: Provided is a method for evaluating defects in a wafer. The method for evaluating the wafer defects includes preparing a wafer sample, forming an oxidation layer on the wafer sample, measuring a diffusion distance of a minority carrier using a surface photovoltage (SPV), and determining results of a contamination degree.
    Type: Grant
    Filed: July 3, 2012
    Date of Patent: November 22, 2016
    Assignee: LG Siltron Inc.
    Inventor: Ho-Chan Ham
  • Patent number: 9484273
    Abstract: Provided are an apparatus for measuring impurities on a wafer and a method of measuring impurities on a wafer. The apparatus includes: a wafer aligning device for aligning a wafer; a loading robot for moving and loading the aligned wafer; a rotation stage for rotating the loaded wafer; a scan robot for holding a natural oxide layer etching solution for the wafer and a metallic impurity recovery solution; and a container for receiving a predetermined etching solution and a recovery solution, wherein the scan robot removes an oxide layer on an edge region of the wafer.
    Type: Grant
    Filed: March 21, 2012
    Date of Patent: November 1, 2016
    Assignee: LG SILTRON INC.
    Inventor: Seung Wook Lee
  • Patent number: 9469917
    Abstract: Provided is an ingot growing apparatus, which includes a crucible containing a silicon melt, a pulling device pulling a silicon single crystal ingot grown from the silicon melt, and a dopant supply unit disposed adjacent to the pulling device and for supplying a dopant during growing of the ingot. The neck portion may be doped at a concentration higher than that of the ingot through the dopant supply unit. Therefore, dislocation propagation velocity may be decreased and a propagation length may be shortened.
    Type: Grant
    Filed: August 10, 2012
    Date of Patent: October 18, 2016
    Assignee: LG SILTRON INC.
    Inventors: Jin-Woo Ahn, Bong-Woo Kim, II-Soo Choi, Do-Yeon Kim
  • Patent number: 9425352
    Abstract: Disclosed are a semiconductor device, a light emitting device, and a method of manufacturing the same. The semiconductor device includes a substrate, a plurality of rods aligned on the substrate, a metal layer disposed on the substrate between the rods, and a semiconductor layer disposed on and between the rods. Electrical and optical characteristics of the semiconductor device are improved due to the metal layer.
    Type: Grant
    Filed: July 29, 2009
    Date of Patent: August 23, 2016
    Assignee: LG Siltron Inc.
    Inventors: Yong Jin Kim, Dong Kun Lee, Doo Soo Kim
  • Patent number: 9422637
    Abstract: Provides are a system of controlling a diameter of a single crystal ingot and a single crystal ingot growing apparatus including the same. The system of controlling a diameter of a single crystal ingot includes: a diameter measuring sensor measuring a diameter of a single crystal ingot; a Low-Pass Filter (LPF) removing short period noise from measured data from the diameter measuring sensor; and an Automatic Diameter Control (ADC) sensor controlling the diameter of the single crystal ingot through controlling of a pull speed by using data having the noise removed as current data.
    Type: Grant
    Filed: November 29, 2011
    Date of Patent: August 23, 2016
    Assignee: LG Siltron Inc.
    Inventors: Young-Ho Hong, Se-Geun Ha, Yo-Han Jung
  • Patent number: 9214596
    Abstract: According to the present invention, a method for manufacturing a compound semiconductor comprises: forming a graphene-derived material layer on either a first selected substrate or a first selected compound semiconductor layer; forming a second compound semiconductor layer of at least one layer on at least said graphene-derived material layer, and changing the graphene-derived material layer so as to separate said second compound semiconductor layer of at least one layer.
    Type: Grant
    Filed: October 26, 2011
    Date of Patent: December 15, 2015
    Assignees: LG Siltron Inc., Kumoh National Institute of Technology Industry-Academic Cooperation Foundation
    Inventors: Sung-Jin An, Dong-Gun Lee, Seok-Han Kim
  • Publication number: 20150357418
    Abstract: Provided is a semiconductor substrate including a seed layer disposed on a substrate, a buffer layer disposed on the seed layer, a plurality of nitride semiconductor layers disposed on the buffer layer, and at least one stress control layer between the plurality of nitride semiconductor layers. The buffer layer includes a plurality of step regions and at least one heterogeneous region. The plurality of step regions includes the same nitride semiconductor material. The heterogeneous region includes a different nitride semiconductor material from the step regions.
    Type: Application
    Filed: January 3, 2014
    Publication date: December 10, 2015
    Applicant: LG SILTRON INC.
    Inventors: Kye-Jin LEE, Ho-Jun LEE, Young-Jae CHOI, Jung-Hyun EUM, Chung-Hyun LEE
  • Patent number: 9153450
    Abstract: A method for manufacturing a gallium nitride (GaN) wafer is provided. In the method for manufacturing the GaN wafer according to an embodiment, an etch stop layer is formed on a substrate, and a first GaN layer is formed on the etch stop layer. A portion of the first GaN layer is etched with a silane gas, and a second GaN layer is formed on the etched first GaN layer. A third GaN layer is formed on the second GaN layer.
    Type: Grant
    Filed: December 13, 2012
    Date of Patent: October 6, 2015
    Assignee: LG Siltron Inc.
    Inventors: Yong-Jin Kim, Dong-Kun Lee, Doo-Soo Kim, Ho-Jun Lee, Kye-Jin Lee
  • Publication number: 20150275395
    Abstract: The present disclosure relates to a susceptor for epitaxial growing, which is for manufacturing an epitaxial wafer made by performing a reaction of a wafer and a source gas inside a chamber and growing an epitaxial layer, comprising: a pocket provided with an opening on which the wafer is arranged; a ledge portion for supporting the wafer; and a gas control member positioned on the outer circumferential portion of the upper surface of the susceptor opening, wherein the gas control member comprises a first gas control member which is formed on a predetermined area opposite a crystalline direction of the wafer (110), a second gas control member which is formed on a predetermined area opposite the crystalline direction of the wafer (100), and a third gas control member which is formed between the first gas control member and the second gas control member, wherein the first gas control member, the second gas control member, and the third gas control member are formed so that the size of an area formed along the c
    Type: Application
    Filed: October 16, 2013
    Publication date: October 1, 2015
    Applicant: LG SILTRON INC.
    Inventor: Yu-Jin Kang
  • Patent number: 9085092
    Abstract: Provided is an apparatus for slicing an ingot. The apparatus for slicing the ingot includes a mounting part on which the ingot is mounted, a wire saw disposed under the mounting part, a slurry supply part supplying slurry from an upper side of the wire saw, and a slurry blocking part disposed on the mounting part. The slurry blocking part includes a fixing part coupled to one side of the mounting part and a slurry collection part to which a central portion thereof is coupled to a lower portion of the fixing part.
    Type: Grant
    Filed: February 23, 2012
    Date of Patent: July 21, 2015
    Assignee: LG Siltron Inc.
    Inventor: Dae Hyun Jeon
  • Patent number: 9073171
    Abstract: A polisher, a pressure plate (20) of the polisher, and a method of polishing are disclosed. The pressure plate (20) includes a main body, an air bag (50) mounted to one surface of the main body to adjust a pressure applied from the main body to a polishing object, and a pad (16b) having a ring shape, mounted along a circumference of the one surface of the main body.
    Type: Grant
    Filed: October 21, 2009
    Date of Patent: July 7, 2015
    Assignee: LG SILTRON INC.
    Inventors: Hong Gil Kim, Pan Gi Min
  • Patent number: 8915770
    Abstract: A wafer polishing apparatus is provided. The wafer polishing apparatus includes a first polishing roller disposed on a wafer, the first polishing roller extending in a direction in which the wafer extends and a second polishing roller disposed under the wafer, the second polishing roller extending in the direction in which the wafer extends. The wafer polishing apparatus uses the roller to polish the wafer. Thus, the wafer polishing apparatus may easily polish a wafer having a large area.
    Type: Grant
    Filed: January 11, 2011
    Date of Patent: December 23, 2014
    Assignee: LG Siltron, Inc.
    Inventor: Hyung-Rak Lee
  • Patent number: 8878233
    Abstract: Provided are a compound semiconductor device and a manufacturing method thereof. A substrate and a graphene oxide layer are provided on the substrate. A first compound semiconductor layer is provided on the graphene oxide layer. The first compound semiconductor layer is selectively grown from the substrate exposed by the graphene oxide.
    Type: Grant
    Filed: October 26, 2011
    Date of Patent: November 4, 2014
    Assignee: LG Siltron Inc.
    Inventors: Sung-Jin An, Dong-Gun Lee, Seok-Han Kim
  • Publication number: 20140311675
    Abstract: Provided is a single wafer etching apparatus etching wafers one at a time. According to the present invention, the single wafer etching apparatus may not only discharge gas by vibrating the wafer even in the case that gas, a byproduct of an etching reaction, is generated, but may also prevent the gas from adsorbing on a surface of the wafer. Also, since the single wafer etching apparatus may directly heat each region of the wafer, the single wafer etching apparatus may uniformly maintain a reaction temperature by heating to higher temperatures from a circumferential direction toward the center of the wafer, even in the case that the temperature of an etching solution increases from the center of the wafer toward the circumferential direction due to the fact that etching is performed while the etching solution moves from the center of the wafer toward the circumferential direction.
    Type: Application
    Filed: December 6, 2012
    Publication date: October 23, 2014
    Applicant: LG SILTRON INC.
    Inventors: Jaehwan Yi, Eunsuck Choi
  • Patent number: 8752537
    Abstract: Provided is a single crystal ingot sawing apparatus. The single crystal ingot sawing apparatus includes a wire saw configured to slice an ingot, a roller for configured to drive the wire saw, and a slurry bath for configured to receive slurry supplied onto the wire saw.
    Type: Grant
    Filed: September 29, 2011
    Date of Patent: June 17, 2014
    Assignee: LG Siltron Inc.
    Inventor: Yang-Suh Kim