Abstract: A hardware system for simulating a network physical layer for communication channels. The hardware system includes a plurality of hardware processors configurable to model a physical layer and communication channels. The hardware system includes a first interface coupled to the plurality of hardware processors. The first interface is configured to be coupled to a software simulator comprising a physics model configured to provide model parameters based on modeled communication hardware and a temporal modeling scenario. A second interface is coupled to the plurality of hardware processors. The second interface is configured to be coupled to simulated or real nodes for sending and receiving network data to and from the nodes. The hardware processors are configured to model effects of the physical layer and communication channels on the network data.

Abstract: Vector modulation is illustrated. A method includes receiving an input signal. The input signal is split into a first 0° output and a 90° output. The first 0° output is split into a second 0° output and a first 180° output using a continuous transmission line. The 90° output is split into a third 0° output and a second 180° output using a continuous transmission line. The second 0° output, the first 180° output, the third 0° output, and the second 180° output are modulated. The modulated second 0° output, the first 180° output, the third 0° output, and the second 180° output are recombined to produce an output signal, where all four of the modulated second 0° output, the first 180° output, the third 0° output, and the second 180° output are used to create the output signal.

Abstract: Processing signals is disclosed. A method includes receiving a signal transmission with a nb/mb encoding scheme that maps n-bit words to m-bit symbols. In this scheme, m>n. The method further includes, for a first payload data word in the transmission, determining that the first payload data word corresponds to a valid payload data word, and as a result, assigning a first reliability metric to bits in the first payload data word. The method further includes for a second payload data word in the transmission, determining that the second payload data word does not correspond to a valid payload data word, and as a result, assigning a second reliability metric to bits in the second payload data word. The method further includes performing signal decoding using the assigned reliability metrics.

Abstract: Clock recovery from a serial data signal involves using a serializer/deserializer (SERDES) to produce a clock signal which periodically alternates between high and low output clock values. These high and low clock values are generated by outputting for each clock period a series of N digital bits including a plurality of low-level bits to form each low output clock value and a plurality of high-level bits to form each high output clock value. A sync pulse obtained from a sync word present in each frame of the serial data signal is used to periodically determine a frequency error of the clock signal. The frequency error is used as a basis to change a phase of the adjusted clock signal responsive to the frequency error.

Abstract: A quick release bow clamp comprising a hinged circular body having a vehicle mating flange and a nose cone mating flange configured to selectively attach to an access plate on the bow of an underwater vehicle and a nose cone for the same, respectively. The flanges of the bow clamp and the corresponding flanges of the access plate and nose cone may include an intermittent pattern of open and solid portions for weight reduction. The bow clamp may also include a quick release clamp having an adjustable draw latch configured to attach to a clip on the body of the bow clamp and a safety latch configured to prevent the draw latch from inadvertently disengaging with the clip.

Abstract: A method for mitigating interference in a frequency hopping channel system based on codeword metrics obtained during decoding of codewords. The method includes decoding a plurality of codewords using a particular error control coding method. Each of the plurality of codewords includes portions received from plurality of channels in the frequency hopping channel system. For each decoded codeword, one or more codeword metrics are obtained based on the cost of correcting errors during decoding of the plurality of codewords. Based on the codeword metrics, one or more channel metrics are inferred. Based on the inferred one or more channel metrics, a reliability metric of a particular channel is reduced, or incoming symbols received from the particular channel are ignored during decoding.

Abstract: Systems and methods for synchronize word correlation. The methods comprise: obtaining first values that each indicate a likelihood or probability that a respective timeslot in a symbol timing window of a carrier wave is meant or expected to include energy; multiplying, by the correlator, the first values respectively by correlation coefficients to produce a plurality of products (wherein at least one of the correlation coefficients comprises a negative coefficient value); generating a correlation value by combining the products together; determining whether a synchronization word has been detected with a given amount of likelihood based on the correlation value; and causing symbol timing synchronization at a receiver when a determination is made that the synchronization word has been detected with the given amount of likelihood based on the correlation value.

Abstract: A system for simulating lost data packets. The system includes a first hardware register storing data for fast factors. The fast factors include factors that are time independent with respect to particular data packets. A second hardware register stores slow factors. The slow factors include factors that are time dependent on data packets. Synchronization hardware is coupled to the second hardware register and synchronizes the slow factors with specific data inputs based on dependencies on the data packets. A hardware adder is coupled to the first hardware register and the second hardware register to compute a link budget. The link budget is used in determine probability of loss of data packets. A hardware processor coupled to the hardware adder determines, based on the link budget, if a data packet should be dropped, and when the data packet should be dropped, drops the data packet for simulating a network physical layer.

Abstract: An optical resonator may be provided. The optical resonator may comprise a laser system with an adjustable optical path length. The optical resonator may include a back mirror. The back mirror may include a first back mirror surface and a second back mirror surface. The first back mirror surface and may provide a first optical path length for the optical resonator if the first back mirror surface may be included in the optical path. The second back mirror may provide a second optical path length for the optical resonator if the second back mirror surface is included in the optical path.

Abstract: Systems and methods for evaluating link performance over a multitude of frequencies for Signal-to-Noise Ratio (SNR) optimization and mitigating interference. The methods comprise: communicating, from a first communication device, a first signal over a given channel in a given frequency band; receiving, by the first communication device, spectral power measurements and a Signal-to-Total Power Ratio (STPR) estimate determined based on a second signal including the first signal combined with at least one of noise and one or more interference signals (the STPR estimate accounts for the receiver performance including chip rate processing gain and/or the performance of an interference cancellation circuit used to remove the interference signals from the second signal); and determining, by the first communication device, a predicted Signal-to-Noise Ratio (SNR) condition for a plurality of frequencies within the given frequency band using the STPR estimate and the spectral power measurements.

Abstract: A Radio Frequency (RF) receiver may include a lower-order phase shift keying (PSK) demodulation circuit configured to generate at least one locking parameter when performing a lower-order PSK demodulation of an RF receive signal having an interfering PSK signal component. A higher-order PSK demodulation circuit has a higher order than the lower-order PSK demodulation circuit, and locks to the RF receive signal using the at least one locking parameter from the lower-order PSK demodulation circuit. The higher-order PSK demodulation circuit performs the higher-order PSK demodulation of the RF receive signal based upon locking to the RF receive signal to determine the interfering PSK signal component.

Abstract: A circuit to rectify an alternating current (AC) signal produced by an output coil of a transformer responsive to an input current in an input coil of the transformer comprises: an output node and a return node coupled to an output load; a first rectifier, coupled to a first terminal of the output coil and the return node, to rectify the AC signal to supply a current to the output node when the input current is ON; a second rectifier, coupled to a second terminal of the output coil and the return node, to rectify the AC signal to supply a current to the output node when the input current is OFF; and a voltage clamp to clamp a first voltage transient and a second voltage transient of the AC signal that occur at the first terminal and the second terminal when the input current is switched OFF and ON.

Abstract: A system for remotely monitoring a depletion state of a sacrificial anode. The system includes a light emitter that is configured to emit a light beam and an optical receiver positioned to receive the light beam. A sacrificial anode is located between the light emitter and the optical receiver in a pathway of the light beam, the sacrificial anode being electrically coupled to a metallic structure for the purpose of minimizing corrosion of the metallic structure. Absent a presence of the sacrificial anode in the pathway of the light beam, the optical receiver is configured to receive the light beam, and in response to receiving the light beam, to generate an electrical signal indicative of the depletion state of the sacrificial anode.

Abstract: Compensating for antenna gain losses due to attitude changes of a mobile local node in a network. A method includes at the local node, identifying an attitude change of the local node. As a result of identifying the attitude change of the local node, the method includes increasing a target SNR of forward data directed to one or more remote nodes by a boost value. As a result of identifying the attitude change of the local node, the method includes causing the remote node to adjust at least one of power or rate to compensate for the attitude change for subsequent reverse data sent from the remote node to the local node.

Abstract: A communications system may include mobile communications nodes operating according to a current topology and reconfigurable to a new topology. Each mobile communications node may include a wireless transceiver, and a controller configured to transmit spectral performance data to adjacent nodes and receive spectral performance data from the adjacent nodes. The controller may identify potential topologies for the adjacent nodes based on the spectral performance data, select a subset of potential topologies from among the potential topologies, generate a respective performance score for each potential topology of the subset of potential topologies, and switch to a new topology from among the subset of potential topologies based upon the performance scores.

Abstract: An optical system has an underlying device configured to provide output light. A transparent optical device optically coupled to the underlying device transmits light from the underlying device through the transparent optical device to display a scene. The transparent optical device includes detector elements formed in an active area to detect light portraying at least a portion of the scene. The underlying device has transparent regions formed in the active area to allow light to pass through from the underlying device to a user. The optical system further includes an image processor that processes images produced using light detected by the detector elements to identify a specific instance of light in the scene. The image processor causes display elements in the active area of the transparent optical device to display an indicator, in the scene, correlated to the specific instance of light.

Abstract: A vehicle includes a vehicle platform, an antenna, and an antenna positioner configured to position the antenna relative to the vehicle platform. An inertial navigation system (INS) is associated with the vehicle platform and configured to generate INS output data. An inertial measurement unit (IMU) is associated with the antenna positioner and configured to generate IMU output data having a timing latency difference relative to the INS output data. A controller may be configured to control the antenna positioner based upon the INS output data and the IMU output data adjusted for the timing latency therebetween.

Abstract: Iterative signal processing. At communication hardware, a signal is received from a transmission medium. The signal has characteristics that obscure data or a signal of interest in the signal. The signal is processed at a first signal processor, which is an iterative processor that performs signal processing in cycles whereby successive cycles: improve the performance of processing of the processor itself over previous cycles, or improve the output from the processor. The signal is processed at one or more second signal processors. Extrinsic data, with respect to the first signal processor is produced as a result. The extrinsic data is provided to the first signal processor and used to counter the effects of the data or signal of interest being obscured in the signal, while the first signal processor is intracycle of a first processing cycle.

Abstract: Clock recovery from a serial data signal involves using a serializer/deserializer (SERDES) to produce a clock signal which periodically alternates between high and low output clock values. These high and low clock values are generated by outputting for each clock period a series of N digital bits including a plurality of low-level bits to form each low output clock value and a plurality of high-level bits to form each high output clock value. A sync pulse obtained from a sync word present in each frame of the serial data signal is used to periodically determine a frequency error of the clock signal. The frequency error is used as a basis to change a phase of the adjusted clock signal responsive to the frequency error.

Abstract: Systems and methods for operating a communication device. The methods comprise: receiving a carrier signal modulated with a modulation signal comprising a symbol conveyed in a symbol timing window; determining an energy value for each timeslot in the symbol timing window; combining the energy values to determine a combined energy value for each bit of the symbol in a manner in which the combined energy value is penalized if more than one timeslot of the symbol timing window comprises energy contained in the carrier signal; and generating a soft value for each bit of the sequence of bits by combining the combined energy value with a weight value, where the weight value is selected from a plurality of weight values based on a number of timeslots in the symbol timing window which comprises energy contained in the carrier signal.