Abstract: The embodiments herein focus on plasma enhanced atomic layer deposition (PEALD) processes. Conventional PEALD techniques result in films having high quality at the bottom and top of a feature, but low quality on the sidewalls. The disclosed embodiments achieve more uniform film quality as evidenced by more uniform wet etch rates and electrical properties throughout the film. The disclosed embodiments may use one or more of a relatively high deposition temperature, a relatively high RF power for generating the plasma, and/or relatively long RF plasma exposure duration during each cycle of the PEALD reaction.
Abstract: A face plate of a showerhead assembly of a deposition apparatus in which semiconductor substrates are processed includes gas holes arranged in an asymmetric pattern with a hole density which is substantially uniform or varies across the face plate. The face plate can include a lower wall and an outer wall extending vertically upwardly from an outer periphery of the lower wall. The outer wall is sealed to an outer periphery of a back plate such that an inner plenum is formed between the face plate and the back plate. The gas hole pattern in the face plate avoids symmetry which can cause defects on processed substrates.
Abstract: A semiconductor substrate support for supporting a semiconductor substrate in a plasma processing chamber includes a multi-plane heater such as a heater array comprising thermal control elements operable to tune a spatial temperature profile on the semiconductor substrate. The multi-plane heater includes at least one pair of vertically offset heating elements connected in series or parallel to control heating output in a heating zone on the substrate support. The thermal control elements can be powered by two or more power supply lines and two or more power return lines wherein each power supply line is connected to at least two of the heater zones and each power return line is connected to at least two of the heater zones.
Type:
Application
Filed:
December 11, 2015
Publication date:
June 15, 2017
Applicant:
Lam Research Corporation
Inventors:
Keith William Gaff, Benny Wu, Eric A. Pape
Abstract: Certain embodiments disclosed herein pertain to methods and apparatus for electrodepositing material on a substrate. More particularly, a novel membrane for separating the anode from the cathode/substrate, and a method of using such a membrane are presented. The membrane includes at least an ion exchange layer and a charge separation layer. The disclosed embodiments are beneficial for maintaining relatively constant concentrations of species in the electrolyte over time, especially during idle (i.e., non-electroplating) times.
Abstract: A grid assembly for a substrate processing system includes a first portion including a first body defining a central opening, an inlet, an outlet, and an upper manifold that is located in the first body and that is in fluid communication with the inlet or the outlet. A second portion is arranged adjacent to the first portion and includes a second body defining a central opening. A plurality of tubes is arranged in the central opening of the second body. First ones of the plurality of tubes are in fluid communication with the upper manifold. A lower manifold is located in the second body and is in fluid communication with the other one of the inlet or the outlet. Second ones of the plurality of tubes are in fluid communication with the lower manifold. The grid assembly is arranged between a remote plasma source and a substrate.
Abstract: A chamber filler kit for an inductively coupled plasma processing chamber in which semiconductor substrates are processed by inductively coupling RF energy through a window facing a substrate supported on a cantilever chuck. The kit includes at least one chamber filler which reduces the lower chamber volume in the chamber below the chuck. The fillers of the kit can be mounted in a standard chamber having a chamber volume of over 60 liters and by using different sized chamber fillers it is possible to reduce the chamber volume to provide desired gas flow conductance and accommodate changes in vacuum pressure during processing of the substrate. The chamber filler kit can be used to modify a standard chamber to accommodate different processing regimes such as rapid alternating processes wherein wide pressure changes are needed without varying a gap between the substrate and the window.
Type:
Grant
Filed:
March 15, 2012
Date of Patent:
June 13, 2017
Assignee:
LAM RESEARCH CORPORATION
Inventors:
Jon McChesney, Theo Panagopoulos, Alex Paterson, Craig Blair
Abstract: A buffer station for thermal control of semiconductor substrates in a semiconductor substrate processing system is configured to interface with first and second vacuum transfer modules of the system so as to allow substrates to be transferred therebetween. The buffer station comprises a first vacuum transfer module interface configured to allow substrates to be transferred between the first vacuum transfer module and the buffer station, and a second transfer module interface configured to allow substrates to be transferred between the second vacuum transfer module and the buffer station. At least one buffer chamber between the first and second vacuum transfer module interfaces includes a lower pedestal configured to receive a substrate on a support surface thereof. One or more semiconductor substrate storage shelves are above the lower pedestal. Each shelf is configured to receive a substrate from the first or second vacuum transfer module and store the respective substrate thereon.
Type:
Grant
Filed:
October 23, 2014
Date of Patent:
June 6, 2017
Assignee:
LAM RESEARCH CORPORATION
Inventors:
Keith Freeman Wood, Matthew Jonathon Rodnick
Abstract: A method for etching features in a silicon oxide containing etch layer disposed below a patterned mask in a chamber is provided. An etch gas comprising a tungsten containing gas is flowed into the chamber. The etch gas comprising the tungsten containing gas is formed into a plasma. The silicon oxide etch layer is exposed to the plasma formed from the etch gas comprising the tungsten containing gas. Features are etched in the silicon oxide etch layer while exposed to the plasma formed from the etch gas comprising the tungsten containing gas.
Type:
Grant
Filed:
March 14, 2016
Date of Patent:
June 6, 2017
Assignee:
Lam Research Corporation
Inventors:
Scott Briggs, Eric Hudson, Leonid Belau, John Holland, Mark Wilcoxson
Abstract: Systems and methods for performing edge ramping are described. A system includes a base RF generator for generating a first RF signal. The first RF signal transitions from one state to another. The transition from one state to another of the first RF signal results in a change in plasma impedance. The system further includes a secondary RF generator for generating a second RF signal. The second RF signal transitions from one state to another to stabilize the change in the plasma impedance. The system includes a controller coupled to the secondary RF generator. The controller is used for providing parameter values to the secondary RF generator to perform edge ramping of the second RF signal when the second RF signal transitions from one state to another.
Type:
Grant
Filed:
July 7, 2016
Date of Patent:
June 6, 2017
Assignee:
Lam Research Corporation
Inventors:
John C. Valcore, Jr., Bradford J. Lyndaker, Andrew S. Fong
Abstract: The embodiments herein relate to methods and apparatus for depositing an encapsulation layer over memory stacks in MRAM and PCRAM applications. The encapsulation layer is a titanium dioxide (TiO2) layer deposited through an atomic layer deposition reaction. In some embodiments, the encapsulation layer may be deposited as a bilayer, with an electrically favorable layer formed atop a protective layer. In certain implementations, gaps between neighboring memory stacks may be filled with titanium oxide, for example through an atomic layer deposition reaction or a chemical vapor deposition reaction.
Type:
Grant
Filed:
June 9, 2016
Date of Patent:
June 6, 2017
Assignee:
Lam Research Corporation
Inventors:
Shankar Swaminathan, Frank L. Pasquale, Adrien LaVoie
Abstract: A method for forming a stair-step structure in a substrate within a plasma processing chamber is provided. An organic mask is formed over the substrate. The organic mask is trimmed with a vertical to lateral ratio of less than 0.8, wherein the trimming simultaneously forms a deposition over the organic mask. The substrate is etched. The steps of trimming the organic mask and etching the substrate are cyclically repeated a plurality of times.
Abstract: A ceramic layer is attached to a top surface of a base plate using a bond layer. The ceramic layer has a top surface configured to support a substrate. At least one clamp electrode is positioned within an upper region of the ceramic layer. A primary radiofrequency (RF) power delivery electrode is positioned within the ceramic layer at a location vertically below the at least one clamp electrode such that a region of the ceramic layer between the primary RF power delivery electrode and the at least one clamp electrode is substantially free of other electrically conductive material. A plurality of RF power delivery connection modules is distributed in a substantially uniform manner about a perimeter of the ceramic layer. Each of the RF power delivery connection modules is configured to form an electrical connection from the base plate to the primary RF power delivery electrode at its respective location.
Type:
Grant
Filed:
June 1, 2016
Date of Patent:
June 6, 2017
Assignee:
Lam Research Corporation
Inventors:
Neil Martin Paul Benjamin, Henry Povolny, Anthony J. Ricci
Abstract: An electroplating apparatus that promotes uniform electroplating on the substrates having thin seed layers includes a convex anisotropic high resistance ionic current source (AHRICS), such as an electrolyte-permeable resistive domed plate. The AHRICS is positioned in close proximity of the substrate, so that a distance from the central portion of the AHRICS to the substrate is smaller than the distance from the edge portion of the AHRICS to the substrate. The apparatus further includes a plating chamber configured to hold the electrolyte and an anode. The apparatus further includes a substrate holder configured to hold the substrate. In some embodiments, the apparatus further includes a secondary (thief) cathode configured to divert ionic current from the near-edge region of the substrate.
Abstract: A method, for drying an etched layer with a plurality of structures with etched spaces between the plurality of structures is provided. A liquid is provided within the spaces on the etched layer. The liquid is displaced with a drying solution with a solvent. Some of the solvent is removed from the drying solution to form a solid from the solution, wherein the solid at least fill half the height of the etched high aspect ratio spaces. The solid is removed.
Type:
Grant
Filed:
June 21, 2013
Date of Patent:
May 30, 2017
Assignee:
LAM RESEARCH CORPORATION
Inventors:
Stephen M. Sirard, Diane Hymes, Olivier B. Postel
Abstract: A system and a method for increasing a rate of transfer of data between a radio frequency (RF) generator and a host computer system is described. The rate of transfer of data is increased by implementing dedicated physical layers associated with the RF generator and the host computer system and a dedicated physical communication medium between the RF generator and the host computer system. Moreover, a dual push operation is used between the RF generator and the host computer system. There is no request for data sent from the RF generator to the host computer system or from the host computer system to the RF generator.
Type:
Grant
Filed:
December 18, 2015
Date of Patent:
May 30, 2017
Assignee:
Lam Research Corporation
Inventors:
John C. Valcore, Jr., Tony San, Andrew Fong
Abstract: A method for etching features in a stack is provided. A combination hardmask is formed by forming a first hardmask layer comprising carbon or silicon oxide over the stack, forming a second hardmask layer comprising metal over the first hardmask layer, and patterning the first and second hardmask layers. The stack is etched through the combination hardmask.
Type:
Grant
Filed:
March 27, 2015
Date of Patent:
May 23, 2017
Assignee:
Lam Research Corporation
Inventors:
Joydeep Guha, Sirish K. Reddy, Kaushik Chattopadhyay, Thomas W. Mountsier, Aaron Eppler, Thorsten Lill, Vahid Vahedi, Harmeet Singh
Abstract: Apparatus and methods are provided for monitoring a pulsed RF bias signal applied to a chuck in a processing chamber. One method includes operations for detecting voltage values of individual pulses of the pulsed RF bias voltage, and for determining the time for sampling the value of each individual detected pulse. At the sampling time for each pulse, a particular voltage value of the respective individual detected pulse is sampled and the particular voltage value is held. Each particular voltage value represents a characteristic peak-to-peak voltage value of each individual detected pulse. A feedback signal representing the characteristic peak-to-peak voltage value for a voltage envelope of one of the individual detected pulses is generated, and the voltage of the pulsed RF bias voltage signal applied to the chuck is adjusted according to a difference between the feedback signal and a desired voltage value of the pulsed RF bias voltage signal.
Type:
Grant
Filed:
October 29, 2012
Date of Patent:
May 23, 2017
Assignee:
Lam Research Corporation
Inventors:
Andras Kuthi, Stephen Hwang, James C. Vetter, Greg Eilenstine, Rongping Wang, Tuan Ngo
Abstract: Systems and methods for determining an RF transmission line model for an RF transmission system includes generating a baseline RF transmission line model characterizing the RF transmission system. A plasma RF voltage, RF current, RF power and/or a corresponding RF induced DC bias voltage is calculated from the baseline RF transmission line model. An end module including the electrostatic chuck, a plasma and an RF return path is added to the baseline RF transmission line model to create one or more revised RF transmission line models. A revised plasma RF voltage, a revised plasma RF current, a revised plasma RF power and/or a corresponding revised RF induced DC bias voltage is calculated from each of the revised baseline RF transmission line models. The revised RF transmission line models are scored to identify a best fitting revised RF transmission line model as a complete RF transmission line model.
Abstract: Systems and methods are disclosed for plasma enabled film deposition on a wafer in which a plasma is generated using radiofrequency signals of multiple frequencies and in which a phase angle relationship is controlled between the radiofrequency signals of multiple frequencies. In the system, a pedestal is provided to support the wafer. A plasma generation region is formed above the pedestal. An electrode is disposed in proximity to the plasma generation region to provide for transmission of radiofrequency signals into the plasma generation region. A radiofrequency power supply provides multiple radiofrequency signals of different frequencies to the electrode. A lowest of the different frequencies is a base frequency, and each of the different frequencies that is greater than the base frequency is an even harmonic of the base frequency. The radiofrequency power supply provides for variable control of the phase angle relationship between each of the multiple radiofrequency signals.
Type:
Grant
Filed:
May 13, 2016
Date of Patent:
May 9, 2017
Assignee:
Lam Research Corporation
Inventors:
Douglas Keil, Ishtak Karim, Yaswanth Rangineni, Adrien LaVoie, Yukinori Sakiyama, Edward Augustyniak, Karl Leeser, Chunhai Ji