Abstract: A high-speed, current-driven latch is provided. The latch conducts a current and includes an output, a SET circuit and a RESET circuit. The output is variable between a first state and a second state. The SET circuit conducts the current present in the latch at the first state such that the SET circuit is maintained close to a level required to change the output of the transistor from the first to the second level, and the RESET circuit conducts the current at the second level such that the RESET circuit is close to a level required to change the output of the transistor from the second level to the first level.

Abstract: Switching regulator circuits and methods are provided for regulating output voltage that include an adjustable minimum peak inductor current level for Burst Mode in current-mode DC-DC regulators. Minimum peak inductor current level control is achieved during Burst Mode by allowing external control for adjusting the burst threshold level. A single pin can be used to distinguish between forced continuous and Burst Mode as well as set the burst threshold level during Burst Mode, or an alternate method of setting a variable burst threshold level can be implemented in which two pins are used, one for selecting the mode of operation and the other for setting the burst threshold level during Burst Mode. The above principles can be applied to both step-up and step-down regulator circuit configurations, as well as both synchronous switching regulators and non-synchronous switching regulators.

Abstract: A leadframe is disclosed. The leadframe comprises a frame characterized by a substantially rectangular outline, a die paddle with a receiving surface, and a plurality of support members that connect the frame to the die paddle. The leadframe further comprises a plurality of leads connected to the frame, that will eventually serve to electrically connect an integrated circuit mounted on the die paddle to an external electrical device. The die paddle lies in a lower horizontal plane. A plurality of support members connect the frame with the die paddle. As projected on to a vertical plane that is perpendicular to the side of the frame to which a support member is attached, the offset angle between the support member and a vertical axis is less than 45 degrees.

Abstract: Circuitry and methods for improved amplifiers with large bandwidth and constant gain-are provided. The combination of a synthetic inductive drain load and a bridged-T matching network provide amplifiers that can drive a substantial capacitive load with the above mentioned improvements over prior amplifiers. Additionally, circuits presented allow for improved rise time and insensitivity to temperature variations.

Abstract: A current-mode switching regulator that maintains a substantially constant maximum current limit over a virtually full range of duty cycles is provided. The regulator has a control circuit that includes a buffer circuit, an adjustable voltage clamp circuit, and a slope compensation circuit. The buffer circuit isolates a control signal from capacitive loading associated with control circuit. The threshold level of the adjustable voltage clamp circuit varies with respect to the amount of slope compensation provided to the voltage regulator. This allows a control voltage to increase as slope compensation increases so that a substantially constant maximum current limit is maintained.

Abstract: The present invention relates to analog computation circuits that use a synchronous demodulator topology which can be configured to perform arithmetic computation, power measurements, and/or energy measurement of various analog signals. The computation circuits have circuitry that generates an output signal based on the values of a first input signal, a second input signal, and a reference signal. This invention provides accurate computation of two signals by using modulation circuitry (e.g., &Dgr;-&Sgr;modulation circuitry), demodulation circuitry (e.g., multiplying digital-to-analog converters), delay circuitry, and output circuitry.

Abstract: Driver circuitry with a tuned output impedance is provided. Tuning is provided by an isolation circuit and matching network coupled to an output of the driver circuit. The isolation circuit isolates the capacitance associated portions of the driver circuit thereby reducing overall output capacitance. The matching network substantially compensates for reactive impedances associated with other portions of the driver circuit. These tuning circuits allow the driver circuit overcome intrinsic reactance and exhibit a substantially resistive output impedance characteristic.

Abstract: A current-mode switching regulator that maintains a substantially constant maximum current limit over a virtually full range of duty cycles is provided. The regulator has a control circuit that includes a buffer circuit, an adjustable voltage clamp circuit, and a slope compensation circuit. The buffer circuit isolates a control signal from capacitive loading associated with control circuit. The threshold level of the adjustable voltage clamp circuit varies with respect to the amount of slope compensation provided to the voltage regulator. This allows a control voltage to increase as slope compensation increases so that a substantially constant maximum current limit is maintained.

Abstract: Power measuring receiver (PMR) methods and apparatus for measuring power of signals are provided in which a high frequency measuring circuit (HFMC), a conversion measuring circuit (CMC), and an intermediate frequency measuring circuit (IFMC) work in conjunction with each other to measure a wide power range of signals. The HFMC may measure relatively high power signals at high frequency. The CMC may convert the high frequency signal into an intermediate frequency signal so that both the CMC and the IFMC can accurately measure low power signals. The CMC may also set the minimum noise bandwidth associated with gain stages in the IFMC. The intermediate frequency may provide the IFMC with the ability to perform low power measurements at a reduced DC power consumption.

Abstract: A multi-phase multi-channel voltage regulator having high efficiency at light loads is provided. The regulator increases efficiency at light loads by shutting down a select channel of the regulator. In addition, the regulator may place remaining channels in Burst Mode.

Abstract: A switch impedance insensitive signal processor is provided. A signal processor according to the present invention overcomes the problem of switch impedance by adding an individual buffer, e.g. a unity-gain amplifier, between the switch and the processor portion of the circuit. The buffer isolates the signal processor from the switch impedance.

Abstract: An oversampling data converter with good rejection capability is provided. The oversampling data converter includes three primary parts; a delta-sigma modulator for sampling and digitizing incoming analog signals, a high order digital filter for discarding unwanted frequency components, and an internal clock generator for controlling the operation of the modulator and the filter. All three primary parts are provided in the same package and also on the same die. No frequency-setting external components are necessary. The high order digital filter provides more than 100 dB rejection at a first null frequency. The first null provided by the filter has a sufficiently broad range so as to allow a low accuracy internal clock generator to be used. If necessary, the clock can be generated externally or from some other part of the system.

Abstract: The invention provides polyphase synchronous switching regulator circuits that include N power stages connected in parallel, with each stage synchronized to a timing control signal that is 360.degree./N out of phase from one another. Each power stage supplies current I.sub.OUT /N to the load. Current-mode and voltage-mode control implementations are described that provide efficient, low voltage, high current synchronous switching regulator circuits that have low input ripple current, low EMI, high slew-rate capability and low output ripple.

Abstract: A drive circuit for a high-speed integrated circuit, bipolar switching regulator is disclosed. The circuit runs at megahertz frequencies, yet is efficient as previously available bipolar integrated circuit switching regulators operating at much lower frequencies. The circuitry provides three switch drive currents: a first (nominal) current that is provided while the switch is off in order to conserve power; a second (boosted) current, provided while the switch is transitioning from off to on in order to increase the speed at which the switching element switches on; and a third (drive) current, provided after the switch has turned on for maintaining the switch at a desired point in saturation. The drive current, additionally, varies as a function of the load on the switch in order, again, to conserve power. Additional circuitry increases the speed at which the switch turns off, by momentarily boosting base discharge current during the on-to-off transition period of the switch.

Abstract: A switching mode voltage regulator circuit that operates at reduced quiescent current levels is provided. The voltage regulator preferably includes a control circuit and a switching element that connects and disconnects filter circuitry from the control circuit. An error amplifier in the control circuit is placed in a micropower operating state when the regulator is in standby mode to reduce quiescent current.

Abstract: Circuits and methods for regulating an auxiliary output with an over-winding on a synchronous buck regulator are provided. Though these regulators have produced regulated auxiliary outputs in conventional circuits, the regulation used in conventional circuits has not been maximized. This caused the auxiliary output voltage to vary with changes in load on the primary output as well as with changes in load on the auxiliary output. The present invention directly regulates the auxiliary output voltage of the synchronous buck regulator by adjusting the gate amplitude of a MOSFET switch located in the power loop of the auxiliary output.

Abstract: Low quiescent power, high output power, rail-to-rail output stage circuits and methods are provided. The output stages are capable of providing output voltages that are substantially equal to the supply voltages (i.e., within one V.sub.CE SAT of both supply voltages) without a substantial increase in output circuit complexity and without a substantial increase in quiescent current. The output stages operate by providing a direct path for the drive signal to the output sinking transistor, and an additional, separate path for the drive signal to the output sourcing transistor. The sinking and sourcing paths are separated by a PNP transistor that gradually turns off during sinking to isolate that portion of the circuit so that the drive current to the sinking transistor is not reduced. Additional embodiments are provided where additional components are utilized to further increase the maximum sink and source currents without a significant increase in quiescent current or reduction in output swing.

Abstract: A power-supply and control circuit is provided for driving a fluorescent lamp from a low-voltage DC power source such as a battery. In typical lamp-driving circuits, a step-up transformer is used to apply well known magnetic techniques to achieve the low-to-high voltage conversion required by the lamp. The present invention uses a new approach, applying piezoelectric characteristics of certain ceramic materials to replace the magnetic transformer. Resonant characteristics of such ceramic materials permit them to be self-resonated. A DC-to-AC converter coupled to a switching regulator converts low DC voltage into a higher AC voltage for driving the fluorescent lamp. In one embodiment, the lamp is included in a feedback loop which includes a circuit for producing a feedback signal indicative of the magnitude of current conducted by the lamp. The feedback signal is applied to the switching regulator to produce in the lamp a regulated current and, hence, a regulated lamp intensity.

Abstract: Control circuits for a switching voltage regulator circuit which uses magnetic flux sensing are provided. These circuits can be used to improve output voltage regulation by reducing parasitic effects inherently present in magnetic flux-sensed feedback switching voltage regulator designs.

Abstract: A power efficient circuit for charging the gate of a transistor switch to a charge-pumped voltage level in excess of a supply rail voltage is provided. The circuit includes a current-controlled oscillator which generates an oscillating waveform that drives a capacitive charge-pump circuit. The circuit monitors the gate voltage of the transistor switch and reduces the frequency of the oscillating waveform, thereby reducing power consumption, when the gate voltage exceeds a frequency switching value indicating that the transistor switch has been sufficiently turned so as to allow the circuit to enter a micropower mode.