Abstract: The subject disclosure includes reducing switching losses at lower load current while maintaining the switching frequency for a hybrid switched capacitor converter circuit. Control circuitry is coupled to the hybrid switched capacitor converter circuit and configured to measure a load current at an output of the hybrid switched capacitor converter circuit in a buck phase mode. The control circuitry is configured to compare the measured load current to set of predetermined thresholds. The control circuitry is configured to drive a first voltage to the second set of transistors that turns on the second set of transistors periodically to regulate the output during the buck phase mode. The control circuitry is also configured to drive a second voltage to the first set of transistors that turns off the first set of transistors for one or more switching cycles while the second set of transistors are turned on based on the comparison.

Abstract: A PHY is coupled across a primary winding of an isolation transformer for differential data transmission and reception between PHYs and for DC isolation. Positive and negative low impedance terminals of a DC power supply are coupled to first and second secondary windings of the transformer as split center taps of the transformer. Respective ends of the wires in the wire pair are coupled to the other ends of the secondary windings. Therefore, the power supply conducts DC current through the secondary windings, while the differential data signals also flow through the secondary windings, generating corresponding differential data signals at the inputs to the PHY. The transformer also attenuates common mode noise. Therefore, the circuit makes multi-use of the isolation transformer, allowing fewer components to be used for the DC coupling, wire termination, and common mode noise cancellation.

Abstract: A buffer system may have an output for driving a switched load that changes during periods indicated by a switching signal. The buffer system may operate in a closed loop when the switching signal indicates that a load change is not taking place by comparing a signal indicative of the output of the buffer system with a reference voltage. The buffer system may operate in an open loop when the switching signal indicates that a load change is taking place by not comparing signal indicative of the output of the buffer system with the reference voltage. Both the buffer system and the switched load may be on the same chip.

Abstract: A supply circuit comprises a regulated positive supply circuit and an unregulated negative supply circuit. The regulated positive supply circuit includes an inductor arranged to receive input energy from an input circuit node, a switch circuit coupled to the inductor at a switch circuit node, and a control circuit coupled to the switch circuit. The control circuit is configured to control activation of the switch circuit to regulate a voltage at a regulated circuit node and generate a positive output voltage at a positive output circuit node. The unregulated negative supply circuit is operatively coupled to the switch circuit node and is configured to generate a negative supply voltage at a negative output circuit node.

Abstract: A PHY is coupled across split primary windings of an isolation transformer for differential data transmission and reception between PHYs and for DC isolation. Positive and negative low impedance terminals of a DC power supply are coupled to first and second secondary windings of the transformer as split center taps of the transformer. Respective ends of the wires in the wire pair are coupled to the other ends of the secondary windings. Therefore, the power supply conducts DC current through the secondary windings, while the differential data signals also flow through the secondary windings, generating corresponding differential data signals at the inputs to the PHY. The transformer also attenuates common mode noise. Therefore, the circuit makes multi-use of the isolation transformer, allowing fewer components to be used for the DC coupling, wire termination, and common mode noise cancellation.

Abstract: An ideal diode circuit is described which uses an NMOS transistor as a low-loss ideal diode. The control circuit for the transistor is referenced to the anode voltage and not to ground, so the control circuitry may be low voltage circuitry, even if the input voltage is very high, referenced to earth ground. A capacitor is clamped to about 10-20V, referenced to the anode voltage. The clamped voltage powers a differential amplifier for the detecting if the anode voltage is greater than the cathode voltage. The capacitor is charged to the clamped voltage during normal operation of the ideal diode by controlling the conductivity of a second transistor coupled between the cathode and the capacitor, enabling the circuit to be used with a wide range of frequencies and voltages. All voltages applied to the differential amplifier are equal to or less than the clamped voltage.

Abstract: A synchronous converter that includes a power source, an inductor, an output terminal, and a control circuit. The control circuit may include: an electronic energizing switch that, when activated, delivers energy from the power source to the inductor; an electronic de-energizing switch that, when activated, delivers energy from the inductor to the output terminal, the electronic de-energizing switch including a body diode; and an electronic pull-down switch that, when activated, turns off the electronic de-energizing switch, redirects current flowing though the body diode of the electronic de-energizing switch, and removes charge from the body diode of the electronic de-energizing switch. The electronic energizing switch and the electronic de-energizing switch may never both be activated at the same time.

Abstract: A composite transconductance amplifier is formed using a single transconductance amplifier with its output connected to a load via one or more resistors in series. The single transconductance amplifier has a linear transconductance (gm). As the current through the series resistors is increased, the voltage drops across the nodes of the resistors increase. Control terminals of separate drive circuits are connected to the various nodes and successively turn on as the current from the single transconductance amplifier slews more positive. Thus, the effective gm of the composite transconductance amplifier is based on the gm of the single transconductance amplifier and the currents contributed by the successively enabled drive circuits. Therefore, the gm is nonlinear. Pull-down drive circuits are also connected to the resistor nodes to successively pull down the current as the output from the single transconductance amplifier slews negative. The composite transconductance amplifier has low quiescent current.

Abstract: A predicted ripple in the feedback voltage of a switching converter is generated, based on the ripple over a certain number of recent switching cycles. The DC portion of the feedback voltage is filtered out. This predicted feedback voltage ripple is then added to a fixed reference voltage to create a compensated reference voltage. The compensated reference voltage is applied to the non-inverting input of an error amplifier, and the feedback voltage (having a DC component and ripple) is applied to the inverting input of the error amplifier. Thus, substantially the same ripple component is applied to both inputs and cancels out. Therefore, the output of the error amplifier is not affected by the ripple in the feedback voltage, and a non-rippling control voltage is generated by the error amplifier. As a result, the gain-bandwidth product of the converter can be increased for faster response to transients.

Abstract: A calibration circuit for synchronizing a switching regulator includes a phase locked loop circuit to generate one or more control signals based on an output of the switching regulator. A digital calibration circuit provides a digital output signal based on the control signals from the phase locked loop circuit. A timer can provide switching pulses to the switching regulator based on the digital output signal and the control signals. The phase locked loop circuit can adjust the control signals based on a reference clock signal to synchronize a feedback signal of the switching regulator with the reference clock signal.

Abstract: Techniques are provided for low, or deep, dimming of a light-emitting diode (LED) load. In an example, a low dimming circuit can include a target current detector configured to provide an output indicative of a target current of a power stage of a pulse width modulated driver, and a control circuit configured to receive a PWM signal of the PWM LED driver, to control a first transition to a first state of a power switch of the power stage during an on-interval of a first PWM cycle of the PWM signal, and to control a second transition to the first state of the power switch using the output of the target current detector during an off interval of the first PWM cycle.

Abstract: A switched resonant power converter includes multiple switching transistors, a resonant circuit comprising a capacitor and an inductor, and an auxiliary soft-start bypass circuit that bypasses a default switching path that includes a first switching transistor of the switching transistors, and provides an alternative path through an impedance element. A corresponding control circuit is configured to switch between an operational mode in which the default switching path is periodically activated while the alternative path is deactivated to provide a first frequency-responsive power through the resonant circuit, and a soft-start mode in which the alternative path is periodically activated while the default switching path is deactivated to provide a second frequency-responsive power through the resonant circuit.

Abstract: A controller may control a buck-boost regulator having an input voltage and an output voltage. The controller may include: circuitry that causes the output voltage of the buck-boost regulator to be at the bottom of a pre-determined voltage window when the input voltage goes below the bottom of the pre-determined voltage window: circuitry that causes the output voltage of the buck-boost regulator to be at the top of the pre-determined voltage window when the input voltage goes above the top of the pre-determined voltage window; and circuitry that causes the buck-boost regulator to pass the input voltage through the buck-boost regulator so as to cause the voltage output of the buck-boost regulator to be at the same level as the input voltage when the input voltage is within the pre-determined voltage window.

Abstract: Techniques are provided for low, or deep, dimming of a light-emitting diode (LED) load. In an example, a method of adjusting an initial voltage of a driver circuit for an LED load can include providing current to an LED load from a power stage of the driver during an on-time of a pulse-width modulation (PWM) cycle, receiving error current information of the driver circuit at a low-dimming control circuit of the driver, and adjusting a voltage of an output capacitor coupled to the driver during an off-time of the PWM cycle, the charge adjustment based on the error current information.

Abstract: Techniques are provided for low, or deep, dimming of a light-emitting diode (LED) load. In an example, a method for deep dimming a light-emitting diode (LED) load can include, when a current of an inductor does not reach a target current by the end of an on-time of a pulse-width modulation (PWM) switch cycle, and, during an initial on-time of the PWM switch cycle, allowing the current of the inductor to reach the target current during a next “off” time interval of the PWM switch cycle, wherein the inductor is coupled to the LED via a PWM switch, and in response to the current of the inductor reaching the target current before the end of the on-time of a subsequent PWM switch cycle, interrupting energizing of the inductor at the end of the on-time of the PWM switch cycle.

Abstract: A switched capacitor power converter includes multiple switching transistors in a default switching path, and an auxiliary soft-charge bypass circuit which includes one or more auxiliary transistors and an impedance element, and provides an auxiliary circuit path through the auxiliary transistor(s) to charge a plurality of capacitors within the converter circuit when the auxiliary soft-charge bypass circuit is activated and at least one of the switching transistors is deactivated. A corresponding control circuit switches the converter circuit from a soft-charging mode in which the auxiliary soft-charge bypass circuit is activated and a switching transistor is deactivated, to an operational mode in which the auxiliary soft-charge bypass circuit is deactivated, the control circuit periodically switching the one or more auxiliary transistors during the soft-charging mode in place of the deactivated switching transistor(s).

Abstract: A method and system of counting coulombs drawn from a power source by a load. A reference current source regulates the current drawn by the load at any given time to be either zero or a predetermined fixed amount. A comparator controls a time the switch is closed and open. When the switch is closed, coulombs are allowed to be drawn from the power source, and prevented to be drawn when the switch is open. An oscillator generates a clock signal during the time the switch is closed. A counter counts the number of clock cycles from the clock signal during the time the switch is closed. The count is provided as a signal at a second output of the coulomb counter.