Abstract: A circuit and method for controlling a slew rate of an output buffer. A pre-driver is provided that drives an input of an output pad driver of the output buffer. An output slew rate of the pre-driver is electronically selected among at least two electronically selectable slew rates. An output amplitude of the pre-driver is controlled such that the output amplitude is not greater than an amplitude that is generally minimally sufficient to cause the output pad driver to produce an output signal having a desired dynamic range.
Abstract: In a multiprocessor-system, a system and method assigns communications to processors, processes, or subsets of types of communications to be processed by a specific processor without using a locking mechanism specific to the resources required for assignment.
Type:
Grant
Filed:
January 6, 2003
Date of Patent:
June 10, 2008
Assignee:
SLT Logic, LLC
Inventors:
Van Jacobson, Bob Felderman, Archibald L Cobbs, Martin Eberhard
Abstract: An enhanced Ethernet protocol for computing and telecommunication supports a shortened frame size for communicating data payloads among selected devices within a constrained neighborhood based on a unique identification.
Abstract: A computing and communication architecture utilizes a serial protocol based switched fabric among circuit cards housed in packaging arrangement. In one embodiment, each circuit card connected to the serial protocol based switched fabric in the packaging arrangement is provided with a protocol processor that enables all of the circuit cards to efficiently provide packet-based serial self-clocked communications at line speed. As a result, it is not necessary to arrange the circuit cards in a hierarchical manner in order to address the problems of switch blocking and related traffic congestion issues that would otherwise limit the implementation of the serial protocol based backplane arrangement for housing circuit cards.
Abstract: In a multiprocessor system, a system and method assigns communications to processors, processes, or subsets of types of communications to be processed by a specific processor without using a locking mechanism specific to the resources required for assignment. The system and method can reschedule processes to run on the processor on which the assignment is made.
Type:
Grant
Filed:
January 6, 2003
Date of Patent:
January 1, 2008
Assignee:
SLT Logic, LLC
Inventors:
Van Jacobson, Bob Felderman, Archibald L Cobbs, Martin Eberhard
Abstract: A delay locked loop (DLL) circuit that includes a delay line having a plurality of delay elements. Each delay element can be adapted to receive a clock input signal and generate a clock output signal, where the phase of each clock output signal is offset from the clock input signal. The delay line can be configured so that one clock input signal is a reference input clock signal and at least one clock output signal is a delay-line output clock signal. The feedback portion of the circuit can be configured to generate delay adjust signals based upon the phase offsets between pairs of clock signals. The delay adjust signals are fed back to the delay elements causing the reference input clock signal and the clock output signals to be phase-shifted apart equally about 360 degrees.
Abstract: A system and method provides communications to processes, handles transmissions of communications received from processes, and allows other manipulations of transmissions upon request by processes without an operating system call.
Type:
Grant
Filed:
April 17, 2003
Date of Patent:
July 3, 2007
Assignee:
SLT Logic, LLC
Inventors:
Martin Eberhard, Bob Felderman, Van Jacobson
Abstract: A system and method provides communications to processes, handles transmissions of communications received from processes, and allows other manipulations of transmissions upon request by processes without an operating system call.
Type:
Grant
Filed:
April 17, 2003
Date of Patent:
June 5, 2007
Assignee:
SLT Logic, LLC
Inventors:
Martin Eberhard, Bob Felderman, Van Jacobson
Abstract: A system and method allows input/output to and from a computer system via the memory bus of a computer system. Input is accepted directly into shared memory or other memory and assigned to a processor or other entity. A processor or other entity may retrieve the input assigned to it and process the input. Output is written by the system processors to private memory, then retrieved from private memory by the system and method and output, for example to a network. Inputs and outputs are written to and from memory without using the I/O buses of the computer system and without generating interrupts to the system processors.
Abstract: The present invention provides a multi-service queuing method and apparatus that provides exhaustive arbitration, load balancing, and support for rapid port failover. Routers and switches according to the present invention can instantaneously direct the flow of traffic to another port should there be a failure on a link, efficiently handle multicast traffic and provide multiple service classes. The fabric interface interfaces the switch fabric with the ingress and egress functions provided at a network node and provides virtual input and output queuing with backpressure feedback, redundancy for high availability applications, and packet segmentation and reassembly into variable length cells. The user configures fixed and variable-length cells. Virtual input and output queues are coupled to a switch fabric.
Abstract: A simple network comprises of: xDSL service equipment located at a distribution center coupled to an Aggregator Separator (AGSEP) System located at a DC; AGSEP system at the DC is coupled, using a high-speed link, to another AGSEP system located at a remote site, which is coupled to subscriber equipment using drop cables. The AGSEP systems aggregate the xDSL signals originating at either DC xDSL equipment or subscriber equipment, are carried over the high-speed link. The AGSEP systems and separate the aggregated signals at either end to distribute the separated signal to the respective equipment.
Abstract: The present invention describes a process for the production of ethanol by harvesting starch-accumulating filament-forming or colony-forming algae to form a biomass, initiating cellular decay of the biomass in a dark and anaerobic environment, fermenting the biomass in the presence of a yeast, and the isolating the ethanol produced. The present invention further relates to processing of the biomass remaining after ethanol production to recovering biodiesel starting materials and/or generation of heat and carbon dioxide via combustion.
Abstract: A system and method for scheduling data utilizes a number of queues for receiving data. A programmable criteria table comprises a number of entries each associated with one of the queues. The entries of the criteria table comprise programmable traffic parameters selected to associate the queues with particular traffic characteristics governing a flow of data through the queues. A programmable mapping table maps each of the queues to one of the criteria table entries. The criteria table is programmable independently from the mapping table. A scheduling period timer produces epoch time signals that define scheduling time periods. The scheduling of queues changes between scheduling time periods in accordance with the traffic parameters associated with the queues. The scheduling time period is dynamically programmable. The traffic parameters are dynamically programmable to alter a scheduling prioritization of the queues.
Abstract: In one embodiment of the present invention, an oven having a flexible and retractable door is described. The oven door is adapted to move from a closed position wherein it effectively closes an open side of the oven box and an open position wherein the door is retracted into the body of the oven, typically below the oven box. In variations, an electric motor is provided to selectively move the oven door between the open and closed positions. In other variations, the oven includes an oven rack that is moveable between extended and retracted positions by way of a second electric motor.
Type:
Grant
Filed:
March 15, 2005
Date of Patent:
June 20, 2006
Assignee:
Culinary Logic, LLC
Inventors:
Gary V. Harned, Kim A. Williams, Kenneth W. House, Douglas P. Collins
Abstract: A system and method for policing individual flows and subflows of a data stream. Data traffic streams are classified into separate traffic flows, which in turn can be further classified into subflows, thereby providing for different priority levels of subsets of the flow. The subflows may be still further classified into additional subflows, creating a hierarchical, layered prioritization that can be metered at each vertical and horizontal level of the hierarchy. A packet flow rate of each of the subflows is compared to a predefined rate limit to allow subflows of a flow to have different priorities therebetween.
Abstract: A system and method for facilitating packet transformation of multi-protocol, multi-flow, streaming data. Packet portions subject to change are temporarily stored, and acted upon through processing of protocol-dependent instructions, resulting in a protocol-dependent modification of the temporarily stored packet information. Validity tags are associated with different segments of the temporarily-stored packet, where the state of each tag determines whether its corresponding packet segment will form part of the resulting modified packet. Only those packet segments identified as being part of the resulting modified packet are reassembled prior to dispatch of the packet.
Type:
Grant
Filed:
May 4, 2001
Date of Patent:
September 13, 2005
Assignee:
SLT Logic LLC
Inventors:
Jeremy B. Paatela, Scott A. Sarkinen, Hemant Vrajlal Trivedi
Abstract: An improved method and apparatus for balancing distributed applications within a client/server network, such as a cable television network, is disclosed. In one aspect of the invention, a method of balancing the load of distributed application client portions (DACPs) across various server portions (DASPs) and server machines is disclosed. Statistics are maintained by one or more software processes with respect to the available resources of the servers and their loading; new process threads and/or distributed application server portions are allocated across the servers to maintain optimal system performance as client device loading increases or changes. In another aspect of the invention, a novel object-oriented distributed application software architecture employing both vertical and horizontal partitions and “mutable” (i.e., transportable) objects is disclosed.
Abstract: A multi-protocol, multi-stage, real-time frame classifier is disclosed. A preliminary multi-protocol frame composition analyzer is provided for performing preliminary multi-protocol frame classification for incoming frames. A parsing instruction generator is provided for processing at least the incoming frame and the preliminary multi-protocol frame classification to provide parsing instructions. A multi-stage parsing engine provides multi-stage parsing of the incoming frame according to the parsing instructions to generate search results presenting information about the incoming frame. An advanced level of data extraction is provided across various frame protocols without imposing a performance penalty. Longest prefix match searches and/or direct lookup searches are supported. Moreover, conditional extractions, instruction branching, multi-stage processing are all performed in real time.
Type:
Grant
Filed:
May 4, 2001
Date of Patent:
June 7, 2005
Assignee:
SLT Logic LLC
Inventors:
Scott A. Sarkinen, Gregg T. Sarkinen, Hemant Vrajlal Trivedi
Abstract: A system and method for policing one or more flows of a data stream of packets associated with differing transmission protocols. The current capacity level for each flow is determined, as is the packet protocol associated with each packet. A packet parameter in the packet that is indicative of the bandwidth consumption of the packet is identified. The packet parameter is converted to a predetermined format if the packet is not associated with a predetermined packet protocol. A common bandwidth capacity test is performed to determine whether the packet is conforming or non-conforming, and is a function of the packet parameter and the current bandwidth capacity level.