Abstract: Provided is a sleep management system, including a plurality of sensors including a first sensor and a second sensor being configured to collect data of a user, a hub device configured to receive first data collected by the first sensor and second data collected by the second sensor, obtain first processed data based on processing of the first data and second processed data based on processing of the second data, and a user device configured to receive the first processed data and the second processed data, obtain sleep state information corresponding to a sleep stage and a body movement of the user based on the first processed data and the second processed data, determine whether a non-rapid eye movement (NREM) sleep behavior disorder of the user occurs based on the user's sleep stage and the user's body movement, and perform a preset operation based on an occurrence of the NREM.

Abstract: A display panel includes a base substrate; an anode material layer including an anode of a light emitting element on the base substrate; a pixel definition layer on a side of the anode material layer away from the base substrate, and defining a subpixel aperture; an organic material layer at least partially in the subpixel aperture and on a side of the anode away from the base substrate; a cathode layer on a side of the organic material layer away from the base substrate; and a first auxiliary cathode layer on a side of the pixel definition layer away from the base substrate. The first auxiliary cathode layer is connected to the cathode layer, and includes a conductive material. An orthographic projection of the first auxiliary cathode layer on the base substrate at least partially overlaps with an orthographic projection of the pixel definition layer on the base substrate.

Abstract: A battery module of the present disclosure may include: a first group including a plurality of battery cells arranged in a row; a second group spaced apart from the first group and including a plurality of battery cells arranged in a row; a third group including a plurality of battery cells arranged in a row between the first group and the second group; a fourth group spaced apart from the third group and including a plurality of battery cells arranged in a row between the first group and the second group; a fire extinguishing member disposed in a space between the third group and the fourth group; and a case accommodating the first to fourth groups and the fire extinguishing member.

Abstract: Embodiments of the present disclosure disclose an OLED display panel and a terminal device. The OLED display panel includes power signal lines and vertical auxiliary lines extending along a first direction, and horizontal auxiliary lines and reset signal lines extending along a second direction. The horizontal auxiliary lines are electrically connected to the power signal lines at intersections therebetween to form a grid-like connection, and/or the vertical auxiliary lines are electrically connected to the reset signal lines at intersections therebetween to form grid-like connection.

Abstract: Disclosed herein is an adsorption device that adsorbs battery cells loaded in a loading bin and sequentially removes and transports the battery cells. The adsorption device includes a base plate capable of moving vertically and horizontally; a suction unit coupled to the base plate for adsorbing a battery cell located at a lower part of the base plate; and a push unit coupled to the base plate for striking the battery cell to produce a vibration in the battery cell adsorbed by the suction unit. The push unit includes a rod that is lifted up and down and strikes the top surface of the adsorbed battery cell to the lower end part, and the rod descends by the elastic force of a spring.

Abstract: The present disclosure provides a display substrate and a display device. The display substrate includes: a base substrate, and a compensation signal line and a plurality of sub-pixels on the base substrate. The sub-pixel includes a sub-pixel driving circuit. The sub-pixel driving circuit includes a driving transistor and a compensation structure. The compensation structure is coupled to the corresponding compensation signal line. An orthographic projection of the compensation structure onto the base substrate is located at a side of an orthographic projection of a gate electrode of the driving transistor onto the base substrate.

Abstract: Provided are a ligand compound of Formula 1 having a novel structure, which shows high catalyst activity and high selectivity to 1-hexene and 1-octene, and may perform ethylene oligomerization with excellent efficiency, an organochromium compound, a catalyst composition comprising the organochromium compound and a method for oligomerizing ethylene using the same, wherein all the variables are as described herein.

Abstract: Provided is a serial-type planar heat-generating heater and a manufacturing method thereof. In particular, the present invention relates to a serial-type planar heat-generating heater, which is capable of maximizing the effect of heating by minimizing dead zones in which heat is not generated, achieving a maximum power output in a limited area, unlike in a parallel-type heater, and achieving high temperature uniformity in all of heat-generating surfaces of the planar heat-generating heater, is easy to design to control heating performance, and may be manufactured at low costs; and a manufacturing method thereof.

Abstract: Provided are a method for preparing a catalyst composition for preparing a catalyst composition having improved catalyst activity by pre-treating a hydrogen-bonded lanthanide rare earth element compound and/or an oligomer type of a lanthanide rare earth element compound of Formula 1, which induce the deterioration of the catalyst activity, and a method for preparing a conjugated diene-based polymer using the catalyst composition prepared thereby, wherein all the variables are described herein.

Abstract: A memory device includes a substrate; a plurality of metallization layers disposed over the substrate; a plurality of memory cells, each of the plurality of memory cells including a transistor and a capacitor; and a bit line coupled to a corresponding set of the plurality of memory cells. The bit line comprises at least a first conductor structure and a second conductor structure that extend along a first lateral direction and are disposed in a first one of the plurality of metallization layers. The first conductor structure and the second conductor structure are physically spaced from each other, but are electrically coupled to each other through conductor structures disposed in one or more of the plurality of metallization layers.

Abstract: Provided is an encapsulant film composition; including an ethylene/alpha-olefin copolymer and a crosslinking aid comprises a compound represented by Formula 1 below, an encapsulant film, and a solar cell module thereof. When an encapsulant film is produced using the encapsulant film composition, the immersing time of an ethylene/alpha-olefin copolymer is reduced so that the economic viability of a process of producing an encapsulant film can be improved. In addition, the encapsulant film composition produced exhibits excellent crosslinking degree. wherein R1 to R6 are described herein.

Abstract: A method of fabricating a memory device at least includes the following steps. A first stack structure is formed above a substrate. The first stack structure includes a plurality of first insulating layers and a plurality of first conductive layers alternately stacked. A top layer of the first stack structure includes a plurality of anti-oxidation atoms therein. A second stack structure is formed on the first stack structure. The second stack structure includes a plurality of second insulating layers and a plurality of middle layers alternately stacked. A slit trench is formed to extend from the second stack structure to a top first conductor layer of the plurality of first conductor layers. A protective layer is formed on a sidewall of the top first conductive layer exposed by the slit trench. The memory device may be a 3D NAND flash memory with high capacity and high performance.

Abstract: A nanorod light-emitting device includes an n-type semiconductor layer, an active layer on the n-type semiconductor layer, and a p-type semiconductor layer on the active layer, and the n-type semiconductor layer includes a core rod, a plurality of nano pores opened in an outward direction from the core rod, and a plurality of quantum dots dispersed in the plurality of nano pores.

Abstract: A memory device includes: an interconnect structure, a staircase structure, a dielectric layer and a stop structure. The interconnect structure is located above a substrate. The staircase structure is located above the interconnect structure. The dielectric layer is located above the interconnect structure and covers the staircase structure. The stop structure is located between the interconnect structure and the staircase structure, and between the interconnect structure and the dielectric layer, and the stop structure has an opening exposing the interconnect structure. The first contact extends through the dielectric layer and the opening, and is connected to the interconnect of the interconnect structure. The middle width of the opening is not equal to the top width of the opening, or the middle width of the opening is not equal to the bottom width of the opening. The memory device may be 3D NAND flash memory with high capacity and high performance.

Abstract: Disclosed is an electrochemical device separator and an electrochemical device including the same. The separator includes a porous polymer substrate and a porous organic/inorganic composite coating layer formed on at least one surface of the polymer substrate, in which the porous coating layer includes particulate binder resins and inorganic particles, and [content of binder particles in an upper portion of a porous coating layer before impregnation with electrolyte/content of binder particles in a central portion of a porous coating layer before impregnation with electrolyte]?[content of binder particles in an upper portion of a porous coating layer after impregnation with electrolyte/content of binder particles in a central portion of a porous coating layer after impregnation with electrolyte] is 0.32 or less.

Abstract: A memory structure including a memory array is provided. The memory array is a block including six sub-blocks. The memory array includes string select line portions and ground select line portions. The string select line portions are arranged along a first direction. Each of the string select line portions is located in the corresponding sub-block. The ground select line portions are arranged along the first direction. Each of the ground select line portions is shared by only two corresponding sub-blocks. The memory structure may be a 3D NAND flash memory with high capacity and high performance.

Abstract: The present application may provide a pressure-sensitive adhesive, which is applied to a flexible device, thereby effectively responding to repeated deformation and recovery, causing no defects (for example, observation of deformation traces and the like) before and after deformation, having excellent cuttability and workability, and causing no lifting, delamination, and/or bubble generation, and a use thereof.

Abstract: A memory device includes a substrate, a bonding structure and bit lines. The substrate includes adjacent first and second regions. The bonding structure is over the substrate and includes a bonding dielectric layer and first and second bonding pads. The bonding dielectric layer is over the substrate in the first and the second regions. The first and second bonding pads are respectively embedded in the bonding dielectric layer over the substrate in the first and second regions. The bit lines are over the bonding structure and extend from the first region to the second region. A density of the first bonding pads in the first region is greater than a density of the second bonding pads in the second region. The memory device may be 3D NAND flash memory with high capacity and high performance.

Abstract: Embodiments provide a quantum dot, a method for preparing a quantum dot, and a light emitting element including the quantum dot. The method for preparing a quantum dot includes forming a core including a copper atom, an indium atom, a gallium atom, and a sulfur atom, and forming a shell surrounding the core by reacting the surface of the core with hydrofluoric acid, a Group II element precursor, and a Group VI element precursor.

Abstract: A multilayered semiconductor diode device can include a substrate including silicon carbide (SiC) with an epitaxial drift layer including a first semiconductor oxide material above the SiC substrate with respect to a growth direction. The multilayered semiconductor diode device can further include a polar nitride layer including a polar semiconductor nitride material above the epitaxial drift layer with respect to the growth direction, and a metal layer above the polar nitride layer with respect to the growth direction.