Abstract: The sleeve housing is made of a resilient plastic material, and it has a cylindrical end portion. The cylindrical portion is split, whereby the split portions can be deformed to allow for the insertion of an alignment sleeve containing an attenuating element. The internal portions of the deformable portion of the cylindrical outer portion of the sleeve housing include shoulders which will capture and retain the alignment sleeve when the alignment sleeve has been inserted into the end of the sleeve housing. Consequently, the sleeve housing is able to retain the alignment sleeve without the need for a separate retainer piece. An advantage of the present invention is that a ganged sleeve housing can be made in which there are several connectors which are formed adjacent to one another on a single molded assembly.

Abstract: The specification relates to a thermal shutdown circuit for an integrated circuit. Two matching thermal sensing resistors are used to develop a voltage representing the relative differential temperature between the two resistors. One resistor is fabricated within the integrated circuit dissipating device dielectric isolation tub and therefore its temperature closely follows the temperature of the dissipating device. The second thermal sensing resistor reflects the ambient temperature of the integrated circuit. A third thermal sensing device is used to obtain actual absolute temperature at the location of the second thermal sensing resistor. By algebraically adding a voltage representing actual absolute temperature at an ambient temperature location with a voltage representing the relative differential temperature between thermal sensing resistors, a voltage representing the actual absolute temperature of the dissipating device is produced.

Abstract: A method of chemical mechanical polishing (CMP) useful in the manufacture of integrated circuits is disclosed. Waste slurry is examined and its conductivity, luminescence, or particulate mass evaluated to determine an endpoint for the CMP operation.

Abstract: An optical cable 10 includes a core tube 120 containing optical fibers 101 that extend along the longitudinal axis 105--105 of the cable, and a plastic jacket 160 that encloses the core tube. The cable has a high tensile stiffness which is provided by load sharing between a pair of rigid strength rods 141, 142 and a flexible strength tape 130. The strength rods are coupled to the plastic jacket so that they receive tensile loads applied to the plastic jacket. The strength rods also have a compressive stiffness for inhibiting contraction of the plastic jacket when it is cooled. The tape is made from an array of flexible strands 131 that are woven into a single unit, which is also coupled to the plastic jacket. The flexible strands are woven in such a manner that they exhibit minimum undulation in the longitudinal direction. More particularly, the percent excess length of the flexible strands (.epsilon..sub.s) is less than the percent excess length of the optical fiber (.epsilon..sub.f) plus one percent i.e., .

Abstract: When a user has a portable telephone near the absolute end of its available battery power, the user can be caused to behave in a manner that more likely results in the preservation of some battery power for subsequent high priority high priority calls by conveying the illusion that the battery will soon be, or is, depleted even though there actually remains sufficient power in the battery to power the portable telephone for an additional period of time. To this end, at a predetermined time, e.g., two minutes, prior to a projected time at which the battery is expected to have power for only a particular additional amount of time, e.g., eight minutes, the user is signaled with an almost-out-of-power warning. This warning indicates that there remains in the battery enough power to operate the portable telephone only until the projected time, notwithstanding that there actually remains in the battery sufficient power to operate the portable telephone for the additional time beyond the projected time.

Abstract: An integrated circuit having a fast carry generation adder for adding together two input signals has an initial stage and two or more intermediate stages. The adder may also include a final stage. Each intermediate stage has a carry mux and these carry muxes are grouped together, for example, adjacent to the initial stage and adjacent to the first intermediate stage. By grouping the carry muxes together, for example, in a column below the initial stage, the fast carry generation adder may be both faster and smaller than conventional adders and may reduce or even eliminate the need for any buffering between successive carry muxes.

Abstract: A process for introducing negative charge onto the floating gate of an EPROM or EEPROM device is disclosed. The process uses CHISEL conditions to introduce charge onto the floating gate. The threshold voltage of the device is controlled by selecting a control gate voltage during programming that is less than 10 volts and that will provide a device with the desired threshold voltage. The device is then programmed using the selected control gate voltage and a negative substrate bias.

Abstract: An optical transceiver assembly for use in a bidirectional system includes a beam splitter to direct an incoming signal to a photodiode. An outgoing signal from a laser diode is partially transmitted and partially reflected by the splitter. The reflected signal, which may reach the photodiode, constitutes crosstalk which is reduced by orienting the polarization direction of the splitter essentially parallel to that of the outgoing signal from the laser diode. In another embodiment, which enhances coupling efficiency, a single element asphere lens is positioned between the laser diode and the splitter.

Abstract: An asymmetrical power converter and a method of operation thereof. According to a first aspect of the present invention, the asymmetrical converter includes (1) first and second transformers having serially-coupled primary windings and differing turns ratios; (2) a first power switch coupled to a first end of the serially-coupled primary windings; (3) a second power switch coupled to a node between the serially-coupled primary windings and (4) a capacitive element coupled to a second end of the serially-coupled primary windings to maintain a volts-second balance thereacross during alternate switching cycles of the first and second power switches.

Abstract: A primary stage optical switch assembly that is used in an optical fiber administration system where various levels of switching are used to interconnect an optical time domain reflectometer (OTDR) to individual optical fibers. The primary stage optical switch assembly contains an optical switch and a connector array disposed within a shelf structure. The shelf structure is sized to mount into one of the bays in the framework of the fiber administration system. The optical switch contained within the primary stage optical switch assembly is fabricated from electronic components and optical components. Most of the electronic components are manufactured as part of an electronic module. The optical components are manufactured as part of a separate optical module. Both modules mount within the shelf structure. However, the electronic module can be removed from the shelf structure without effecting the position of the optics module or the optical leads that extend from the optical module.

Abstract: A method and apparatus which allows the transmission of the perceptually important features of a speech-coding parameter at a low bit rate. The speech coding parameter may, for example, comprise the signal power of the speech. The parameter is processed on a block by block basis. The parameter value at the block boundaries is transmitted by conventional methods such as, for example, by means of differential quantization. The shape of the reconstructed parameter contour within block boundaries is based on a classification. The classification determines perceptually important features of the parameter contour within a block. The classification can be performed either at the transmitting end of the coder (using, for example, the original parameter contour with high time resolution and possibly other speech parameters as well) or at the receiving end of the coder (using, for example, the transmitted parameter values, and possibly other transmitted speech parameters as well).

Abstract: Coding systems that provide a perceptually improved approximation of the short-term characteristics of speech signals compared to typical coding techniques such as linear predictive analysis while maintaining enhanced coding efficiency. The invention advantageously employs a non-linear transformation and/or a spectral warping process to enhance particular short-term spectral characteristic information for respective voiced intervals of a speech signal. The non-linear transformed and/or warped spectral characteristic information is then coded, such as by linear predictive analysis to produce a corresponding coded speech signal. The use of the non-linear transformation and/or spectral warping operation of the particular spectral information advantageously causes more coding resources to be used for those spectral components that contribute greater to the perceptible quality of the corresponding synthesized speech.

Abstract: A method regulates the admission control of, and requests for routing of, virtual circuits in a network by determining network resource requirements for the virtual circuits. In particular, the network resource requirements are based on a set of parameters used to control the flow of information from a communications device onto the virtual circuit. The requirements for network resources typically include buffer space requirements in network nodes and bandwidth requirements in network links, and the parameter used to control the flow of information are those associated with an access regulator. The network resource determination is made for the case where lossless performance in the network is required and in the case where statistical multiplexing with limited loss is allowed. Both constant bit rate and variable bit rate information is considered.

Abstract: A substantially warp-free laminate polymeric film structure is obtained by a fabrication process in which the individual layers of polymeric film that are to be laminated together to form a card or similar structure are selected such that the mechanical properties of one layer or pair of layers are offset by those of another layer or layer pair wherein each polymeric film layer is bonded to its adjacent polymeric film layers by adhesive layers wherein the adhesive layers have a tack point temperature that is within 10.degree. C. of the glass transition temperature of said polymeric film layers. The properties of the layers which may be subject to this consideration include, for example, the layer thickness, tensile strength, elongation factor, shrinkage rate, and machine processing direction.

Abstract: A system and method for processing and managing electronic copies of handwritten notes are provided. The system includes a processor for processing the handwritten notes to generate the electronic copies, with each electronic copy associated with a respective identifier corresponding to at least one set of the respective handwritten notes, in which the identifiers facilitate the management of the electronic copies. The system includes an electronic notepad and can also include devices operatively connected to the electronic notepad for operating with the electronic notepad to receive, manage, merge, and/or display the electronic copies from the electronic notepad.

Abstract: Embodiments of the invention include a data receiving apparatus and method of a holographic or other page-wise memory system for processing information read from the memory system's storage medium. The data apparatus includes a multi-dimensional array of pixel elements comprised of pixel detectors and corresponding pixel circuit. The pixel detectors detect information such as light information representing data stored in the memory system. The pixel circuits determine a value representative of the information detected by the individual pixel detectors. Additionally, the apparatus includes active processing circuitry advantageously fabricated in conjunction with the pixel circuits to provide additional "on-chip" processing capabilities, including analog inter-pixel processing. The advantageous arrangement of the additional processing improves processing times, reduces the unprocessed data flow out of the apparatus, and reduces circuitry design space and cost.

Abstract: An improved control voltage generator for use with a voltage-controlled oscillator (VCO), so as to enable VCO operation at low supply voltages of less than three volts. The control voltage generator includes a phase comparator, a charge pump, a switched voltage multiplier, and a control voltage filter. The output voltage of the phase detector is coupled to a sampling terminal of the charge pump, a power supply terminal of the charge pump is coupled to an output terminal of the switched voltage multiplier, and a voltage input terminal of the switched voltage multiplier is coupled to a first, reference signal. The charge pump, powered from the power supply terminal, generates a waveform including a plurality of pulses. Each of the plurality of pulses has a time duration substantially proportional to the voltage present at the sampling terminal.

Abstract: A doped semiconductor distributed resistor is placed in series with the drain of a field effect transistor, typically for electrostatic discharge protection of an integrated circuit. The resistor is defined with a mask formed from the same conductor layer (e.g., polysilicon) that forms the transistor gate conductor. To avoid a floating gate, the conductor mask may be tied to the associated output bondpad. The advantages of using a gate conductor-defined resistor as compared to the prior-art practice includes better control of the resistor dimensions. Hence, the overall size of the output transistor and resistor may be reduced as compared to prior-art techniques, while achieving a high level of ESD protection.

Abstract: Glitchless switching between active and standby telecommunication apparatus having hierarchical nested parity bits is provided. A higher order parity bit is calculated based on defined data as well as a lower order parity bit. A method is provided for aligning each parity bit generated by a standby processor with a corresponding parity bit independently generated by an active processor. This alignment is accomplished prior to output frames of data being supplied by the standby processor in order to provide glitchless switching such that the first frame of data supplied by the standby processor contains parity bits which are in agreement with the corresponding data in the frame.