Abstract: A series-shunt switch is provided. The switch includes a PIN diode having an input electrical terminal, an output electrical terminal and a thermal terminal. The thermal terminal is configured to provide continuity of diode thermal ground with respect to a circuit thermal ground node.

Abstract: A diode having a first semiconductor region of a first polarity and a second semiconductor region of an opposite polarity at least partially surrounding the first semiconductor region. A metal contact coupled to the second semiconductor region at least partially surrounding the first semiconductor region. The diode offers improvements in switching speed.

Abstract: An apparatus includes an antenna (e.g., a monopole), a first load, and a second load. The antenna, which extends substantially along an axis, has a first end and a second end. The first load is coupled to the antenna at the first end, while the second load is coupled to the antenna between the first end and the second end. Both the first and second loads are symmetrical with reference to the axis. The apparatus is arranged to operate in at least two frequency bands, such as the AMPS band from about 824 MHz to 894 MHz and the PCS band from about 1850 MHz to 1990 MHz.

Abstract: A combined matching and harmonic rejection circuit with increased harmonic rejection provided by a split resonance for one or more of the capacitive or inductive elements of the circuit. At a fundamental frequency, the circuit comprises an inductive series arm with capacitive shunt arms. The capacitance of a shunt arm may be provided by two or more parallel paths, each having a capacitor and an inductor in series so that, in addition to providing the effective capacitance necessary for impedance matching at the fundamental frequency, two separate harmonics represented by the series resonances of the parallel paths are rejected. In this manner, an extra null in the circuit's stop-band may be achieved using the same number of shunt elements necessary to achieve impedance matching at the fundamental frequency.

Abstract: A circuit for combining/splitting first and second RF signals having different wavelengths of x and y, respectively, the circuit comprising: (a) first and second transmission portions coupled at an intersection, the first transmission portion comprising at least two intersecting transmission lines, each having a length which is an odd multiple of about ¼ y, the second transmission portion comprising at least two intersecting transmission lines, each having a length which is an odd multiple of about ¼ x; and (b) first, second and third ports, the first port located at the first transmission portion, the second port located at the intersection of the first and second transmission portions, and the third port being located at the second transmission portion, the first and second ports being electrically coupled, and the second and third ports being electrically coupled.

Abstract: The invention is a hermetically sealed semiconductor die package wherein a surface of the die can be positioned very close to the hermetic package and a method of fabricating such a package. The invention is particularly suited to hermetically sealed circuit components, such as dies with a light emitting surface or light receiving surface for which it would be desirable to place the light emitting or light receiving surface as close as possible to a transparent window in the package so as to maximize the amount of light that can be transmitted out of the package.

Abstract: A method of fabricating a plurality of layers of metal on a substrate depositing a first layer of metal on the substrate; depositing a first layer of planarization material over the substrate and first layer of metal to a depth above the top of the first layer of metal; polishing the first layer of planarization material down to at least the top of the first layer of metal; and depositing a second layer of metal on the first layer of metal and the first layer of planarization material.

Abstract: A surface mount package is provided that includes a first metal layer and a second metal layer configured to be electrically connected to the first metal layer. The surface mount package further includes a ceramic layer between the first and second metal layers. The ceramic layer has an opening therethrough.

Abstract: A PIN diode comprising an N-type substrate comprising a cathode of the PIN diode and having an intrinsic layer disposed upon the N-type substrate and having a top surface a P-type material disposed upon the top surface of the intrinsic layer comprising an anode of the PIN diode and a N-type material disposed over the sidewall of the cathode and over the sidewall and a portion of the top surface of the intrinsic material that is not occupied by the anode, wherein a horizontal gap is defined between the anode and the cathode through the intrinsic material, the gap being variable in width and/or the horizontal gap is less than the thickness of the intrinsic layer.

Abstract: A system and method for detecting the presence and precise location of a device bearing a radio frequency identification (RFID) tag comprising a plurality of resonators, a first circuit for driving the plurality of resonators with a low frequency drive signal for exciting nearby RFID tags via magnetic field excitation, a multiplexer having a plurality of input terminals, each input terminal coupled to one of the plurality of resonators, and an output terminal, and a signal processing circuit coupled to the output terminal of the multiplexer for reading the signals of the resonators and determining the identification of any RFID tags excited by the resonators.

Abstract: Various techniques involving polar modulation are disclosed. For instance, an apparatus may include a storage medium and a calibration module. The storage medium stores multiple adjustment settings. Each of these adjustment settings corresponds to an operating condition. The calibration module selects one of the stored adjustment settings that corresponds to a current operating condition. With the selected adjustment setting, the calibration module reduces a polar modulation timing misalignment. The current operating condition may include one or more operational parameter values. Examples of such parameter values include output power level, signal frequency, and/or temperature.

Abstract: The invention is directed to a system for adaptively re-aligning a modulated output signal having an error component by generating a reference phase signal using a phase input signal; generating a sample phase signal from the output signal; comparing the reference and sample signals; and adaptively re-aligning any difference between the reference and sample signals to substantially reduce the error component.

Abstract: An apparatus for electromagnetic processing comprises a modulator for generating one or more elements representative of an input signal; a divider controlled by the one or more elements and receiving an electromagnetic wave to generate a modified signal; a comparator for comparing the modified signal to a reference signal and for generating a processed signal based upon the comparison; and a channel number calculator for selecting a channel for the processed signal, wherein the input signal incorporated the channel selection.

Abstract: A method for reliable communication within a digital trunked radio system having a digital control channel and a plurality of working channels, wherein said working channels are assigned for temporary use by a subset of radio units by digital control signals transmitted over said control channel, said control channel carrying outbound digital control signals from a base site to said radio units, said outbound digital control signals having a fixed transmission time slot, said method comprising the steps of: (a) transmitting a first message and a second message, each 28 bits in length, within said time slot; (b) defining at least one first message type identifier field within said first message; (c) defining a group identifier in said first message, said group identifier comprising from greater than 11 up to 16 bits; (d) defining at least one second message type identifier field within said second message; (e) defining a logical identifier in said second message, said logical identifier comprising from greater

Abstract: Techniques to reduce signal amplitude peak-to-average ratio (PAR) in a wireless communications system are described. The apparatus may include a signal conditioning module to receive a baseband signal. The signal conditioning module may split the baseband signal along multiple paths, delay one or more of the paths, and combine the multiple paths to form a conditioned signal having lower signal amplitude PAR than the baseband signal. Other embodiments are described and claimed.

Abstract: Various embodiments are directed to providing an electronic device with an integrated thermal heat spreader. In one embodiment, an electronic device may comprise an integrated circuit fabricated on a substrate and a heat spreader integrated with the electronic device after fabrication of the integrated circuit. The heat spreader may comprise one or more layers of composite plating material including solid particles incorporated into a metal plating material. The composite plating material may be patterned to the substrate to define the heat spreader. Other embodiments are described and claimed.

Abstract: Apparatus, method and article of manufacture are shown for linear signal modification. An input signal is modified by providing one or more non-linear current sources and regulating at least one of the one or more current sources to output a signal based on one or more of the input signal characteristics. The modification of the output signal includes both amplification and attenuation.

Abstract: A microphone unit comprising a voice input for receiving a voice input signal, an analog to digital converter for creating a digital signal from voice signal, a voice coding device for creating a voice coded signal output from the digital signal, encryption means for encrypting the voice coded signal, and a modulator for generating a transmittable signal that can be supplied to a radio via the microphone input. Additionally, the microphone unit is capable of performing the steps in reverse upon receiving an encrypted signal. The received signal output from the radio is demodulated, un-encrypted, voice decoded, converted from a digital voice signal to an analog voice signal, and output via a speaker which is preferably built into the microphone unit.

Abstract: The present invention is a system and a method of filtering a signal at a receiver, the signal having at least a desired channel and blockers. A first converter converts a first copy of the signal resulting in a relatively narrow band, high-resolution first signal. A second converter converts a second copy of the signal resulting in a relatively wide band, low-resolution second signal. Once each copy of the signal is converted, the copies are passed to a combiner. At the combiner, the two copies of the signal are analyzed and the desired channel is extracted from the first copy of the signal by removing any inter-modulation product caused by any interference detected in the second copy from the blockers (not detected in the first copy).

Abstract: Various embodiments are directed to providing constant phase digital attenuation. In one embodiment, a digital attenuator circuit comprises an input node to receive an input signal to be attenuated, an output node to output an attenuated signal, a reference loss path between the input node and the output node, and an attenuation path between the input node and the output node. The reference loss path comprises switching elements and matching circuitry to improve Voltage Standing Wave Ratio (VSWR), and the attenuation path comprises switching elements and attenuating circuitry to attenuate the input signal when the digital attenuator circuit is switched from a reference loss state to an attenuation state. An effective phase length of the reference loss path and an effective phase length of the attenuation path may be equalized to provide a constant phase when the digital attenuator circuit is switched between states. Other embodiments are described and claimed.