Abstract: Direct memory access (‘DMA’) in a hybrid computing environment that includes a host computer, an accelerator, the host computer and the accelerator adapted to one another for data communications by a system level message passing module, where DMA includes identifying, by the system level message passing module, a buffer of data to be transferred from the host computer to the accelerator according to a DMA protocol; segmenting, by the system level message passing module, the buffer of data into a predefined number of memory segments; pinning, by the system level message passing module, the memory segments against paging; and asynchronously with respect to pinning the memory segments, effecting, by the system level message passing module, DMA transfers of the pinned memory segments from the host computer to the accelerator.

Abstract: A switchable element. The element includes a source electrode, a drain electrode, a conducting channel between the source electrode and the drain electrode, and a gate with multiferroic material being switchable, by application of an electrical signal to the gate, between a first switching state with a first spontaneous polarization direction and a second switching state with a second spontaneous polarization direction. The conducting channel is magnetoresistive, and a magnetic field strength at the conducting channel in the first switching state is different than a magnetic field strength in the second switching state, whereby a current-voltage characteristic of the conducting channel is dependent on the switching state of the multiferroic material.

Abstract: Disclosed is a circuit configured to synchronize multiple signals received by one clock domain from a different asynchronous clock domain, when simultaneous movement of the signals between the clock domains is intended. In the circuit multiple essentially identical pipelined signal paths receive digital input signals. XOR gates are associated with each of the signal paths. Each XOR gate monitors activity in a given signal path and controls, directly or indirectly (depending upon the embodiment), advancement of signal processing in the other signal path(s) to ensure that, if warranted, output signals at the circuit output nodes are synchronized. In a two-signal path embodiment, advancement of signal processing in one signal path is triggered, whenever transitioning digital signals are detected within the other signal path. In an n-signal path advancement of signal processing is triggered in all signal paths, whenever transitioning digital signals are detected on at least one signal path.

Abstract: The present invention relates to semiconductor devices, and more particularly to a structure and method for forming memory cells in a semiconductor device using a patterning layer and etch sequence. The method includes forming trenches in a layered semiconductor structure, each trench having an inner sidewall adjacent a section of the layered semiconductor structure between the trenches and an outer sidewall opposite the inner sidewall. The trenches are filled with polysilicon and the patterning layer is formed over the layered semiconductor structure. An opening is then patterned through the patterning layer, the opening exposing the section of the layered semiconductor structure between the trenches and only a vertical portion of the polysilicon along the inner sidewall of each trench. The layered semiconductor structure is then etched. The patterning layer prevents a second vertical portion of the polysilicon along the outer sidewall of each trench from being removed.

Abstract: A Dynamic Meeting Group Organizer automatically creates sub-groups from a group of responders to a meeting invitation sent by email by determining a number of subgroups and a subgroup size parameter; determining a question and a criteria associated with the question to create a survey; determining a list of invitees and a response date by which an invitee is to return a completed survey; sending a plurality of invitations with the survey attached to each invitee on the list; accumulating a plurality of responses to the questionnaire in a response file; and accessing the response file and automatically processing the plurality of responses by organizing the list of invitees into a plurality of subgroups according to each invitee's response to the question and the subgroup size parameter.

Abstract: A user can log into an organization portal. An organizational role can be determined for the user. For a decision maker, a set of metric driven portlets can be graphically presented within the organization portal. The metrics driven portlets can include at least one scorecard and at least one dashboard, each tailored for the determined organizational role. The scorecard and the dashboard can be dynamically updated based upon metrics provided by a plurality of discrete services. The discrete services can obtain the metrics from a set of geographically distributed data sources. The discrete services can be functionally independent of each other and can be responsible for federating data in a portlet and role specific manner. Online collaboration capabilities can be provided through collaboration and alerting portlets of the organization portal, and which can be tailored for the determined organizational role.

Abstract: An apparatus for cooling a heat-generating component is disclosed. The apparatus includes a cooling chamber containing a liquid metal. The cooling chamber has a heat-conducting wall thermally coupled to the heat-generating component. A plurality of extendable tubes making up an array of cooling pin fins is attached to the cooling chamber. Each of the extendable tubes has a port end that opens into the cooling chamber and a sealed end that projects away from the cooling chamber. Moreover, each of the extendable tubes has an extended position when filled with liquid metal from the cooling chamber and a retracted position when emptied of the liquid metal. A pump system is included for urging the liquid metal from the cooling chamber into the plurality of extendable tubes.

Abstract: A phase change memory device includes a memory cell, first word line conductor and a second word line conductor, and first and second access devices responsive to the first and second word line conductors respectively. Control circuits are arranged to access the memory cell for read operations using only the first word line conductor to establish a current path from the bit line through the memory cell to a source line through the first access device, and to access the memory cell for operations to reset the memory cell using both the first and second access devices to establish a current path from the bit line through the memory cell to two source lines.

Abstract: In a method of mitigating hysteresis effect in a sense amplifier circuit, a data value is sensed from a data source with the sense amplifier during a first period. The data value is stored in a latch. The data valued stored in the latch is inverted, thereby generating an inverted data value. The data source is isolated from the sense amplifier and the inverted data value is read with the sense amplifier during a second period immediately following the first period.

Abstract: A system and method is provided for avoiding duplication of effort in drafting documents and, in particular, to a system and method for avoiding duplication of effort in preparing patent related submissions. The method is implemented on a computer infrastructure comprises storing disclosure information related to non-public proprietary innovation and receiving terms associated with an innovation. The method further comprises matching the terms with the stored disclosure information and providing an alert to a user that certain of the terms overlap with the stored disclosure information.

Abstract: The present invention relates to improved methods and structures for forming interconnect patterns in low-k or ultra low-k (i.e., having a dielectric constant ranging from about 1.5 to about 3.5) interlevel dielectric (ILD) materials. Specifically, reduced lithographic critical dimensions (CDs) (i.e., in comparison with target CDs) are initially used for forming a patterned resist layer with an increased thickness, which in turn allows use of a simple hard mask stack comprising a lower nitride mask layer and an upper oxide mask layer for subsequent pattern transfer. The hard mask stack is next patterned by a first reactive ion etching (RIE) process using an oxygen-containing chemistry to form hard mask openings with restored CDs that are substantially the same as the target CDs. The ILD materials are then patterned by a second RIE process using a nitrogen-containing chemistry to form the interconnect pattern with the target CDs.

Abstract: A method of manufacturing dual embedded epitaxially grown semiconductor transistors is provided, the method including depositing a first elongated oxide spacer over first and second transistors of different types, depositing a first elongated nitride spacer on the first oxide spacer, depositing a first photoresist block on the nitride spacer above the first transistor, etching the first nitride spacer above the second transistor, implanting a first halo around the second transistor, etching a first recess in an outer portion of the first halo, stripping the first photoresist above the first transistor, forming a first epitaxially grown semiconductor material in the first recess, implanting a first extension in a top portion of the first material, depositing an elongated blocking oxide over the first and second transistors and first extension, depositing a second photoresist block on the blocking oxide above the second transistor and first extension, etching the blocking oxide and first nitride spacer above th

Abstract: Techniques for automated pricing of an item are provided. The techniques include obtaining historical data of one or more previous purchases for the item, performing a regression on the historical data, and using the regression to obtain a buying price and a selling price for the item.

Abstract: A technique for updating elements in a data storage facility, including a single server or a multi-server system, such as by providing updated internal code packages to the elements. The update is performed using a fixed state machine, where the elements are updated in a coordinated manner within the constraints of the state machine. In a multi-server device, code packages are distributed to elements associated with the different servers in one traversal of the state machine, during distribute states of the state machine. The distributed code packages are activated in activate states of the state machine in multiple traversals of the state machine, so there is a serial activation. The code packages can be grouped in a flexible way by configuring an external update bundle used by the state machine. The distributing of the code is based on the grouping.

Abstract: Each of a hot-carrier non-volatile memory device and a method for fabricating the hot carrier non-volatile memory device is predicated upon a semiconductor structure and related method that includes a metal oxide semiconductor field effect transistor structure. The semiconductor structure and related method include at least one of: (1) a spacer that comprises a dielectric material having a dielectric constant greater than 7 (for enhanced hot carrier derived charge capture and retention); and (2) a drain region that comprises a semiconductor material that has a narrower bandgap than a bandgap of a semiconductor material from which is comprised a channel region (for enhanced impact ionization and charged carrier generation).

Abstract: A method, a system and a computer program product are directed towards determination of a variable toll for a particular target vehicle using a particular point-to-point travel segment of a particular toll road. The variable toll is calculated predicated upon a deviation of an instantaneous point-to-point traffic volume for the particular target vehicle exiting the toll road in comparison with an arbitrarily determined baseline point-to-point traffic volume. The instantaneous point-to-point traffic volume includes vehicles traveling at least a portion of the same point-to-point travel segment as the target vehicle during an effective time interval when the target vehicle traveled the point-to-point travel segment.

Abstract: A method, computer program product, and system are disclosed for dynamically provisioning clusters of middleware appliances. In one embodiment, the method includes referencing a resource measurement from a plurality of middleware appliances. The middleware appliances process one or more service domains and the resource measurement includes processing resources consumed by each middleware appliance for each of the one or more service domains. The method may also include determining an implementation plan based on a performance goal and one or more resource calculations. The implementation plan specifies service domain instances to activate and service domain instances to deactivate on the plurality of middleware appliances. The method may also include dynamically enabling and disabling the service domain instances on the plurality of middleware appliances based on the implementation plan.

Abstract: A semiconductor structure includes an epitaxial surface semiconductor layer having a first dopant polarity and a first crystallographic orientation, and a laterally adjacent semiconductor-on-insulator surface semiconductor layer having a different second dopant polarity and different second crystallographic orientation. The epitaxial surface semiconductor layer has a first edge that has a defect and an adjoining second edge absent a defect. Located within the epitaxial surface semiconductor layer is a first device having a first gate perpendicular to the first edge and a second device having a second gate perpendicular to the second edge. The first device may include a performance sensitive logic device and the second device may include a yield sensitive memory device.

Abstract: Compositions characterized by the presence of an aqueous base-soluble polymer having aromatic moieties and aliphatic alcohol moieties have been found which are especially useful as developable bottom antireflective coatings in 193 nm lithographic processes. The compositions enable improved lithographic processes which are especially useful in the context of subsequent ion implantation or other similar processes where avoidance of aggressive antireflective coating removal techniques is desired.

Abstract: A hierarchical fanout connectivity infrastructure is built and used to start a parallel application within a parallel computing environment. The connectivity infrastructure is passed to a checkpoint library, which employs the infrastructure and a defined sequence of events, to perform checkpoint, restart and/or migration operations on the parallel application.