Patents Assigned to Machines Corporation
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Publication number: 20030196172Abstract: A computer system and method display internal and external hypertext link definitions in different representations to simplify a user's recognition of the external/internal status of each hypertext link definition in a document. Additional information, such as the direction from an internal hypertext link definition to the location in the document pointed to by that definition, and/or the absolute or relative position of the location pointed to by an internal hypertext link definition, may also be displayed. Moreover, a computer system and method may also display the position of the location pointed to by an internal hypertext link definition on a scroll bar such that location information about a particular document is centralized within a common user interface component.Type: ApplicationFiled: May 7, 2003Publication date: October 16, 2003Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Cary L. Bates, Paul R. Day
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Publication number: 20030196183Abstract: A method of designing the layout of an integrated circuit (IC) by deriving an analytical constraint for a cut-based placement partitioner using analytical optimization, and placing cells on the IC with the cut-based placement partitioner using the analytical constraint. Quadratic optimization may be used to determine a desired ratio of a cell area of a given partition to a total cell area (the balance parameter), and placing may be performed using multilevel bisection partitioning constrained by the balance parameter. This implementation may include a determination of an aspect ratio for an entire partitioning region of the integrated circuit, and a “center-of-mass” coordinate of the cells based on the quadratic optimization, which are then used to define a placement rectangle having the same aspect ratio, and centered on the center-of-mass coordinate. This placement rectangle is used to derive the balance parameter.Type: ApplicationFiled: April 11, 2002Publication date: October 16, 2003Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Charles J. Alpert, Gi-Joon Nam, Paul G. Villarrubia
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Publication number: 20030195777Abstract: A service element is defined and represented by a data structure. It includes one or more components and/or one or more other service elements. A service element providing a complete function is a service offering. Management of service elements and/or service offerings is facilitated by a Service Development Tool. In different aspects, the management includes various tasks associated with creating, modifying and deleting service elements, establishing relationships, error checking and optimization. In a further aspect, service elements are packaged and distributed to enable customers to deliver the service elements. Additionally, the hosting of software packages is facilitated.Type: ApplicationFiled: April 12, 2002Publication date: October 16, 2003Applicant: International Business Machines CorporationInventors: Paul G. Greenstein, Galina Grunin, Gregory Leytes, Luu Q. Nguyen
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Publication number: 20030196137Abstract: A method, system and computer program product for implementing a fault tolerant sleep mode of operation. The system state information may be stored in a volatile memory and in a non-volatile storage unit prior to entering the sleep mode of operation. If a memory corruption event, e.g., power outage, brownout, power surge, occurs during the sleep mode of operation, then, upon receiving an invocation to resume to a normal mode of operation, the system state information stored in the non-volatile storage unit may be reloaded into the volatile memory. By reloading the system state information stored in the non-volatile storage into the volatile memory, the computer system may resume to a normal mode of operation from a sleep mode of operation without any corruption or loss of data.Type: ApplicationFiled: April 12, 2002Publication date: October 16, 2003Applicant: International Business Machines CorporationInventors: Nazir Haroon Ahmad, Ameha Aklilu, Jordan Hsiao Ping Chin, Richard Alan Dayan, James Patrick Hoff, Eric Richard Kern
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Publication number: 20030195709Abstract: Method and apparatus for monitoring and controlling electrical current delivered to a computer subsystem are provided. One embodiment provides a method for detecting a short circuit in a computer subsystem, comprising: obtaining a measured current which is supplied to the computer subsystem during one or more time periods; determining an expected current utilized by the computer subsystem for the one or more time periods; and determining whether a short circuit condition exists based on a comparison between the measured current and the expected current. The method may further comprise terminating electrical power supplied to the computer subsystem.Type: ApplicationFiled: April 11, 2002Publication date: October 16, 2003Applicant: International Business Machines CorporationInventor: Paul William Rudrud
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Publication number: 20030196015Abstract: An adaptive spin latch system is provided for use in a multiprocessor computer system. The spin latch system includes a run queue, a spin latch module and a wait queue. The run queue is adapted to store agent index data correlated to at least one agent in run mode. The spin latch module is adapted to put the at least one agent into sleep mode for a period of time correlated to a number of agents awaiting access to a resource. The wait queue is adapted to store agent index data correlated to the at least one agent in sleep mode. A method of regulating access by agents to a resource in a multiprocessor computing system is also provided.Type: ApplicationFiled: September 12, 2002Publication date: October 16, 2003Applicant: International Business Machines CorporationInventors: Joseph Serge Limoges, Dominique J. Evans, Dale J. Hagen, Matthew A. Huras, Stephen A. Schormann, Mark F. Wilding
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Publication number: 20030195763Abstract: A method and system is proposed for managing a workflow distributed among at least two participating entities by means of respective distinct computer-based workflow management systems in each entity. Each workflow management system manages a respective workflow part of the distributed workflow. A common specification of the distributed workflow is defined as a reference by the workflow management systems. The common workflow specification specifies which workflow management system is in charge of managing which workflow part. Additionally, within each workflow management system a respective image of the distributed workflow is created, based on which the workflow management system of one entity is notified of the progress of the workflow part managed by the other workflow management system. In the notified workflow management system, an indication of progress on the distributed workflow image is kept updated in line with the progress of the workflow part managed by the other workflow management system.Type: ApplicationFiled: November 4, 2002Publication date: October 16, 2003Applicant: International Business Machines CorporationInventors: Ceki Gulcu, Yigal Hoffner, Heiko Ludwig
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Publication number: 20030196127Abstract: A method and apparatus are disclosed for managing power consumption of a processing unit having an operating system (OS) or software system and access to at least one hardware timer. Power is saved by putting the processing unit into one of at least two low power states when the OS or software system is not expected to do work. A time period for which the software system is not expect to perform work is determined, and a determination is made as to which one of at least two low power states to put the processing unit in, in response to said time period. The hardware timer is configured to facilitate waking up the software system or OS in time for it to perform expected work. The processing unit and software system are transitioned into the chosen low power state. They are transitioned out of the low power state in response to a hardware interrupt.Type: ApplicationFiled: April 11, 2002Publication date: October 16, 2003Applicant: International Business Machines CorporationInventor: Claus Michael Olsen
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Publication number: 20030196192Abstract: The placement of trace points in software code being developed in a software development tool leads to the generation of trace point messages when the code is executed. These trace point messages are listened for by aspects of the software development tool. Responsive to receiving one of the trace point messages, the software development tool may write information to a trace file. Advantageously, the trace file is formatted using a standard markup language format, such as HTML. Consequently, the trace file is readily readable (including information-conveying formatting) by a standard, freely available web browser, rather than a proprietary tool.Type: ApplicationFiled: April 10, 2003Publication date: October 16, 2003Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Brad J. Barclay, Emad Boctor, Andrew W. Hilden, Darin C. McBride
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Publication number: 20030193058Abstract: Device designs and methods are described for incorporating capacitors commonly used in planar CMOS technology into a FinFET based technology. A capacitor includes at least one single-crystal Fin structure having a top surface and a first side surface opposite a second side surface. Adjacent the top surface of the at least one Fin structure is at least one insulator structure. Adjacent the at least one insulator structure and over a portion of the at least one Fin structure is at least one conductor structure. Decoupling capacitors may be formed at the circuit device level using simple design changes within the same integration method, thereby allowing any number, combination, and/or type of decoupling capacitors to be fabricated easily along with other devices on the same substrate to provide effective decoupling capacitance in an area-efficient manner with superior high-frequency response.Type: ApplicationFiled: April 12, 2002Publication date: October 16, 2003Applicant: International Business Machines CorporationInventors: David M. Fried, Edward J. Nowak
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Patent number: 6634023Abstract: The present invention enables re-ordering of instructions to be executed while assuring a precise exception. In Java language, an optimization process of re-ordering instructions to be executed is performed by Just-In-Time compiler. For instance, the instructions lining in order from instruction E1 which was moved forward to instruction S2which had been located before E1 is registered as interrupt inhibited section R1, and from instruction S4 which was moved forward to instruction S3 which had been located before S4 is registered as interrupt inhibited section R2 (S is an instruction which has an affect observable from the outside at the execution, and E is an instruction which may cause an exception). Also, in FIG. 7, S4 which was an instruction behind E1 in the original order is registered as R1's instruction invalid at an exception. If E1 causes an exception, an interrupt handler is activated and the instructions of interrupt inhibited section R1 are copied to another area.Type: GrantFiled: June 16, 1999Date of Patent: October 14, 2003Assignee: International Business Machines CorporationInventors: Hideaki Komatsu, Takeshi Oqasawara
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Patent number: 6633838Abstract: The system and method of the present invention is embodied in a multi-state on-chip logic analyzer that is preferably integrated into a VLSI circuit. In general, the logic analyzer is preferably coupled to a multilevel trace array for storing event trace data generated by the logic analyzer. Input and output logic coupled to both the trace array and the logic analyzer allows reading or writing from or to the trace array, and programming of trigger and condition criteria for transitioning states within the logic analyzer. The logic analyzer has the capability match one or more programmable trigger events to satisfy one or more programmable conditions. Further, the logic analyzer preferably has the capability to initialize programmable conditions in desired states, and to store event trace data in an on-chip array for trace data reconstruction and analysis.Type: GrantFiled: November 4, 1999Date of Patent: October 14, 2003Assignee: International Business Machines CorporationInventors: Lakshminarayana Baba Arimilli, Michael Stephen Floyd, Larry Scott Leitner, Kevin F. Reick, Jennifer Lane Vargus
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Patent number: 6633040Abstract: A magnetic lens employs a solenoid field containing a passive pole piece that shapes the solenoid field to create a demagnifying lens that has very low geometrical aberrations by adjusting the field upstream and downstream of the gap between the pole pieces to create a negative term in the formula for spherical aberrations, subtracting a significant amount from the contribution to the aberrations that comes from the field in the gap.Type: GrantFiled: April 25, 2002Date of Patent: October 14, 2003Assignee: International Business Machines CorporationInventors: Hans C. Pfeiffer, Maris A. Sturans
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Patent number: 6633452Abstract: A hard disk drive apparatus is capable of reducing a noise effectively during operation and capable of enhancing the reliability of the drive. The hard disk drive has first and second ribs that are formed near a pivot for an actuator so that a tilt of the pivot is prevented when the actuator is operated. Also, vibration absorbing members are interposed between the first and second ribs on the side of a base and a cover so that the vibration absorbing members are brought into contact with the cover. These vibration absorbing members are located in an intermediate portion between fixing places for fixing the cover to the base and a fixing place for fixing the cover to the pivot.Type: GrantFiled: October 5, 2001Date of Patent: October 14, 2003Assignee: International Business Machines CorporationInventors: Yoshihiro Hirasaka, Keishi Takahasi, Kohji Serizawa, Mutsuro Ohta
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Patent number: 6631548Abstract: Methods for adjusting the curvature of a slider may include providing a first slider including an air bearing surface and a back surface opposite the air bearing surface. The camber and crown of the first slider are measured, and a plurality of scribes are made at positions on the back surface of the first slider. The change in camber and crown due to each scribe on the first slider is measured. The scribe position and change in crown and camber per position is recorded in a data structure. A second slider is provided, the second slider including an air bearing surface and a back surface opposite the air bearing surface. The camber and crown of the second slider are measured. A desired amount of change in crown and camber is determined. Scribe positions are selected based on information from the data structure so that the desired amount of change in crown and camber will be obtained. The back surface of the second slider is scribed at the selected scribe positions.Type: GrantFiled: July 27, 2001Date of Patent: October 14, 2003Assignee: International Business Machines CorporationInventors: Ping-Wei Chang, Chie Ching Poon, Andrew C. Tam
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Patent number: 6632314Abstract: A method of making a surface planarization is provided using a separate pre-cut or precured film laminated onto a metallized surface to form planarized dielectric coating. The method comprises the steps of: (a) providing a thin film interconnect module with a polyimide adhesive laminated with a pre-cut or pre-cured polyimide lamination film on the top of the polyimide adhesive, the polyimide lamination film being covered with a glass plate; (b) applying pressure and heat in a synchronized format to ensure a uniform curing and gap filling in the thin film module metal for the adhesive layer; and (c) releasing the glass plate to expose a smooth lamination film surface.Type: GrantFiled: December 29, 1999Date of Patent: October 14, 2003Assignee: International Business Machines CorporationInventors: RongQing Yu, Kimberley A. Kelly, Chandrika Prasad, Sung Kwon Kang, Sampath Purushothaman
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Patent number: 6634020Abstract: In the present invention, a special purpose watch function is used to find reference to uninitialized memory within a computer program during debugging. The uninitialized memory watch may be implemented singularly with respect to a given memory allocation or as a watchpoint wherein a watch is set on a memory space for each instance of a memory allocation during execution of a program. At the point where this watch is set, the program assumes that the memory targeted is uninitialized. When storage to the target memory is made, the watch function marks that segment of memory as initialized and permits continued program execution. Upon detecting a reference to the memory, a determination is made as to whether the watched memory space is initialized.Type: GrantFiled: March 24, 2000Date of Patent: October 14, 2003Assignee: International Business Machines CorporationInventors: Cary Lee Bates, Victor John Gettler
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Patent number: 6632377Abstract: Copper or a copper alloy is removed by chemical-mechanical planarization (CMP) in a slurry of an oxidizer, an oxidation inhibitor, and an additive that appreciably regulates copper complexing with the oxidation inhibitor.Type: GrantFiled: September 30, 1999Date of Patent: October 14, 2003Assignee: International Business Machines CorporationInventors: Vlasta Brusic, Daniel C. Edelstein, Paul M. Feeney, William Guthrie, Mark Jaso, Frank B. Kaufman, Naftali Lustig, Peter Roper, Kenneth Rodbell, David B. Thompson
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Patent number: 6633055Abstract: A gap conductor structure for an integrated electronic circuit that may function as an electronic fuse device or as a low capacitance inter level signal line is integrated as part of the semi-conductor chip wiring. The gap conducting structure includes one or more air gap regions of predefined volume that fully or partially exposes a length of interlevel conductor layer in an IC. Alternately, the air gap region may wholly located within the dielectric region below a corresponding conductor and separated by insulator. When functioning as a fuse, the gap region acts to reduce thermal conductivity away from the exposed portion of the conductor enabling generation of higher heat currents in the conducting line with lower applied voltages sufficient to melt a part of the conducting line. The presence of gaps, and hence, the fuses, are scalable and may be tailored to the capacity of currents they must carry with the characteristics of the fuses defined by a circuit designer.Type: GrantFiled: April 30, 1999Date of Patent: October 14, 2003Assignee: International Business Machines CorporationInventors: Claude L. Bertin, Erik L. Hedberg, Max G. Levy, Timothy D. Sullivan, William R. Tonti
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Patent number: 6633922Abstract: This present invention incorporates the benefits of the function shipping, page shipping and class shipping remote object access models into a single, industry standard programming model. The fundamental mechanism of the present invention is an underlying shipper mechanism, which dynamically selects and updates the remote object access method being employed for any given access based on the most desirable method available at the time of the object access. The shipper mechanism dynamically decides which underlying access mechanism to use based on (1) object access policy rules, and (2) system operational loads and network traffic heuristics. The shipper is further capable of transparently switching from one access model to another while an object access is on-going.Type: GrantFiled: December 15, 1997Date of Patent: October 14, 2003Assignee: International Business Machines CorporationInventors: Anthony Edward Brock, Steven Jay Munroe