Abstract: The present invention is generally directed to a system and process for rotating semiconductor wafers in thermal processing chambers, such as rapid thermal processing chambers and chemical vapor deposition chambers. In accordance with the present invention, a semiconductor wafer is supported on a substrate holder which, in turn, is supported on a rotor. During processing, the rotor is magnetically levitated and magnetically rotated by suspension actuators and rotation actuators positioned outside of the chamber.

Abstract: An apparatus for heat treating semiconductor wafers is disclosed. The apparatus includes a heating device which contains an assembly of light energy sources for emitting light energy onto a wafer. The light energy sources can be placed in various configurations. In accordance with the present invention, tuning devices which are used to adjust the overall irradiance distribution of the light energy sources are included in the heating device. The tuning devices can be either active sources of light energy or passive sources which reflect, refract or absorb light energy. For instance, in one embodiment, the tuning devices can comprise a lamp spaced from a focusing lens designed to focus determined amounts of light energy onto a particular location of a wafer being heated.

Abstract: Electroless plating solutions are disclosed for forming metal alloys, such as cobalt-tungsten alloys. In accordance with the present invention, the electroless plating solutions may be formulated so as not to contain any alkali metals. Further, the solutions can be formulated without the use of tetramethylammonium hydroxide. In a further embodiment, a plating solution can be formulated that does not require the use of a catalyst, such as a palladium catalyst prior to depositing the metal alloy on a substrate.

Abstract: A method of processing a wafer includes placing a wafer atop a wafer chuck, wherein the chuck has a base and an upper body in which the upper body is coupled to the base by a flexible coupling that allows the upper body to tilt relative to the base. The wafer is engaged to a hollow sleeve and forms a floor creating an enclosed vessel to retain a processing fluid. Once the vessel is filled, the wafer is then processed utilizing the processing fluid. Further, the wafer tilts allowing for a compliant engagement of the wafer and the sleeve to prevent or reduce leakage of the processing fluid.

Abstract: A method and apparatus for heating semiconductor wafers in thermal processing chambers is disclosed. The apparatus includes a non-contact temperature measurement system that utilizes radiation sensing devices, such as pyrometers, to determine the temperature of the wafer during processing. The radiation sensing devices determine the temperature of the wafer by monitoring the amount of radiation being emitted by the wafer at a particular wavelength. In accordance with the present invention, a spectral filter is included in the apparatus for filtering light being emitted by lamps used to heat the wafer at the wavelength at which the radiation sensing devices operate. The spectral filter includes a light absorbing agent such as a rare earth element, an oxide of a rare earth element, a light absorbing dye, a metal, or a semiconductor material.

Abstract: A system for heating a plurality of semiconductor wafers at the same time is disclosed. the apparatus includes a thermal processing chamber containing a substrate holder designed to hold from about three to about ten wafers. The thermal processing chamber is surrounded by light energy sources which heat the wafers contained in the chamber. The light energy sources can heat the wafers directly or indirectly. In one embodiment, the thermal processing chamber includes a liner made from a heat conductive material. The light energy sources are used to heat the liner which, in turn, heats the wafers. In an alternative embodiment, energy dispersing plates are placed in between adjacent wafers. Light energy being emitted by the light energy sources enters the energy dispersing members and gets distributed across the surface of adjacent wafers for heating the wafers uniformly.

Abstract: An apparatus for heat treating semiconductor wafers is disclosed. The apparatus includes a heating device which contains an assembly of light energy sources for emitting light energy onto a wafer. The light energy sources can be placed in various configurations. In accordance with the present invention, tuning devices which are used to adjust the overall irradiance distribution of the light energy sources are included in the heating device. The tuning devices can be either active sources of light energy or passive sources which reflect, refract or absorb light energy. For instance, in one embodiment, the tuning devices can comprise a lamp spaced from a focusing lens designed to focus determined amounts of light energy onto a particular location of a wafer being heated.

Abstract: A process for forming and/or modifying dielectric films on semiconductor substrates is disclosed. According to the present invention, a semiconductor wafer is exposed to a process gas containing a reactive component. The temperature to which the semiconductor wafer is heated and the partial pressure of the reactive component are selected so that, sometime during the process, diffusion of the reactive components occurs through the dielectric film to the film/semiconductor substrate interface. Further, diffusion also occurs of semiconductor atoms through the dielectric film to an exterior surface of the film. The process of the present invention has been found well suited to forming and/or modifying very thin dielectric films, such as films having a thickness of less than 8 nm.

Abstract: The oxynitride or oxide layer is formed on a semiconductor substrate by subjecting the substrate to UV radiation while exposed to a gaseous atmosphere of O2 and one or more of N2, N2O, H2 and NH3. Thereafter, a silicon nitride layer is formed according to known 4-step gate stack dielectric processing techniques. Alternatively, a 3-step gate stack process is used, namely following UV-oxidation, a further UV-radiation in NH3 may be applied, followed by a rapid thermal anneal process in an inert ambient. By using UV-oxidation as the first step in either a 4-step or 3-step gate stack process, very thin composite dielectric films with equivalent oxide thickness (EOT) below 16 Å and as low as 14.2 Å can be obtained with significant improvement in leakage current density.

Abstract: Inductively-coupled plasma reactors for anisotropic and isotropic etching of a substrate, as well as chemical vapor deposition of a material onto a substrate. The reactor system comprises a processing chamber with a plasma shaping member contained therein. In one embodiment, the plasma shaping member extends from a portion of the top wall of the processing chamber, downward into the chamber, and it is generally positioned above the center of the substrate. The shaping member may be a separate piece of hardware attached to the top wall of the chamber, or it may be an integral part of the wall itself. Preferably, the plasma shaping member has a recessed portion in the middle and an extended portion located at a distance outside that of the recessed region. The plasma shaping member may be fabricated from virtually any material since it is at an electrically floating potential during processing of the substrate.

Abstract: In a rapid thermal processing system an array of heat lamps generate radiant heat for heating the surfaces of a semiconductor substrate, such as a semiconductor wafer, to a selected temperature or set of temperatures while held within an enclosed chamber. The heat lamps are surrounded by one or more optically transparent enclosures that isolate the heat lamps from the chamber environment and the wafer or wafers therein. The optically transparent enclosures include associated reflectors to direct a higher proportion of emitted radiant heat energy from the lamps toward the semiconductor wafer(s). The lamps with such enclosures are mounted for rotation so that the reflectors may alternately shield all or a portion of emitted lamp radiation from the semiconductor substrate.

Abstract: An apparatus for heat treating semiconductor wafers is disclosed. The apparatus includes a heating device which contains an assembly linear lamps for emitting light energy onto a wafer. The linear lamps can be placed in various configurations. In accordance with the present invention, tuning devices which are used to adjust the overall irradiance distribution of the light energy sources are included in the heating device. The tuning devices can be, for instance, are lamps or lasers.

Abstract: A method and system for calibrating temperature measurement devices, such as pyrometers, in thermal processing chambers are disclosed. According to the present invention, the system includes a calibrating light source that emits light energy onto a substrate contained in the thermal processing chamber. A light detector then detects the amount of light that is being transmitted through the substrate. The amount of detected light energy is then used to calibrate a temperature measurement device that is used in the system.

Abstract: A workpiece handling system with dual load locks, a transport chamber and a process chamber. Workpieces may be retrieved from one load lock for processing at vacuum pressure, while workpieces are unloaded from the other load lock at the pressure of the surrounding environment. The transport chamber has a transport robot with two arms. Processed workpieces and new workpieces may be exchanged by a simple under/over motion of the two robot arms. The transport robot rotates about a central shaft to align with the load locks or the process chamber. The robot may also be raised or lowered to align the arms with the desired location to which workpieces are deposited or from which workpieces are retrieved. The two load locks may be positioned one above the other such that a simple vertical motion of the robot can be used to select between the two load locks. The two load locks and transport robot allow almost continuous processing.

Abstract: A process and system for heating semiconductor substrates in a processing chamber on a susceptor as disclosed. In accordance with the present invention, the susceptor includes a support structure made from a material having a relatively low thermal conductivity for suspending the wafer over the susceptor. The support structure has a particular height that inhibits or prevents radial temperature gradients from forming in the wafer during high temperature processing. If needed, recesses can be formed in the susceptor for locating and positioning a support structure. The susceptor can include a wafer supporting surface defining a pocket that has a shape configured to conform to the shape of a wafer during a heat cycle.

Abstract: A method for depositing a high-k dielectric coating onto a substrate, such as a semiconductor wafer, is provided. In one embodiment, the process is directed to forming a nitride layer on a substrate. In an alternative embodiment, the present invention is directed to forming a metal oxide or silicate on a semiconductor wafer. When forming a metal oxide or silicate, a passivation layer is first deposited onto the substrate.

Abstract: A system and method for two-sided etch of a semiconductor substrate. Reactive species are generated and flowed toward a substrate for processing. A diverter is positioned between the generation chamber and the substrate. A portion of the reactive species flows through the diverter for processing the front of the substrate. Another portion is diverted around the substrate to the backside for processing. A flow restricter is placed between the substrate and the exhaust system to increase the residence time of reactive species adjacent to the backside.

Abstract: A system for heating a plurality of semiconductor wafers at the same time is disclosed. The apparatus includes a thermal processing chamber containing a substrate holder designed to hold from about three to about ten wafers. The thermal processing chamber is surrounded by light energy sources which heat the wafers contained in the chamber. The light energy sources can heat the wafers directly or indirectly. In one embodiment, the thermal processing chamber includes a liner made from a heat conductive material. The light energy sources are used to heat the liner which, in turn, heats the wafers. In an alternative embodiment, energy dispersing plates are placed in between adjacent wafers. Light energy being emitted by the light energy sources enters the energy dispersing members and gets distributed across the surface of adjacent wafers for heating the wafers uniformly.

Abstract: The oxynitride or oxide layer is formed on a semiconductor substrate by subjecting the substrate to UV radiation while exposed to a gaseous atmosphere of O2 and one or more of N2, N2O, H2 and NH3. Thereafter, a silicon nitride layer is formed according to known 4-step gate stack dielectric processing techniques. Alternatively, a 3-step gate stack process is used, namely following UV-oxidation, a further UV-radiation in NH3 may be applied, followed by a rapid thermal anneal process in an inert ambient. By using UV-oxidation as the first step in either a 4-step or 3-step gate stack process, very thin composite dielectric films with equivalent oxide thickness (EOT) below 16 Å and as low as 14.2 Å can be obtained with significant improvement in leakage current density.

Abstract: In a rapid thermal processing system an array of heat lamps generate radiant heat for heating the surfaces of a semiconductor substrate, such as a semiconductor wafer, to a selected temperature or set of temperatures while held within an enclosed chamber. The heat lamps are surrounded individually or in groups by one or more optically transparent enclosures that isolate the heat lamps from the chamber environment and the wafer or wafers therein. The optically transparent enclosures may include associated reflectors and/or lenses to direct a higher proportion of emitted radiant heat energy from the lamps toward the semiconductor wafer(s). Thin planar quartz liners may also be interposed between the lamps and the substrate. By controlling radiant energy distribution within the chamber, and eliminating thick planar quartz windows commonly used to isolate the lamps in prior art RTP systems, higher processing rates and improved reliability are obtained.