Abstract: A workpiece handling system with dual load locks, a transport chamber and a process chamber. Workpieces may be retrieved from one load lock for processing at vacuum pressure, while workpieces are unloaded from the other load lock at the pressure of the surrounding environment. The transport chamber has a transport robot with two arms. Processed workpieces and new workpieces may be exchanged by a simple under/over motion of the two robot arms. The transport robot rotates about a central shaft to align with the load locks or the process chamber. The robot may also be raised or lowered to align the arms with the desired location to which workpieces are deposited or from which workpieces are retrieved. The two load locks may be positioned one above the other such that a simple vertical motion of the robot can be used to select between the two load locks. The two load locks and transport robot allow almost continuous processing.

Abstract: In a rapid thermal processing system an array of heat lamps generate radiant heat for heating the surfaces of a semiconductor substrate, such as a semiconductor wafer, to a selected temperature or set of temperatures while held within an enclosed chamber. The heat lamps are surrounded by one or more optically transparent enclosures that isolate the heat lamps from the chamber environment and the wafer or wafers therein. The optically transparent enclosures include associated reflectors to direct a higher proportion of emitted radiant heat energy from the lamps toward the semiconductor wafer(s). The lamps with such enclosures are mounted for rotation so that the reflectors may alternately shield all or a portion of emitted lamp radiation from the semiconductor substrate.

Abstract: An apparatus for heat treating semiconductor wafers in a thermal processing chamber using light energy is provided. In one embodiment, the apparatus contains a window located between the semiconductor wafer and the energy source. The window contains a member that defines at least one passage capable of being placed into communication with a coolant to cool the window and at least partially offset the “first wafer effect”. Additionally, in some embodiments, the window has a thickness greater than about 1 inch so that it can withstand pressures applied during wafer processing.

Abstract: A plasma reactor and methods for processing semiconductor wafers are described. Gases are introduced into a reactor chamber. An induction coil surrounds the reactor chamber. RF power is applied to the induction coil and is inductively coupled into the reactor chamber causing a plasma to form. A split Faraday shield is interposed between the induction coil and the reactor chamber to substantially block the capacitive coupling of energy into the reactor chamber which may modulate the plasma potential. The configuration of the split Faraday shield may be selected to control the level of modulation of the plasma potential. For etch processes, a separate powered electrode may be used to accelerate ions toward a wafer surface. For isotropic etching processes, charged particles may be filtered from the gas flow, while a neutral activated species passes unimpeded to a wafer surface.

Abstract: Systems and methods are provided for selectively removing unwanted material from a surface of a semiconductor wafer without causing damage to or etching of underlying portions of the semiconductor. One embodiment of the invention includes the use of reactive species from a plasma source to facilitate the removal of residues remaining after metal etching on a silicon wafer, where the gases employed in creating the plasma include hydrogen, halogens such as fluorine, and little or no oxygen.

Abstract: A method for depositing a high-k dielectric coating onto a substrate, such as a semiconductor wafer, is provided. The substrate is subjected to one or more reaction cycles. For instance, in a typical reaction cycle, the substrate is heated to a certain deposition temperature. Thereafter, in one embodiment, one or more reactive organo-metallic gas precursors are supplied to the reactor vessel. An oxidizing gas is also supplied to the substrate at a certain oxidizing temperature to oxidize and/or densify the layers. As a result, a metal oxide coating is formed that has a thickness equal to at least about one monolayer, and in some instances, two or more monolayers. The dielectric constant of the resulting metal oxide coating is often greater than about 4, and in some instance, is from about 10 to about 80.

Abstract: A damascene process for introducing copper into metallization layers in microelectronic structures includes a step of forming an enhancement layer of a metal alloy, such as a copper alloy or Co—W—P, over the barrier layer, using PVD, CVD or electrochemical deposition prior to electrochemically depositing copper metallization. The enhancement layer has a thickness from 10&mgr; to 100&mgr; and conformally covers the discontinuities, seams and grain boundary defects in the barrier layer. The enhancement layer provides a conductive surface onto which a metal layer, such as copper metallization, may be applied with electrochemical deposition. Alternatively, a seed layer may be deposited over the enhancement layer prior to copper metallization.

Abstract: A process for treating an electronic component wherein the electronic component is exposed to a heated solvent and subsequently exposed to an ozonated process fluid. The electronic component is optionally exposed to the heated solvent by exposing the electronic component to a passing layer of heated solvent. An apparatus for treating electronic components with a heated solvent and an ozonated process fluid is also provided.

Abstract: A method for depositing a high-k dielectric coating onto a substrate, such as a semiconductor wafer, is provided. In one embodiment, the process is directed to forming a nitride layer on a substrate. In an alternative embodiment, the present invention is directed to forming a metal oxide or silicate on a semiconductor wafer. When forming a metal oxide or silicate, a passivation layer is first deposited onto the substrate.

Abstract: An apparatus for heat treating semiconductor wafers is disclosed. The apparatus includes a heating device which contains an assembly linear lamps for emitting light energy onto a wafer. The linear lamps can be placed in various configurations. In accordance with the present invention, tuning devices which are used to adjust the overall irradiance distribution of the light energy sources are included in the heating device. The tuning devices can be, for instance, are lamps or lasers.

Abstract: The oxynitride or oxide layer formed on a semiconductor substrate is pre-treated with UV-excited gas (such as chlorine or nitrogen) to improve the layer surface condition and increase the density of nucleation sites for subsequent silicon nitride deposition. The pre-treatment is shown to reduce the root mean square surface roughness of thinner silicon nitride films (with physical thicknesses below 36 Å, or even below 20 Å that are deposited on the oxynitride layer by chemical vapor deposition (CVD).

Abstract: Air bearings support a rotating wafer carrying base in an RTP system. The base in proximity to the air bearing is protected from warping due to absorption of radiation from the hot wafer being treated. The most preferred embodiment splits the base into an inner disk carrying the wafer and an outer ring, where the inner ring which absorbs the most energy contacts and is supported at three points by the outer disk which is supported by the air bearing.

Abstract: A thermal processing system and method for processing a semiconductor substrate. An inductor couples energy to a susceptor, wherein the spacing between the inductor and the susceptor is configured for the steady-state portions of a CVD epitaxial deposition process. The temperature uniformity of the susceptor is improved during the transient portions of the process, the heat ramp-up and cool down, by varying the distance of separation between the inductor and the susceptor. Temperature non-uniformities are a common cause of slip. Additional aspects of the invention provide for improved thermal shielding of the edges and top surface of the susceptor. Thicker susceptors also improve temperature uniformity.

Abstract: A semiconductor substrate processing system and method using a stable heating source with a large thermal mass relative to conventional lamp heated systems. The system dimensions and processing parameters are selected to provide a substantial heat flux to the wafer while minimizing heat loss to the surrounding environment (particularly from the edges of the heat source and wafer). The heat source provides a wafer temperature uniformity profile that has a low variance across temperature ranges at low pressures. A resistively heated block is substantially enclosed within an insulated vacuum cavity used to heat the wafer. A vacuum region is preferably provided between the heated block and the insulating material as well as between the insulating material and the chamber wall. Heat transfer across the vacuum regions is primarily achieved by radiation, while heat transfer through the insulating material is achieved by conduction.

Abstract: A system and process is disclosed for rapidly heating semiconductor wafers coated with a highly reflective material on either the whole wafer or in a patterned area. The wafers are heated in a thermal processing chamber by a plurality of lamps. In order for the wafer coated with the highly reflective material to more rapidly increase in temperature with lower power intensity, a shield member is placed in between the wafer and the plurality of lamps. The shield member is made from a high emissivity material, such as ceramic, that increases in temperature when exposed to light energy. Once heated, the shield member then in turn heats the semiconductor wafer with higher uniformity. In one embodiment, the shield member can also be used to determine the temperature of the wafer as it is heated.

Abstract: A semiconductor substrate processing system and method using a stable heating source with a large thermal mass relative to conventional lamp heated systems. The system dimensions and processing parameters are selected to provide a substantial heat flux to the wafer while minimizing heat loss to the surrounding environment (particularly from the edges of the heat source and wafer). The heat source provides a wafer temperature uniformity profile that has a low variance across temperature ranges at low pressures. A resistively heated block is substantially enclosed within an insulated vacuum cavity used to heat the wafer. Insulating walls comprising a reflective material, such as polished tungsten, encapsulated within an inert insulating material such as quartz, may be used to provide insulation. The isothermal nature of the processing region may be enhanced by using multiple layers of insulating walls, actively heated insulating walls or a conductive gas to enhance heat transfer to the semiconductor substrate.

Abstract: Variable mode plasma system and method for processing a semiconductor wafer. The modulation of the plasma potential relative to the semiconductor wafer is varied for different process steps. A capacitive shield may be selectively grounded to vary the level of capacitive coupling and modulation of the plasma. Process pressures, gases and power level may also be modified for different process steps. Plasma properties may easily be tailored to specific layers and materials being processed on the surface of the wafer. Variable mode processes may be adapted for (i) removal of photoresist after high-dose ion implant, (ii) post metal etch polymer removal, (iii) via clean, and (iv) other plasma enhanced processes.

Abstract: An improved apparatus and method for thermal processing of semiconductor wafers. The apparatus and method provide the temperature stability and uniformity of a conventional batch furnace as well as the processing speed and reduced time-at-temperature of a lamp-heated rapid thermal processor (RTP). Individual wafers are rapidly inserted into and withdrawn from a furnace cavity held at a nearly constant and isothermal temperature. The speeds of insertion and withdrawal are sufficiently large to limit thermal stresses and thereby reduce or prevent plastic deformation of the wafer as it enters and leaves the furnace. By processing the semiconductor wafer in a substantially isothermal cavity, the wafer temperature and spatial uniformity of the wafer temperature can be ensured by measuring and controlling only temperatures of the cavity walls.

Abstract: A semiconductor substrate processing system and method of using a stable heating source with a large thermal mass relative to conventional lamp heating systems. The system dimensions and processing parameters are selected to provide a substantial heat flux to the substrate while reducing the potential of heat loss to the surrounding environment, particularly from the edges of the heat source and substrate. Aspects of the present invention include a dual resistive heater system comprising a base or primary heater, surrounded by a peripheral or edge heater. The impedance of the edge heater may be substantially matched to that of the primary heater such that a single power supply may be used to supply power to both heaters. Both resistive heaters deliver heat to a heated block, and the heaters and heated block are substantially enclosed within an insulated cavity. The walls of the insulated cavity may include multiple layers of insulation, and these layers may be substantially concentrically arranged.

Abstract: A system and method for two-sided etch of a semiconductor substrate. Reactive species are generated and flowed toward a substrate for processing. A diverter is positioned between the generation chamber and the substrate. A portion of the reactive species flows through the diverter for processing the front of the substrate. Another portion is diverted around the substrate to the backside for processing. A flow restricter is placed between the substrate and the exhaust system to increase the residence time of reactive species adjacent to the backside.