Patents Assigned to MaxLinear, Inc.
  • Publication number: 20260236536
    Abstract: A method may include obtaining input symbols and a hash table. The method may also include storing the input symbols in a first buffer at a current coding position, and processed input symbols in a second buffer. The method may further include defining a plurality of delayed match window (DMW) offsets, comprising a highest DMW offset and at least one lower DMW offset. The method may also include performing a substring match search using the input symbols, the processed input symbols, and the highest DMW offset, to determine one or more candidate matches. The method may further include outputting a result from the substring match search corresponding to a determination associated with the one or more candidate matches.
    Type: Application
    Filed: February 13, 2026
    Publication date: August 13, 2026
    Applicant: MaxLinear, Inc.
    Inventors: Pinaki Shankar Chanda, Siddhant Baldota, Bin Wu
  • Patent number: 12696304
    Abstract: According to an aspect of an embodiment, an automatic frequency coordination (AFC) server may comprise an AFC database and a processing device. The AFC database may comprise incumbent device data for an incumbent device. The processing device may be configured to determine a mean square error (MSE) value for the incumbent device. The processing device may be configured to compute an interference to noise (I/N) ratio for the incumbent device based on the MSE value for the incumbent device. The processing device may be configured to compute one or more operating frequencies for an access point, wherein the one or more operating frequencies have the I/N ratio of less than a threshold at the incumbent device.
    Type: Grant
    Filed: May 25, 2023
    Date of Patent: July 28, 2026
    Assignee: MaxLinear, Inc.
    Inventors: Saju Palayur, Salvador Iranzo Molinero
  • Publication number: 20260214748
    Abstract: A switch device may include: a first electronic device including a plurality of ports to facilitate communication via a plurality of lanes; a plurality of second electronic devices comprising a second plurality of ports, wherein the second electronic devices are operable to communicate with the first electronic device via the plurality of lanes; and a switch controller. The switch controller may: dynamically map the plurality of lanes from at least one port of the first electronic device to one or more ports of the second plurality of ports of the plurality of second electronic devices; facilitate simultaneous broadcasting of data from the at least one port of the first electronic device to a plurality of ports of the second electronic devices; and enable multicasting by selectively mapping data from the at least one port of the first electronic device to a predefined subset of ports in the second electronic devices.
    Type: Application
    Filed: November 21, 2025
    Publication date: July 23, 2026
    Applicant: MaxLinear, Inc.
    Inventor: Curtis Ling
  • Publication number: 20260213816
    Abstract: A system may include a first access point (AP), a second AP, one or more first stations (STAs), and one or more second STAs. The first AP may be operable to transmit a first NDP. The second AP may be operable to transmit a second NDP. The first STAs may be associated with the first AP, and may be operable to transmit first channel state information (CSI) to the first AP and the second AP in response to obtaining a first beamforming report poll (BFRP) from the first AP. The second STAs may be associated with the second AP, and may be operable to transmit second CSI to the first AP and the second AP in response to obtaining a second BFRP from the second AP. The first NDP and the second NDP may be transmitted at non-overlapping time intervals.
    Type: Application
    Filed: January 14, 2026
    Publication date: July 23, 2026
    Applicant: MaxLinear, Inc.
    Inventors: Avi Avraham Mansour, Rainer Strobel, Ziv Avital, Sigurd Schelstraete
  • Publication number: 20260213915
    Abstract: A system and method for selectively retiming signals in a high-performance network. The system includes a smart repeater circuit with input and output crossbars and retimers configured to recondition high-loss channels while bypassing low-loss channels. A sniffing mechanism dynamically assesses channel quality and adjusts routing configurations. In an advanced electrical circuit switch (AECS) system, the smart repeater integrates digital signal processors (DSPs) and analog crossbars, utilizing out-of-band (OOB) signaling for configuration, channel routing, and fault-tolerant operations. A method for channel assessment includes sequentially connecting a sniffer to input channels in a round-robin manner, evaluating channel metrics, and routing signals based on the assessments. Feedback from output channels, via in-band (IB) or OOB signaling, is used to refine routing configurations. These features support high-performance applications, providing selective retiming and dynamic signal management.
    Type: Application
    Filed: January 22, 2026
    Publication date: July 23, 2026
    Applicant: MaxLinear, Inc.
    Inventors: Sridhar Ramesh, Curtis Ling
  • Patent number: 12689912
    Abstract: According to an aspect of an example, an access point (AP) may include a processing device and a transceiver. The processing device may be configured to detect an incumbent transmission from an incumbent device. The processing device may be configured to compute an angle of arrival between the AP and the incumbent transmission from the incumbent device. The processing device may be configured to generate an incumbent avoidance beam, wherein the incumbent avoidance beam is configured to transmit in one or more operating directions to facilitate avoidance of the incumbent device. The transceiver may be configured to transmit the incumbent avoidance beam.
    Type: Grant
    Filed: July 19, 2023
    Date of Patent: July 21, 2026
    Assignee: MaxLinear, Inc.
    Inventors: Saju Palayur, Salvador Iranzo Molinero
  • Publication number: 20260205140
    Abstract: A method includes obtaining, by a data transform accelerator, a first command and first source data associated with the first command. The method also includes generating, by the data transform accelerator, one or more containers using the first command. Each of the one or more containers may have a container size and may be operable to store compressed source data. The method further includes obtaining a mode of operation for a data compression operation. The method also includes performing the data compression operation to a first portion of the first source data using the mode of operation to obtain the compressed source data. The method further includes storing the compressed source data in a first container of the one or more containers.
    Type: Application
    Filed: December 30, 2025
    Publication date: July 16, 2026
    Applicant: MaxLinear, Inc.
    Inventors: Pinaki Shankar Chanda, Michael Ray Ham
  • Patent number: 12683704
    Abstract: According to an aspect of an embodiment, an optical line terminal (OLT) configured for downstream transmission in a passive optical network (PON) may comprise a processing device and a transceiver. The processing device may be configured to: generate a first downstream signal for transmission on a first channel at a first signal level, and generate a second downstream signal for transmission on a second channel at a second signal level. The first signal level may be greater than the second signal level. The PMD transmitter may be configured to transmit a combined downstream signal comprising the first downstream signal and the second downstream signal. The first transmit power of the first downstream signal may be selected based on a comparison to a second transmit power of the second downstream signal to facilitate reception of the first downstream signal from the combined downstream signal at an optical network unit (ONU).
    Type: Grant
    Filed: May 9, 2023
    Date of Patent: July 14, 2026
    Assignee: MaxLinear, Inc.
    Inventors: Rainer Strobel, Vladimir Oksman
  • Publication number: 20260189516
    Abstract: A device includes a plurality of digital signal processors (DSPs), analog crossbars in communication with the DSPs, and a switch controller. The switch controller facilitates control signals using in-band signaling within payload traffic or out-of-band signaling over a dedicated management interface. The system supports dynamic traffic prioritization based on real-time metrics, such as latency and traffic load, ensuring efficient resource allocation and seamless operation during congestion or reconfiguration. Redundant crossbars and failover mechanisms enhance fault tolerance, while granular backpressure selectively throttles traffic flows to prevent bottlenecks. Integrated diagnostic tools monitor performance and optimize traffic flow, enabling high-speed and reliable communication.
    Type: Application
    Filed: December 29, 2025
    Publication date: July 2, 2026
    Applicant: MaxLinear, Inc.
    Inventors: Curtis Ling, Masoud Koochakzadeh, Sheng Ye, John Andrew Guckenberger, Sridhar Ramesh
  • Publication number: 20260186552
    Abstract: A device includes a plurality of digital signal processors (DSPs) and analog crossbars in communication with the DSPs. The DSPs and crossbars dynamically adjust power consumption based on traffic load and/or a signal quality, leveraging traffic prediction models to optimize resource allocation. The system supports features such as powering down unused lanes, asymmetrically deactivating transmission or receiving lanes, and preemptively scaling resources during predicted traffic increases. Dynamic voltage and frequency scaling (DVFS) optimizes power usage based on link utilization and traffic priority, minimizing latency impacts during transitions. The switch controller integrates traffic prioritization algorithms, including weighted round-robin (WRR), to allocate power and bandwidth efficiently to high-priority traffic flows. Redundant crossbars handle overflow traffic or failover scenarios, transitioning between standby and active states dynamically.
    Type: Application
    Filed: December 29, 2025
    Publication date: July 2, 2026
    Applicant: MaxLinear, Inc.
    Inventors: Curtis Ling, Masoud Koochakzadeh, Sheng Ye, John Andrew Guckenberger, Sridhar Ramesh
  • Publication number: 20260190003
    Abstract: Systems and methods for seamless network communication reconfiguration, comprising a device that includes physical media dependent (PMD) devices, incorporating a digital signal processor (DSP) configured to handle both in-band and out-of-band communication traffic, a plurality of primary analog crossbars connected to the DSPs for routing operational data, and a set of redundant analog crossbars configured to establish auxiliary communication channels. The system includes a controller operable to dynamically activate the auxiliary communication channels during reconfiguration events, enabling a make-before-break protocol by transitioning traffic from primary channels to auxiliary channels. The redundant crossbars support out-of-band signaling to coordinate transitions and maintain system integrity.
    Type: Application
    Filed: December 29, 2025
    Publication date: July 2, 2026
    Applicant: MaxLinear, Inc.
    Inventors: Curtis Ling, Masoud Koochakzadeh, Sheng Ye, John Andrew Guckenberger, Sridhar Ramesh
  • Publication number: 20260180905
    Abstract: Technology for a device includes a plurality of digital signal processors (DSPs) and a plurality of analog crossbars in communication with the DSPs. The DSPs dynamically adjust queues to optimize data flow based on traffic conditions, latency, and resource availability. Queues may include input queues, output queues, virtual output queues, or hybrid configurations, supporting techniques such as priority scheduling and time-division multiplexing (TDM). The DSPs facilitate flow control through granular backpressure signaling, managing congestion between DSPs and endpoints. Synchronization of queues during crossbar reconfiguration ensures seamless traffic flow and prevents data loss. Advanced mechanisms, such as dynamic queue depth adjustment and adaptive prioritization, enable efficient resource sharing while maintaining high throughput.
    Type: Application
    Filed: December 19, 2025
    Publication date: June 25, 2026
    Applicant: MaxLinear, Inc.
    Inventors: Curtis Ling, Masoud Koochakzadeh, Sheng Ye, John Andrew Guckenberger, Sridhar Ramesh
  • Publication number: 20260180952
    Abstract: A device may include a plurality of digital signal processors (DSPs) and a plurality of analog crossbars connected to the DSPs. A microcontroller unit may be operable to facilitate network isolation.
    Type: Application
    Filed: December 19, 2025
    Publication date: June 25, 2026
    Applicant: MaxLinear, Inc.
    Inventors: Curtis Ling, Masoud Koochakzadeh, Sheng Ye, John Andrew Guckenberger, Sridhar Ramesh
  • Publication number: 20260178525
    Abstract: A device may include a die-to-die (D2D) interconnect. The D2D interconnect may receive first data at a first port and transmit second data from a second port. One or more of a voltage or a bias of the D2D interconnect may be dynamically adapted based on target link performance.
    Type: Application
    Filed: December 19, 2025
    Publication date: June 25, 2026
    Applicant: MaxLinear, Inc.
    Inventor: Curtis Ling
  • Publication number: 20260180923
    Abstract: A device includes a plurality of digital signal processors (DSPs) and analog crossbars in communication with the DSPs. The analog crossbars dynamically switch between multiple inputs and outputs and adjust configurations based on real-time feedback from the DSPs. The crossbars use amplification to enhance signal strength at input and output stages, ensuring signal integrity across long transmission paths or during multicasting and broadcasting operations. Real-time adaptive equalization optimizes performance in response to environmental changes or signal degradation. The crossbars facilitate system management traffic through out-of-band signaling and support failover with redundant paths to maintain communication during failures. Synchronization with DSPs or a switch controller is achieved through shared clock signals or IEEE 1588. These features enable efficient, high-speed data transmission while maintaining robust performance and reliability in dynamic network environments.
    Type: Application
    Filed: December 19, 2025
    Publication date: June 25, 2026
    Applicant: MaxLinear, Inc.
    Inventors: Curtis Ling, Masoud Koochakzadeh, Sheng Ye, John Andrew Guckenberger, Sridhar Ramesh
  • Publication number: 20260180924
    Abstract: A device includes digital signal processors (DSPs) and analog crossbars in communication with the DSPs. The analog crossbars are operable to dynamically adjust equalization settings based on real-time feedback from DSPs, physical media-dependent (PMD) devices, or environmental sensors. Equalization adjustments optimize signal quality by compensating for traffic conditions, environmental changes, or signal degradation. The crossbars support predictive equalization using machine learning algorithms to preemptively adjust signal properties, ensuring performance across dynamic network environments. Diagnostics and logging capabilities monitor and refine equalization performance, while auxiliary in-band channels provide low-power pathways to reduce energy consumption. These features enable efficient, high-speed data transmission with enhanced reliability and adaptability in modern networking systems.
    Type: Application
    Filed: December 19, 2025
    Publication date: June 25, 2026
    Applicant: MaxLinear, Inc.
    Inventors: Curtis Ling, Masoud Koochakzadeh, Sheng Ye, John Andrew Guckenberger, Sridhar Ramesh
  • Publication number: 20260169519
    Abstract: Technology for a device may include a plurality of digital signal processors (DSPs); and a plurality of analog crossbars operable to be connected to the plurality of DSPs. The timing between the plurality of DSPs may be synchronized.
    Type: Application
    Filed: December 12, 2025
    Publication date: June 18, 2026
    Applicant: MaxLinear, Inc.
    Inventors: Curtis Ling, Masoud Koochakzadeh, Sheng Ye, John Andrew Guckenberger, Sridhar Ramesh
  • Publication number: 20260169515
    Abstract: A digital signal processors (DSPs) and analog crossbars operatively connected to the DSPs includes a method for synchronization and distributed processing. The DSPs are configured to coordinate traffic among themselves, enabling efficient data flow and resource allocation. This coordination may involve synchronization, traffic management, and resource arbitration to optimize performance and minimize latency. The device facilitates seamless communication and supports dynamic reconfiguration, making it suitable for high-speed networking and scalable systems.
    Type: Application
    Filed: December 12, 2025
    Publication date: June 18, 2026
    Applicant: MaxLinear, Inc.
    Inventors: Curtis Ling, Masoud Koochakzadeh, Sheng Ye, John Andrew Guckenberger, Sridhar Ramesh
  • Publication number: 20260172370
    Abstract: A device includes a plurality of digital signal processors (DSPs) and analog crossbars operable to connect with the DSPs. A switch controller facilitates control signaling between the DSPs and the crossbars, enabling dynamic coordination of traffic flow, resource allocation, and crossbar configurations. The device supports integrated in-band (IB) and out-of-band (OOB) communication, proactive monitoring of signal metrics for failover prediction, and synchronization techniques to minimize latency and ensure system coherence. The architecture further incorporates load balancing, fault tolerance, and distributed control mechanisms to optimize performance in high-speed network environments.
    Type: Application
    Filed: December 12, 2025
    Publication date: June 18, 2026
    Applicant: MaxLinear, Inc.
    Inventors: Curtis Ling, Masoud Koochakzadeh, Sheng Ye, John Andrew Guckenberger, Sridhar Ramesh
  • Publication number: 20260172052
    Abstract: A multi-channel decoder circuit associated with a multi-channel decoder system is disclosed. The multi-channel decoder circuit comprises a distributed decoder circuit comprising a set of unit decoder circuits, each unit decoder circuit configured to receive one or more codewords of a plurality of codewords associated with a plurality of input channels, and decode the one or more codewords. The multi-channel decoder circuit further comprises a distribution controller circuit configured to distribute each incoming codeword of the one or more codewords to the respective unit decoder circuit of the set of unit decoder circuits within the distributed decoder circuit, based on determining a currently available unit decoder circuit within the set of unit decoder circuits.
    Type: Application
    Filed: February 10, 2026
    Publication date: June 18, 2026
    Applicant: MAXLINEAR, INC.
    Inventors: Gert Schedelbeck, Stefan Uhlemann