Abstract: A clock recovery circuit includes a clock detector configured to receive a serial data stream from a remote device over a reverse channel, wherein the serial data stream includes clock reference data, reverse channel data, or a combination of the clock reference data and the reverse channel data, and the clock detector configured to output a clock detect signal in response to detecting the clock reference data in the serial data stream; a phase lock loop including a first detector configured to receive the serial data stream and to detect phase and frequency; and a controller configured to receive the clock detect signal and to selectively enable the first detector based on the clock detect signal.

Abstract: Dynamic data-dependent neural network processing systems and methods increase computational efficiency in neural network processing by uniquely processing data based on the data itself and/or configuration parameters for processing the data. In embodiments, this is accomplished by receiving, at a controller, input data that is to be processed by a first device in a first layer of a sequence of processing layers of a neural network using a first set of parameters. The input data is analyzed to determine whether to modify it, whether processing the (modified) data in a second layer would conserve at least one computational resource, or whether to apply a different set of parameters. Depending on the determination, the sequence of processing layers is modified, and the (modified) data are processed according to the modified sequence to reduce data movements and transitions, thereby, conserving computational resources.

Abstract: Systems and methods of the present invention allow to determine ambient gas temperature in harsh environments such as in a steam autoclave chamber during a sterilization process. In certain embodiments of the invention, temperature data is gathered using a sensor that is placed in an enclosed electronics-based temperature logging device. A capsule seals the temperature logging device except for a through hole that, during regular operation, allows gas to directly contact a surface of the temperature logging device in order to reduce a time lag between the data logging device and an ambient gas. As a result, the data logging device accurately can track temperature variations when placed, for example, inside a chamber.

Abstract: Systems and methods provide secure, end-to-end high-speed data encoding and communication. In certain embodiments, this is accomplished by modifying a header portion of a data packet received from a first device and complying with a one Mobile Industry Processor Interface (MIPI) protocol to create a modified data packet that complies with a faster MIPI protocol. The header portion of the modified data packet is validated during a tunnel mode operation using an error detection process to validate the modified data packet, which can then be securely transmitted to a second device that complies with the faster MIPI protocol.

Abstract: Described herein are systems and methods for generating short load current pulses using an H-bridge. In various embodiments, this is accomplished by controlling, in a shunting mode, a low-side switch of the H-bridge to drive a first average current and controlling, in a non-shunting mode, a high-side switch of the H-bridge to drive a second average current such that the first and second average currents are substantially the same and reduce a current pulse width of the load current.

Abstract: A controller for a SIMO DC-DC converter operable in CCM and DCM receives a signal representative of an inductor current, and signals representative of a first and a second DC-DC converter output. The controller has a first and second output adapted to control electronic switches coupled to a first and second output filter, and a third and fourth output adapted to control current in an inductor. The controller controls the outputs based upon the inputs by determining a desired PWL inductor current and current waveform, and determines pulsewidths of the outputs, to match the inductor current to the desired PWL. A timer controls pulsewidths of the outputs and the controller dynamically selects DCM or CCM to maintain the first and second DC-DC converter outputs at predetermined levels. In embodiments, the desired PWL inductor current is one or both of a desired valley current and a desired peak current.

Abstract: A multi-transistor device includes first and second lateral double-diffused metal-oxide-semiconductor field effect (LDMOS) transistors sharing a first p-type reduced surface field (RESURF) layer and a first drain n+ region. In certain embodiments, the first LDMOS transistor includes a first drift region, the second LDMOS transistor includes a second drift region, and the first and second drift regions are at least partially separated by the first p-type RESURF layer in a thickness direction.

Abstract: An electrical switching system includes a constant-power controller and a switching device electrically coupled between a first node and a second node. The constant-power controller is configured to (a) generate a digital control signal to control the switching device, (b) control a duration of an active phase of the digital control signal at least partially based on a voltage across the switching device, and (c) control a peak value of the digital control signal to regulate a peak magnitude of current flowing through the switching device.

Abstract: A method and a circuit arrangement for damping stepper motor resonances during operation of a stepper motor (M), in particular in the medium und high speed range, is described, wherein the coils (A; B) of the stepper motor (M) are each connected into a bridge circuit (Br 1; Br2) comprising semiconductor switches (Sw1, . . . Sw4), in order to impress into the coils (A; B) a predetermined target coil current (ISollA; ISollB). The resonance damping is essentially achieved by activating a passive FD-phase in the zero crossing of the target coil current (ISollA; ISollB), during which all 10 semiconductor switches (Sw1, . . . Sw4) are opened or switched blocking, in order to thereby feed a coil current flowing in the related motor coil (A; B) back into the supply voltage source either via inverse or body diodes and/or via diodes (D1, . . . D4) connected in parallel to the semiconductor switches (Sw1, . . . Sw4) in the reverse direction between the positive supply voltage (+VM) and ground potential.

Abstract: Systems and methods increase computational efficiency in machine learning accelerators. In embodiments, this is accomplished by evaluating, partitioning, and selecting computational resources to uniquely process, accumulate, and store data based on the type of the data and configuration parameters that are used to process the data. Various embodiments, take advantage of the zeroing feature of a Built-In Self-Test (BIST) controller to cause a BIST circuit to create a known state for a hardware accelerator, e.g., during a startup and/or wakeup phase, thereby, reducing data movements and transitions to save both time and energy.

Abstract: Systems and methods increase power efficiency in communication systems by examining a digital signal to determine whether a threshold corresponding to an increase in a power requirement is likely to be exceeded. The signal is encoded with information indicating the likely change and communicated to a driver that, upon extracting the information, uses it to cause instruct an amplifier to increase a power output to accommodate the increase in power requirement. Once the threshold is no longer exceeded, the driver circuit, advantageously, decreases the power output to conserve energy. In various embodiments, an amplifier may increase power efficiency by switching from a low-power circuit configuration to a high-circuit configuration.

Abstract: A method for controlling a switching circuit including an input port electrically coupled to a photovoltaic device and an output port electrically coupled to a load includes (1) entering a voltage limiting operating mode and (2) in the voltage limiting operating mode (i) causing a control switching device of the switching circuit to repeatedly switch between its conductive and non-conductive states in a manner which limits magnitude of an output voltage to a maximum voltage value, the output voltage being a voltage across the output port, and (ii) varying the maximum voltage value as a function of magnitude of an output current, the output current being a current flowing through the output port.

Abstract: Described are context-aware low-power systems and methods that reduce power consumption in compute circuits such as commonly available machine learning hardware accelerators that carry out a large number of arithmetic operations when performing convolution operations and related computations. Various embodiments exploit the fact that power demand for a series of computation steps and many other functions a hardware accelerator performs is highly deterministic, thus, allowing for energy needs to be anticipated or even calculated to a certain degree. Accordingly, power supply output may be optimized according to actual energy needs of compute circuits. In certain embodiments this is accomplished by proactively and dynamically adjusting power-related parameters according to high-power and low-power operations to benefit a machine learning circuit and to avoid wasting valuable power resources, especially in embedded computing systems.

Abstract: Circuitry, systems, and methods for fault detection and reporting comprise a fault detection circuit configured to detect one or more fault conditions that cause a state change in a fault pin voltage representative of a transceiver failure. Once the state of the fault pin voltage changes, a transceiver input generates a fault detection code. In embodiments, in response to the transceiver input receiving a first signal, the fault detection code is shifted to a transceiver output that may communicate the fault detection code to a controller. Once the transceiver input receives a second signal, the fault pin voltage may be reset to clear the fault detection code before resuming operations, including detecting additional fault conditions as they arise.

Abstract: Systems and methods herein use a sensing circuit to detect an overvoltage at a voltage node as a drain current. A current-mode comparator converts the detected current into a control signal, which is provided to a control circuit. The control circuit uses the control signal cut of a bias current to turn off switches in a protection circuit to create a high-impedance electrical path between the voltage node and the to-be-protected voltage node.

Abstract: In-flight operations in an inbound data path from a source memory to a convolution hardware circuit increase computational throughput when performing convolution calculations, such as pooling and element-wise operations. Various operations may be performed in-line within an outbound data path to a target memory. Advantageously, this drastically reduces extraneous memory access and associated read-write operations, thereby, significantly reducing overall power consumption in a computing system.

Abstract: Presented are systems and methods for automatically creating and labeling training data for training-based radio, comprising receiving, at a receiver, a frame that comprises a modulated radio frequency (RF) signal comprising a set of waveforms that correspond to payload data. The payload data comprises a sequence of random bits. In embodiments, until a stopping condition is met one or more steps are performed, comprising detecting the frame; demodulating the modulated RF signal to reconstruct the sequence of random bits; using the reconstructed sequence to determine whether the payload data has been correctly received; in response to determining that the payload data has not been correctly received, discarding it and, otherwise, accepting the sequence of random bits as a training label; associating the training label with the modulated RF signal to generate labeled training data; and appending the labeled training data to a labeled training data set.

Abstract: Systems and methods allow existing hardware, such as commonly available hardware accelerators to process fully connected network (FCN) layers in an energy-efficient manner and without having to implement additional expensive hardware. Various embodiments, accomplish this by using a “flattening” method that converts a channel associated with a number of pixels into a number of channels that equals the number pixels.

Abstract: Storage-efficient, low-cost systems and methods provide embedded systems with the ability to dynamically perform on-device learning to modify or customize a trained model to improve computing and detection accuracy in small-scale devices. In certain embodiments, this is accomplished by repurposing storage elements from inference to training and performing partial back-propagation in embedded devices in the final layers of an existing network. In various embodiments replacing weights in final layers, while using hardware components to iteratively performing forward-propagation calculation, advantageously, reduces the need to store intermediate results, thus, allowing for on-device training without significantly increasing hardware requirements or requiring excessive computational memory resources when compared to conventional machine learning methods.

Abstract: A first module is configured to, based on an input sample, determine a first duty cycle. A second module is configured to, based on a battery voltage and the first duty cycle, determine a second duty cycle. A third module is configured to: set a scalar value based on at least one of a battery current, an amplitude of the input sample, the second duty cycle, and an output voltage; and generate a start signal at a rate equal to a predetermined rate multiplied by the scalar value. A fourth module is configured to set a third duty cycle based on the second duty cycle and the scalar value. A fifth module is configured to generate a PWM output based on the start signal and the third duty cycle. A sixth module is configured to apply power to gates of FETs of a voltage converter based on the PWM output.