Abstract: A camera comprising a first circuit and a second circuit. The first circuit may be configured to perform image signal processing using encoding related information. The second circuit may be configured to encode image data using image signal processing related information. The first circuit may be further configured to pass the image signal processing related information to the second circuit. The second circuit may be further configured to pass the encoding related information to the first circuit. The second circuit may be further configured to modify one or more motion estimation processes based upon the information from the first circuit.

Abstract: In some embodiments, content-category-level encoding statistical indicators (statistics) are assigned to weighted linear combinations of corresponding macroblock-level statistics. Content categories may identify potentially overlapping content types such as sky, water, grass, skin, and red content. The combination weights may be similarity measures describing macroblock similarities to content categories. A given macroblock may be associated with multiple content categories, with different similarity levels for different content categories. A similarity measure for a given macroblock with respect to a content category may be defined as a number (between 0 and 8) of neighboring macroblocks that meet a similarity condition, provided the macroblock meets a qualification condition. The similarity condition may be computationally simpler than the qualification condition. Macroblock-level encoding parameters are generated by combining content-category-level parameters.

Abstract: Apparatus and methods that minimize surface defect development in silicon wafers during thermal processing at relatively high temperatures at which silicon wafers are annealed and at less extreme temperature, or for other purposes. The apparatus and methods have utility to horizontally-disposed furnaces for silicon wafers and to vertically-oriented furnaces in which larger wafers can be thermally processed. A selectively-sealable process tube encloses silicon wafers during heating of the silicon wafers to a predetermined temperature, and a heating atmosphere supply system induces through the process tube a positive flow of a process gas, such as hydrogen or argon, that is non-reactive with solid silicon at the predetermined temperature. A process tube outlet vents gas from the process tube, and an impurity sensor in the process tube outlet detects oxygen and moisture in the vented gas to verify the purity of the atmosphere surrounding the wafers during thermal processing.

Abstract: A system and method for configuring a video circuit into a low power consumption mode and a high power consumption mode. The system comprises an input signal detection circuit adapted to generate a first signal indicative of whether an input video signal is present at the input of the video circuit; an output load detection circuit adapted to generate a second signal indicative of whether a load is connected to the output of the video circuit; and a control device adapted to generate a third signal to control the power consumption mode of the video circuit in response to the first and second signals. The method entails detecting whether an input video signal is present; detecting whether the load is present; and configuring the video circuit for high power consumption if both the input video signal and the load are present, otherwise configuring the video circuit for low power consumption.

Abstract: Ripple reduction loop for chopper amplifiers and chopper-stabilized amplifiers. The ripple reduction loop includes a first chopper, a first amplifier having an input coupled to an output of the first chopper, a second chopper having an input coupled to an output of the first amplifier, a second amplifier having an input coupled to an output of the second chopper, a third chopper, an output of the second amplifier having its output capacitively coupled to an input of the third chopper as the only input to the third chopper, a third amplifier coupled as an integrator having an input coupled to an output of the third chopper, an output of the integrator being coupled to combine with the output of the first amplifier as the input of the second chopper, and at least one Miller capacitor coupled between an output of the second amplifier and the input of the second amplifier. Various embodiments are disclosed.

Abstract: A single operational transconductance pipelined ADC incorporating a sample/hold amplifier and multiple MDAC stages. An input signal is sampled on input signal sampling capacitors, and then coupled around an operational transconductance amplifier (OTA) so that the output of the OTA is equal to the sampled voltage. There is no net charge transfer in this operation, so the noise and power dissipation normally associated with an input sample and hold circuitry (SHA) in a pipelined ADC is substantially eliminated. A pipelined ADC using a shared OTA for sample/hold and two MDACs is disclosed.

Abstract: Methods and systems for digital control utilizing oversampling.

Abstract: A method for providing a semiconductor chip package with side wettable plating includes singulating a semiconductor chip package from an array of packages formed in a block format, immersing the semiconductor chip package in a bath of plating solution, contacting a lead land of the semiconductor chip package with conductive contact material within the bath of plating solution, connecting the conductive contact material to a cathode electrical potential, connecting an anode within the bath of plating solution to an anode electrical potential, and plating the lead land of the semiconductor chip package.

Abstract: Encoding of a dual mode digital signal for transfer using a dual mode super source follower circuit to drive the signal across a pulse transformer is presented. The dual mode signal includes data in one mode and power/control in the other mode. In the power/control mode the magnitude of the signal pulses are greater than the magnitude of the data pulses. Thus, the current sinking deficiencies of the super source follower may introduce waveform irregularities when transitioning from the high of the power pulse to the high of the data pulse. An encoding method described herein uses a return to zero scheme to avoid such waveform irregularities during power to data transitions.

Abstract: A tamper resistant keypad includes one or more key assemblies having a resilient key member and a contact. The resilient key member is configured to flex when the key assembly is depressed to allow the contact to close a key press detection circuit on a circuit board to register a key press. A tamper detection switch assembly at least partially surrounds the resilient key member. The tamper detection switch assembly is configured to detect attempts to access the key assembly.

Abstract: A multiple sensor-types integrated circuit device includes a semiconductor die including a first sensor type and a second sensor type formed thereon, an electrically insulating package enclosing the semiconductor die and a plurality of electrically conductive leads coupled to the semiconductor die and extending from the package. By way of example and not limitation, a multiple sensor-types integrated circuit die includes a semiconductor substrate of a first polarity, a plurality of regions of the first polarity formed in the substrate, where the plurality of regions are relatively more heavily doped than the substrate, multiple wells formed in the substrate, and a covering layer formed over the substrate.

Abstract: A data transmission technique where high speed data is transmitted differentially in a forward channel by way of a serial link, and relatively low speed data is differentially modulated onto the forward channel signal for transmission in a reverse channel via the link. By utilizing differential modulation in both forward and reverse channels, the resulting signal has a common mode voltage that is substantially constant, resulting in low EMI. The spectral content of the signal associated with the high speed data may be substantially non-overlapping with the spectral content of the signal associated with the low speed data. This facilitates the recovery of the high speed data and low speed data with minimal interference. The differential signaling lends itself for communicating data via an inexpensive medium, such as twisted wire pair or parallel PCB traces. The data transmission technique applies to various communication network topologies: point-to-point, daisy-chain, and point-to-multiple points.

Abstract: An apparatus that includes a module for controlling the frequency of a voltage controlled oscillator (VCO) as part of a phase locked loop (PLL), or clock and data recovery (CDR) when an input reference signal to the PLL or serial data to the CDR has ceased from being received. In particular, the apparatus comprises a VCO adapted to generate a VCO clock signal, a first control module adapted to control the frequency of the VCO clock signal based on the input reference signal, and a second control module adapted to control the frequency of the VCO clock signal in response to an absence of the input reference signal. By controlling the frequency of the VCO clock signal during an absence of the input reference signal, the first control module is able to more easily re-acquire control the frequency of the VCO clock signal when the input reference signal is received again.

Abstract: An IC package including one or more z-axis interconnects for performing at least in part the fan-in/fan out interconnection for electrically coupling contacts of semiconductor die to external contacts of the package. The z-axis interconnect comprises a matrix of electrically conducting elements extending from the top to the bottom surface of the interconnect. Each conductive element is internally insulated from other conductive elements of the matrix. The semiconductor contacts may be electrically coupled to separate portions of the matrix by way of electrical connections to the top of the z-axis interconnect. Similarly, the external contacts of the package may be electrically coupled to the same separate portions of the matrix by way electrical connections to the bottom of the interconnect. The z-axis interconnect improves the miniaturization, integration, thermal and electrical performance of IC packages.

Abstract: A method for hybrid video coding is disclosed. The method generally includes the steps of (A) calculating a bit rate based on a percentage of quantized zero coefficients resulting from encoding a plurality of components of a video signal, (B) calculating a distortion based on the percentage of quantized zero coefficients, (C) calculating a plurality of variances of a plurality of prediction error pictures and (D) calculating an adaptive Lagrangian multiplier in a Lagrangian rate-distortion optimization as a function of the bit rate, the distortion and the variance to minimize a Lagrangian cost.

Abstract: Check valve package for pb-free, single piece electronic modules, the package having an exterior and an interior, and at least one electronic device mounted within the interior of the package electrically connected to a lead-free solder ball grid array on a surface of the package, the package having a check valve between the interior and exterior of the package configured to allow flow from the interior to the exterior and to prevent flow form the exterior to the interior. The package withstands the solder reflow temperatures for the reflow of the pb-free solder balls of a ball grid array packaging of an NVSRAM during mounting on a circuit board. The package is suitable for packaging circuits containing rechargeable batteries and for packaging other electronic devices.

Abstract: A temperature sensing circuit is described providing a low power temperature sensing system. The temperature sensing circuit provides a digital method for determining the temperature by analyzing the change in electrical response characteristics of a circuit device.

Abstract: WLP semiconductor devices include bump assemblies that have a barrier layer for inhibiting electromigration within the bump assemblies. In an implementation, the bump assemblies include copper posts formed on the integrated circuit chips of the WLP devices. Barrier layers formed of a metal such as nickel (Ni) are provided on the outer surface of the copper posts to inhibit electromigration in the bump assembly. Oxidation prevention caps formed of a metal such as tin (Sn) are provided over the barrier layer. Solder bumps are formed over the oxidation prevention caps. The oxidation prevention caps inhibit oxidation of the barrier layer during fabrication of the bump assemblies.

Abstract: An enhanced redistribution layer is provided that geometrically expands redistribution layer (RDL) pads associated with a ball grid array of a wafer level package (WLP) to provide tensile stress relief during temperature cycle and/or drop testing of the WLP.

Abstract: A secure key scanning functionality drives the row lines and column lines of a key switch array with randomized pulses of different polarities, and drives signals in one direction from a row line through a pressed key and to a column line as well as in an opposite direction from the column line through the pressed key and to the row line. To make unauthorized detecting of key presses more difficult, row lines and column lines are driven with pulses that appear as actual key press conditions when in fact the pulses are dummy pulses and no corresponding key has been pressed. In one novel aspect, dummy pulses are generated so that the line being driven with the dummy pulses has the same sustained and consistent waveform as the intersecting row and column lines that have identical waveforms due to the actual key press.