Abstract: A GNSS receiver includes a sensing element for detecting an environmental condition, a control unit for dynamically calculating a sleep time duration in response to the environmental condition, and a digital processing unit that operates in a first mode or in a second mode based on the calculated sleep time duration and the environmental condition. The environmental condition may include a receiver signal strength indicator, a receiver velocity, the stability and precision of a local reference clock, a recent almanac, an ephemeris data, and the like. The first operation mode may include a tracking of satellite signals, and the second operation mode may include an acquisition operation, a tracking operation, or a combination of acquisition and tracking operations of satellite signals.

Abstract: A GNSS receiver includes a radio frequency module and an antenna for acquiring and tracking signals from various satellites and demodulating them to an intermediate frequency or a baseband signal. The receiver also includes a processing unit for processing the demodulated signals to obtain a first position, velocity, and time (PVT fix) data and displays the data to a user. The receiver may include a memory unit for storing the obtained PVT fix. The receiver may further include one or more sensors for detecting a motion of the receiver and provide an index to the processing unit that determines a next position of the receiver based on the index during a coverage gap. The one or more sensors may include an accelerometer, a compass, or a combination thereof.

Abstract: A circuit for self-calibrating a gain control system samples the output of a digital amplifier coupled in series with one or more analog amplifiers to correct errors in a discrete stepped gain control. A digital gain control circuit controls both the digital amplifier and at least one analog amplifier to produce a smooth linear and continuous gain, wherein perturbations in the digital control of gain are smoothed by a signal applied to gain control circuit by a gain step correction circuit.

Abstract: A method for securely generating and distributing encryption keys includes generating, by a secured server, a pair of keys including a first key and a second key and providing, by a key distributing unit, the first key to a first recipient and a second key to a second recipient. The first recipient may use the first key to encrypt a data file and send the encrypted data file via a non-volatile memory device to a target subscriber. The second recipient may program the second key into an one-time-programmable register contained in a secure element during a manufacturing process. The secure element may further include a random access memory configured to store an image of the encrypted data file, a read-only memory containing a boot code, and a processing unit coupled to the random-access memory and the read-only memory and operative to decrypt the encrypted data file.

Abstract: A wireless communication receiver includes a multitude of look-up tables each storing a multitude of DC offset values associated with the gains of an amplification stage disposed in the wireless communication receiver. The entries for each look-up table are estimated during a stage of the calibration phase. During such a calibration stage, for each selected gain of an amplification stage, a search logic estimates a current DC offset number and compares it to a previous DC offset estimate that is fed back to the search logic. If the difference between the current and previous estimates is less than a predefined threshold value, the current estimate is treated as being associated with the DC offset of the selected gain of the amplification stage and is stored in the look-up table. This process is repeated for each selected gain of each amplification stage of interest until the look-up tables are populated.

Abstract: A circuit for self-calibrating a gain control system samples the output of a digital amplifier coupled in series with one or more analog amplifiers to correct errors in a discrete stepped gain control. A digital gain control circuit controls both the digital amplifier and at least one analog amplifier to produce a smooth linear and continuous gain, wherein perturbations in the digital control of gain are smoothed by a signal applied to gain control circuit by a gain step correction circuit.

Abstract: An approach for Soft-output K-Best MIMO detection comprises computing an estimated symbol vector and Log-Likelihood Ratio (LLR) values for transmitted bits. The approach includes a relevant discarded paths selection process, a last-stage on-demand expansion process, and a relaxed LLR computation process. The relevant discarded paths selection process includes analyzing the K-Best paths and discarded paths at each intermediate tree level and selecting only those discarded paths for further processing that will help in LLR computation for at least one of the transmitted bits. The last-stage on-demand expansion process includes expanding K paths at the tree level 2NT?1 (NT=number of transmit antennas) on-demand to only 2K?1 lowest Partial Euclidean Distance (PED) paths at last tree level 2NT. The relaxed LLR computation scheme includes approximating LLR computations by assuming that discarded path PED is greater than or equal K-Best path PED.

Abstract: A system and method for improving acquisition sensitivity and tracking performance of a GPS receiver using multiple antennas is provided. In an embodiment, the acquisition sensitivity can be improved by determining the correlation weight of each received path signal path associated with one antenna form a plurality of antennas and then combining the path signals based on their respective correlation weight. In another embodiment, carrier offset correction information of each path signal is individually determined and then summed together to be used for tracking the code phase in a code phase tracking loop. The code phase tracking loop generates an early code and a late code that are used to determine the code phase error. The system includes notch and bandpass filters to mitigate narrowband and broadband noises of a received GPS signal, wherein the digital adaptive filters are switched on periodically or by external events.

Abstract: Systems and methods for extracting synchronization information from ambient signals, such as broadcast television signals, and using the synchronization information as a reference for correcting the local time base so that a GNSS positioning receiver system maintains relative time base accuracy with respect to a GNSS time.

Abstract: A method for authenticating and deciphering an encrypted program file for execution by a secure element includes receiving the program file and a digital certificate that is associated with the program file from an external device. The method stores the program file and the associated certificate in a secure random access memory disposed in the secure element and hashes the program file to obtain a hash. The method authenticates the program file by comparing the obtained hash with a checksum that is stored in the certificate. Additionally, the method writes runtime configuration information stored in the certificate to corresponding configuration registers disposed in the secure element. The method further generates an encryption key using a seed value stored in the certificate and a unique identifier disposed in the secure element and deciphers the program file using the generated encryption key.

Abstract: A method of generating an encryption key during the manufacturing process of a device includes randomly generating a seed, encrypting a unique identifier disposed in the device to obtain a first encryption key, encrypting the first encryption key using a public key to obtain a second encryption key, and sending the second encryption key and the seed to a software provider. The method further includes receiving the second encryption key and the seed by the software provider and decrypting the second encryption key using a private key to recover the first encryption key. The manufacturer then encrypts a program code using the recovered first encryption key and installs the seed in a certificate that is associated with the encrypted program code.

Abstract: A device for descrambling encrypted data includes a descrambler, a secure link, and a secure element that securely transmits a control word to the descrambler in a normal operating mode. The secure element includes a first secure register, a read-only memory having a boot code, a random-access memory for storing a firmware image from an external memory, and a processor coupled to the first secure register, the read-only memory, and the random access memory. The processor executes the boot code to generate the control word, stores the control word in the first secure register, and send the stored control word to the descrambler through a secure communication link. The descrambler may include a second secure register that is connected to the first secure register through the secure link. The first and second secure registers are not scannable during a normal operation. The secure link contains buried signal traces.

Abstract: A diversity receiver includes a first receiving channel and a second receiving channel. The receiver also includes a baseband processor that computes a difference between the received signal strengths of the signals received from the first and second channels, wherein the processor disables the signal received from the second channel if the difference is greater than a first threshold value and a BER associated with the second receiving channel is greater than a BER threshold value, and disables the signal received from the first channel if the difference is less than the negative first threshold value and the bit error rate (BER) associated with the first channel is greater than the BER threshold value. The receiver further includes a bypass circuit coupled to an input of an amplifier and a RSSI circuit that provides a conduction path between the input and a ground when the RSSI circuit detects a blocker signal.

Abstract: A device includes a demodulator for receiving an encrypted content, an interface unit communicatively coupled to an external memory, and a hardware unit coupled to the demodulator and configured to enable the demodulator to decrypt the received content. The hardware unit includes a processing unit, a ROM having a boot code causing the device to fetch data from the external memory, a RAM for storing the fetched data, multiple non-volatile memory registers or fuse banks, and a mechanism configured to write the stored data to an external storage device in response to a backup event. The data may be encrypted using an encryption key prior to being written to the external storage device. The interface unit may include a wired or wireless communication link. The boot code includes executable instructions performing a series of validations. The device disables the executable instructions in the event of a validation failure.

Abstract: An integrated circuit includes a demodulator for receiving an encrypted message and a hardware unit coupled to the demodulator and configured to enable the demodulator to decrypt the received message. The hardware unit includes a processing unit, a read-only access memory (ROM) having a boot code causing the integrated circuit to fetch data from an external memory, a random access memory (RAM) for storing the fetched data, multiple non-volatile memory registers or fuses, and an interface unit configured to write the data stored in the RAM to an external storage in response to a backup event. The data may be encrypted using an encryption key prior to being written to the external storage. The interface unit may include a direct memory access controller. The external memory and the external storage can be a same non-volatile memory, namely a Flash device.

Abstract: An integrated circuit (IC) includes a demodulator for receiving encrypted information data and a hardware unit that enables conditional access to the information data. The hardware unit includes a processing unit, a RAM, a ROM, multiple non-volatile registers, and an interface unit for transferring an attribute to the demodulator. The non-volatile registers may include an IC identification and an encryption key. In an embodiment, the ROM includes a boot code that causes the processing unit to fetch a code from an external memory and store the fetched code in the RAM. The fetched code may include a certificate that ensures the authenticity of the code. The fetched code may be encrypted and decrypted by the ROM using the IC identification and the encryption key. The demodulator includes a descrambler for decrypting the received information data using the attribute. The information data may include digital radio or television content.

Abstract: A programmable active frequency-selective circuit includes a first capacitor having a fixed value and a second capacitor having a value defined by a product of a parameter and a plurality of switchable capacitors, wherein the parameter is defined by a gain, a bandwidth mode, and a process resolution. The parameter may be stored in a form of a look-up table and enables a user or manufacturer to program the gain, select the bandwidth mode and tune the process. The frequency-selective circuit may include a differential input and a differential output having a first feedback path connected across a positive output terminal to a negative input terminal and a second feedback path connected across a negative output terminal and a positive input terminal.

Abstract: A method and an apparatus for achieving fast resynchronization of received signals in a time slice in DVB-T/H systems. When the clock drift is low, the location of the symbol window can be decided based on a previous time slice. When the clock drift is high and when there are large delay spreads, the location of the symbol window can be decided based on the detected scattered pilot positions. The placement of the symbol window can further be enhanced through processing of the received TPS bits.

Abstract: A GNSS receiver communicates with any connectivity device, such as a WiFi device that is, in turn, in communication with a wired network having access to the DTI timing. Such connectivity devices may set their timing and frame synchronization to the DTI and thus serve as Geopositiong beacons, thereby enabling the GNSS receiver to accurately determine its position. The GNSS receiver may also use the DTI timing supplied by such a network to perform relatively long integration time so as to achieve substantially improved sensitivity that is necessary for indoor Geopositioning applications. Furthermore, the GNSS data, such as satellite orbital information, may also be propagated by such devices at high speed. By providing this data to the GNSS receivers via such connectivity devices in a rapid fashion, the GNSS receivers are enabled to receive the transmitted data associated with the satellite without waiting for the GNSS transmission from the satellites.

Abstract: A GNSS system operates intermittently and has adaptive activity and sleep time in order to reduce power consumption. The GNSS system provides an enhanced estimate of its position in the absence of GNSS signals of sufficient strength. The user's activity and behavior is modeled and used to improve performance, response time, and power consumption of the GNSS system. The user model is based, in part, on the received GNSS signals, a history of the user's positions, velocity, time, and inputs from other sensors disposed in the GNSS system, as well as data related to the network. During each activity time, the GNSS receiver performs either tracking, or acquisition followed by tracking. The GNSS receiver supports both normal acquisition as well as low-power acquisition.