Abstract: The techniques described herein relate to analog-assisted feed-forward equalizers. An example apparatus includes a first charge element digital-to-analog converter (DAC) including a first plurality of charge storage elements configured to store first samples of charge based on respective first portions of a digital input signal, and generate, based on the first samples, a first analog output signal proportional to the first portions. The apparatus further includes a second charge element DAC coupled to the first charge element DAC and including a second plurality of charge storage elements configured to store second samples of charge based on respective second portions of the digital input signal, and generate, based on the second samples, a second analog output signal proportional to the second portions, and wherein the coupling of the first and second outputs generates a third analog output signal based on a combination of the first and second analog output signals.

Abstract: Described herein are phased array and transceiver systems with distortion measurement circuitry configured to obtain distortion measurements of system transmitters and provide the distortion measurements to receive beamforming components of the system. Such systems advantageously make use of existing beamforming components of the system to additionally route distortion measurements for baseband DPD processing. Such systems may not need external components to measure signals radiated by antennas of the system or dedicated paths linking system transmitters directly to a baseband processor. In some embodiments, receive beamforming components may be configured to sum distortion measurements from each transmitter to create an aggregate distortion measurement usable as representative of the average transmitter for DPD processing.

Abstract: A compute-in-memory (CIM) device includes a memory cell and calculation circuitry configured to perform a calculation based on an input value and a value stored in the memory cell, and to provide a signal at an output node based on the calculation. The CIM device also includes write circuitry configured to perform a write operation on the memory cell and precharge circuitry configured to precharge the output node in response to the write circuitry performing the write operation.

Abstract: Described herein are techniques for mitigating bandwidth mismatch in time-interleaved (TI) analog-to-digital converters (ADC). The techniques described herein involve spreading the energy associated with spurious tones resulting from bandwidth mismatch across the frequency spectrum, thereby reducing the overall impact of each individual tone. In some embodiments, for example, the tones may disappear under the noise floor. Spreading the energy associated with the spurious tones can be achieved by increasing the periodicity of the phase oscillation. This, in turn, can be achieved by introducing, in the phase oscillation, artificial phase shifts in addition to the phase shifts arising due to bandwidth mismatch. In one example, increasing the periodicity of a phase oscillation from 4 phase samples to 8 phase samples can result in a reduction in the power of a tone as high as 7 dB.

Abstract: A semiconductor device is provided. The semiconductor device includes a semiconductor fin over a substrate, and a gate structure along sidewalls and the top surface of the semiconductor fin. The gate structure covers the first portion of the semiconductor fin. The semiconductor device also includes a source/drain feature adjacent to the gate structure. The semiconductor device further includes a source/drain contact connected to the source/drain feature. The source/drain contact extends downwards to a position that is lower than the top surface of the first portion of the semiconductor fin.

Abstract: A semiconductor package includes a package substrate having a top surface and a bottom surface, and a stiffener ring mounted on the top surface of the package substrate. The stiffener ring includes a reinforcement rib that is coplanar with the stiffener ring on the top surface of the package substrate. At least two compartments are defined by the stiffener ring and the reinforcement rib. At least two individual chip packages are mounted on chip mounting regions within the at least two compartments, respectively, thereby constituting a package array on the package substrate.

Abstract: A semiconductor package structure is provided. The semiconductor package structure includes a redistribution layer (RDL) structure formed on a non-active surface of a semiconductor die. An antenna structure includes a first antenna element formed in the RDL structure, a first insulating layer covering the RDL structure, a second insulating layer formed on the first insulating layer, and a second antenna element formed on and in direct contact with the second insulating layer.

Abstract: The techniques described herein relate to methods, apparatus, and computer readable media configured to encode or decode video data. A current block of video data is coded using affine prediction. A first set of candidates of a candidate list for the current block is generated, including determining one or more inherited candidates and deriving one or more constructed candidates. After generating the first set of candidates, it is determined whether the candidate list is full. Upon determining the candidate list is not full, the candidate list is filled by generating a second set of candidates of the candidate list, including one or more of generating one or more zero motion vector candidates, generating one or more additional derived candidates based on the plurality of associated neighboring blocks of the current block, and generating a temporal motion vector candidate based on a temporal collocated picture.

Abstract: A charger circuit for use in controlling charge of a battery pack, which includes a charge control switch, a discharging circuit and a control unit. The charger circuit has at least one power output terminal and one connection terminal for coupling the battery pack. The charge control switch is arranged to selectively provide a power from a power source to the battery pack through the power output terminal. The discharging circuit is selectively coupled to the power output terminal, and arranged to discharge a battery cell of the battery pack when being coupled to the power output terminal. The control unit is coupled to the charge control switch and the discharging circuit, and determines whether to turn off the charge control switch and control the discharging circuit to couple to the power output terminal according to at least an over-voltage detection based on a signal based on the connection terminal.

Abstract: A delay tracking method and a memory system are provided. The delay tracking method is applied to a memory system supporting a low-frequency-mode (LFM) and a high-frequency-mode (HFM) of an operating clock. The delay tracking method includes the steps of selecting a LFM oscillator for obtaining a LFM delay value when the operating clock is in the HFM; and selecting a HFM oscillator for obtaining a HFM delay value when the operating clock is in the LFM.

Abstract: According to at least one aspect, a device is provided. The device comprises: a connector configured to electrically couple to an external device and comprising a plurality of terminals including a supply terminal; a monitoring circuit coupled to the supply terminal and configured to apply an electrical signal to the supply terminal and measure at least one of a voltage level and a current level on the supply terminal; a controller communicatively coupled to the monitoring circuit and configured to: determine whether an impedance between the supply terminal and at least one other terminal in the plurality of terminals is above a threshold using the at least one of the voltage level and the current level on the supply terminal; and output at least one message responsive to the impedance being below the threshold.

Abstract: The invention provides a semiconductor package and a method for fabricating a base for a semiconductor package. The semiconductor package includes a base. The base has a device-attach surface. A radio-frequency (RF) device is embedded in the base. The RF device is close to the device-attach surface.

Abstract: A method for determining a location of a target includes: obtaining a plurality of guess distance values of a plurality of satellites, respectively; utilizing satellite signals received from the plurality of satellites to estimate a plurality of pseudo range values of the plurality of satellites, respectively; comparing the guess range values with the pseudo range values to generate a residual vector; and utilizing a processing unit for applying a rank-based approach based on the residual vector to generate a calculation result. The location of the target is derived from the calculation result.

Abstract: The techniques described herein relate to methods, apparatus, and computer readable media configured to encode an image or video. A slice is partitioned into a set of first units. For each first unit in the set of first units, the first unit is partitioned into a set of second units. The partitioning includes, for each second unit in the set of second units, determining whether the second unit satisfies a predetermined constraint. If the second unit does not satisfy the predetermined constraint, a first set of partitioning techniques is tested to partition the second unit. If the second unit satisfies the predetermined constraint, the first set of partitioning techniques and a second set of partitioning techniques are tested to partition the second unit. The second unit is partitioned using a technique from the first set of partitioning techniques or the second set of partitioning techniques identified by the testing.

Abstract: A method and apparatus for texture image compression in a 3D video coding system are disclosed. Embodiments according to the present invention derive depth information related to a depth map associated with a texture image and then process the texture image based on the depth information derived. The invention can be applied to the encoder side as well as the decoder side. The encoding order or decoding order for the depth maps and the texture images can be based on block-wise interleaving or picture-wise interleaving. One aspect of the present invent is related to partitioning of the texture image based on depth information of the depth map. Another aspect of the present invention is related to motion vector or motion vector predictor processing based on the depth information.

Abstract: At least one component for a wireless power transmitter or a wireless power receiver. The at least one component includes a mechanical structure and/or circuitry configured to maintain and/or adjust a coupling coefficient K between the wireless power transmitter and the wireless power receiver, a loaded quality factor Q of the wireless power receiver, or both, such that K times Q is less than a constant.

Abstract: An analog-to-digital converting system includes at least one first main analog-to-digital converting unit, at least one second main analog-to-digital converting unit, at least one auxiliary analog-to-digital converting unit, and a calibration unit. Each first main analog-to-digital converting unit is located on a first channel. The first channel includes sample period. Each first main analog-to-digital converting unit receives a first sampling value. Each first sampling value includes a first sample clock. An analog-to-digital converting method calibrates timing-skew of the analog-to-digital converters by delaying a time difference on the sampling value.

Abstract: Apparatus and methods for sensing current carried by one or more planar conductors is described. A plurality of sensing coils may be fabricated adjacent to one or more planar, current-carrying conductors. The sensing coils may detect a magnetic field generated by time-varying current flowing through the one or more planar conductors. The sensing coils may be arranged to cancel uniform and linear-gradient magnetic fields.

Abstract: An amplifier circuit that includes a first power amplifier configured to drive a load and a second power amplifier configured to drive the load through an impedance step-up network. The impedance step-up network is connected to an output of the second power amplifier. The impedance step-up network is configured to switch into a first mode to present an increased impedance to the first power amplifier, and switch into a second mode in which the impedance step-up network steps-up an impedance seen by the second power amplifier looking into the impedance step-up network.

Abstract: The invention provides a semiconductor package and a method for fabricating a base for a semiconductor package. The semiconductor package includes a conductive trace embedded in a base. A semiconductor device is mounted on the conductive trace via a conductive structure.