Abstract: A neural network optimization method with a preview mechanism includes: in a preview stage, building an optimization space and obtaining multiple previewed results from the optimization space; generating an updating signal according to a reference value corresponding to the multiple previewed results, and processing the optimization space received in the preview stage according to the reference value; and in a view stage, receiving the optimization space and the updating signal, and processing the optimization space received in the view stage according to the updating signal to generate an optimization result.

Abstract: A method of NAT64 translation includes discovering NAT64-Prefix by an IPv6 host, generating IPv4 connectivity by a customer-side translator (CLAT) device according to NAT64-Prefix, notifying the IPv4 connectivity to a private IPv4 (v4p) host, and notifying IPV4 header configuration to the v4p host by the CLAT device. The IPV4 header configuration includes a header length. The method further includes increasing a header length of the IPv4 header by the v4p host.

Abstract: A beam management method of an electronic device includes transmitting a detecting signal, receiving a reflecting signal of the detecting signal, determining blocked antennas of an antenna array of the electronic device according to the reflecting signal, and exciting only unblocked antennas of the antenna array. This will improve the radiation efficiency of the antenna array.

Abstract: A minimum IC operating voltage searching method includes acquiring a corner type of an IC, acquiring ring oscillator data of the IC, generating a first prediction voltage according to the corner type and the ring oscillator data by using a training model, generating a second prediction voltage according to the ring oscillator data by using a non-linear regression approach under an N-ordered polynomial, and generating a predicted minimum IC operating voltage according to the first prediction voltage and the second prediction voltage. N is a positive integer.

Abstract: A non-coherent noise reduction method, comprising: (a) receiving a plurality of input audio sensing signals by a processor, wherein the input audio sensing signals correspond to a plurality of channels responsive to sensing by a plurality of audio sensors; (b) detecting whether non-coherent noise exists in at least one of the channels by a non-coherent noise detector; (c) estimating at least one noise power of the non-coherent noise by a noise power estimator, if the non-coherent noise exists in at least one of the channels; (d) deriving at least one noise contour of the non-coherent noise by a noise contour estimator, if the non-coherent noise exists in at least one of the channels; and (e) enhancing the input audio sensing signals according to the noise power and the noise contour if the non-coherent noise exists in at least one of the channels.

Abstract: A multi-bank memory includes: a pair of far banks coupled to a first word line and a first pair of local bitlines, respectively; a pair of near banks coupled to a second word line and a second pair of local bitlines, respectively; a far global bit line coupled to the first pair of local bitlines; a first NAND gate having a first input coupled to the second pair of local bitlines and a second input coupled to the far global bit line; a near global bit line coupled to the output of the first NAND gate; and a global input/output (I/O) circuit, coupled to the near global bit line, for outputting data.

Abstract: A DAC cell circuit includes: at least a DAC cell, including: a first MOSFET having a drain coupled to a first switch for receiving a first current and coupled to a second switch for generating a second current, a source coupled to ground, and a gate coupled to a first bias voltage; a capacitor coupled between the gate and the drain of the first MOSFET; and a dead-band switch coupled between the gate of the first MOSFET and the bias node. The dead-band switch is controlled by a signal which is periodic with respect to a frequency equal to an input data rate of the DAC cell, and the dead-band switch is open during a data transition.

Abstract: A digital compute-in-memory (DCIM) system includes a first DCIM macro. The first DCIM macro includes a first memory cell array and a first arithmetic logic unit (ALU). The first memory cell array has N rows that are configured to store weight data of a neural network in a single weight data download session, wherein N is a positive integer not smaller than two. The first ALU is configured to receive a first activation input, and perform convolution operations upon the first activation input and a single row of weight data selected from the N rows of the first memory cell array to generate first convolution outputs.

Abstract: A system for dynamically adjusting neural network efficiency of a dynamic neural network running on a device includes a detector and a signal generator. The detector is arranged to detect a change of a status of the device, to generate a trigger signal. The signal generator is arranged to generate a control signal according to the trigger signal, to dynamically adjust the neural network efficiency of the dynamic neural network.

Abstract: A PCIe clock detection circuit includes a clock detector, a clock receiver, a counter coupled to the clock receiver, a multiplexer coupled to the counter, and an AND gate coupled to the clock detector and the multiplexer. The clock detector is used to detect amplitude of a clock signal and generate a clock detection signal accordingly. The clock receiver is used to generate a reference clock signal according to the clock signal. The counter is used to generate a counter signal according to the reference clock signal. The multiplexer is used to generate a MUX output signal according to the counter signal and a reference signal. The AND gate is used to generate a clock detection output signal according to the clock detection signal and the MUX output signal.

Abstract: A digital compute-in-memory (DCIM) macro includes a memory cell array and an arithmetic logic unit (ALU). The memory cell array stores weight data of a neural network. The ALU receives parallel bits of a same input channel in an activation input, and generates a convolution computation output of the parallel bits and target weight data in the memory cell array.

Abstract: A power management system includes at least one device, at least one memory management unit (MMU), a processor, and at least one device controller, wherein the at least one MMU corresponds to the at least one device, respectively. The processor is arranged to execute at least one access control power manager, an operating system (OS), and a hypervisor, wherein the OS is arranged to generate a trigger signal, and the hypervisor is arranged to generate a first hint according to the trigger signal. The at least one device controller is arranged to control the at least one access control power manager according to the first hint, to manage at least one power of the at least one MMU.

Abstract: An antenna device can include an antenna and a supporting member. The antenna is used to radiate an electromagnetic wave. The supporting member is used to accommodate and support the antenna. The supporting member has a storage space where the antenna is disposed. The supporting member further has a first aperture facing the first direction, and a second aperture facing a second direction different from the first direction. The antenna radiates the electromagnetic wave in the first direction through the first aperture and in the second direction through the second aperture.

Abstract: This application provides a voice device and a voice interaction method of the voice device. The voice device includes at least two voice modules, and the voice interaction method includes: determining the working statuses of the at least two voice modules, selecting one of the two voice modules to execute voice interaction based on preset principles and the working statuses of the at least two voice modules, and suspending the voice interaction of other voice module(s). This application can solve the problem of conflicts between multiple kinds of voice services in the same voice device.

Abstract: Various schemes pertaining to designs of distributed-tone resource units (dRUs) on a partial bandwidth in a 6 GHz low-power indoor (LPI) system are described. An apparatus distributes a plurality of subcarriers of a resource unit (RU) to generate a dRU over a partial bandwidth of a bandwidth. The apparatus then communicates with a communication entity using the dRU.

Abstract: A physical protocol data unit (PPDU) transmission method includes: setting parameters of each of a plurality of links for enabling the plurality of links to have different capacity for PPDU transmission, wherein parameters of one link are different from parameters of another link, and highest capacity supported by the one link is higher than highest capacity supported by the another link; aligning an ending time instant of transmission of a first PPDU transmitted via the one link with an ending time instant of transmission of a second PPDU transmitted via the another link through setting a content that is carried by the first PPDU transmitted via the one link; and transmitting PPDUs via the plurality of links, wherein one PPDU is transmitted via each of the plurality of links, and the PPDUs include the first PPDU and the second PPDU.

Abstract: Solutions pertaining to user equipment (UE) behavior for failed registration request or service request for emergency services fallback in mobile communications are proposed. An apparatus implemented in a UE determines a failure in attempting to initiate a mobility registration request procedure or a service request procedure with a network to perform an emergency service fallback. In response to the determining, the apparatus performs one or more operations including at least a UE non-access-stratum (NAS) layer in a 5th Generation Mobility Management (5GMM) protocol informing an upper layer in the 5GMM protocol of the failure to cause the upper layer to attempt an emergency call in a different domain or via a different network.

Abstract: An antenna system includes a first transformer, a first transceiver, a first switch, a second switch and an antenna. The first transformer includes a primary winding, and a secondary winding. The primary winding includes a first terminal and a second terminal, and the secondary winding includes a first terminal and a second terminal. The first transceiver is coupled to the first terminal of the primary winding of the first transformer. The first switch is coupled between the first terminal of the secondary winding of the first transformer and a ground. The second switch is coupled between the second terminal of the secondary winding of the first transformer and the ground. The antenna is coupled to the first terminal and the second terminal of the secondary winding of the first transformer. The antenna is a differential antenna.

Abstract: A dynamic bias voltage circuit for providing a bias voltage includes: a buffer circuit, a voltage divider circuit and a voltage follower circuit. The buffer circuit is configured to output a second voltage according to a first voltage. The voltage divider circuit is coupled to the buffer circuit and configured to implement a voltage division function to provide a third voltage according to the second voltage and a pad voltage on a pad of the integrated circuit. The voltage follower circuit is coupled to the voltage divider circuit and configured to generate the bias voltage according to the third voltage.

Abstract: A calibration apparatus for calibrating a transceiver includes a loop back circuit, an estimation circuit, and a calibration circuit. The loop back circuit is coupled between a mixer output port of a transmitter (Tx) of the transceiver and a mixer input port of a receiver (Rx) of the transceiver, and applies a sequence of different loop gains. The estimation circuit receives a loop back receiving signal that is output from the Rx under the sequence of different loop gains, and generates at least one estimated value of impairment of the transceiver by performing channel estimation according to at least the loop back receiving signal. The calibration circuit performs calibration upon the transceiver according to the at least one estimated value.