Patents Assigned to MEMC Electronics Materials, Inc.
  • Patent number: 7566951
    Abstract: A silicon structure with improved protection against failures induced by excess radiation-induced charge carrier migration from the bulk region into the near-surface region. The structure comprises bulk and near-surface regions that are doped with a dopant, wherein the concentration in the near-surface region is at least 10 times the maximum concentration, c, of dopant in the bulk region. The structure further comprises a transition region between the bulk and near-surface regions extending less than about 1 ?m from the near-surface region toward the central plane.
    Type: Grant
    Filed: April 21, 2006
    Date of Patent: July 28, 2009
    Assignee: MEMC Electronic Materials, Inc.
    Inventor: Michael R. Seacrist
  • Patent number: 7559825
    Abstract: Semiconductor wafers have a front surface, a back surface, a notch, and an edge. A method of polishing a wafer includes polishing at least one of the surfaces and the notch of the wafer using a polishing pad and slurry. At least one surface of the wafer is cleaned of residual slurry. The cleaned surface is grasped by applying a vacuum to the cleaned surface of the wafer using a vacuum chuck. Edge of the wafer is polished using a pad and slurry while the wafer is grasped by the vacuum chuck.
    Type: Grant
    Filed: December 21, 2006
    Date of Patent: July 14, 2009
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Henry Frank Erk, Judith Ann Schmit, Roland Vandamme
  • Patent number: 7521382
    Abstract: The present invention generally relates to a high resistivity CZ silicon wafer, or a high resistivity silicon structure derived therefrom, and a process for the preparation thereof. In particular, the high resistivity silicon structure comprises a large diameter CZ silicon wafer as the substrate thereof, wherein the resistivity of the substrate wafer is decoupled from the concentration of acceptor atoms (e.g., boron) therein, the resistivity of the substrate being substantially greater than the resistivity as calculated based on the concentration of said acceptor atoms therein.
    Type: Grant
    Filed: May 18, 2006
    Date of Patent: April 21, 2009
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Robert J. Falster, Vladimir V. Voronkov, Galina I. Voronkova, Anna V. Batunina
  • Publication number: 20090092534
    Abstract: Processes for purifying silicon tetrafluoride source gas by subjecting the source gas to one or more purification processes including: contacting the silicon tetrafluoride source gas with an ion exchange resin to remove acidic contaminants, contacting the silicon tetrafluoride source gas with a catalyst to remove carbon monoxide, by removal of carbon dioxide by use of an absorption liquid, and by removal of inert compounds by cryogenic distillation; catalysts suitable for removal of carbon monoxide from silicon tetrafluoride source gas and processes for producing such catalysts.
    Type: Application
    Filed: September 11, 2008
    Publication date: April 9, 2009
    Applicant: MEMC Electronic Materials, Inc.
    Inventors: Vithal Revankar, Jameel Ibrahim
  • Patent number: 7497907
    Abstract: A vitreous crucible for holding semiconductor material during a moncrystalline ingot growing process has a sidewall. Part of the sidewall is coated with a devitrification promoter and part of the sidewall is substantially free from devitrification promoter coating. When the crucible is heated as it would be during an ingot growing process, the devitrification promoter induces crystallization of portions of the sidewall, thereby forming enhanced stiffness sidewall portions. Areas that are substantially free from devitrification promoters remain vitreous and are softened by the heat. These become stress accommodating sidewall portions. Flow of the vitreous material in the stress accommodating sidewall portions relieves stresses that would otherwise build up in the sidewall.
    Type: Grant
    Filed: July 23, 2004
    Date of Patent: March 3, 2009
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: John D. Holder, Richard J. Phillips
  • Patent number: 7485928
    Abstract: A process for the preparation of low resistivity arsensic or phosphorous doped (N+/N++) silicon wafers which, during the heat treatment cycles of essentially any arbitrary electronic device manufacturing process, reliably form oxygen precipitates.
    Type: Grant
    Filed: November 9, 2005
    Date of Patent: February 3, 2009
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Robert J. Falster, Vladimir Voronkov, Gabriella Borionetti
  • Publication number: 20090004458
    Abstract: This invention generally relates to a process for suppressing silicon self-interstitial diffusion near the substrate/epitaxial layer interface of an epitaxial silicon wafer having a heavily doped silicon substrate and a lightly doped silicon epitaxial layer. Interstitial diffusion into the epitaxial layer is suppressed by a silicon self-interstitial sink layer comprising dislocation loops.
    Type: Application
    Filed: June 29, 2007
    Publication date: January 1, 2009
    Applicant: MEMC Electronic Materials, Inc.
    Inventors: Robert J. Falster, Vladimir V. Voronkov, Luca Moiraghi, DongMyun Lee, Chanrae Cho, Marco Ravani
  • Publication number: 20090004426
    Abstract: This invention generally relates to a process for suppressing oxygen precipitation in epitaxial silicon wafers having a heavily doped silicon substrate and a lightly N-doped silicon epitaxial layer by dissolving existing oxygen clusters and precipitates within the substrate. Furthermore, the formation of oxygen precipitates is prevented upon subsequent oxygen precipitation heat treatment.
    Type: Application
    Filed: June 29, 2007
    Publication date: January 1, 2009
    Applicant: MEMC Electronic Materials, Inc.
    Inventors: Robert J. Falster, Luca Moiraghi, DongMyun Lee, Chanrae Cho, Marco Ravani
  • Patent number: 7465351
    Abstract: A method of servicing multiple crystal forming apparatus with a single melter assembly is provided. The method includes the steps of positioning the melter assembly relative to a first crystal forming apparatus for delivering molten silicon to a crucible of the first apparatus. A heater in the melter assembly is operated to melt source material in a melting crucible. A stream of molten source material is delivered from the melter assembly to the first crystal forming apparatus. The melter assembly is positioned relative to a second crystal forming apparatus for delivering molten silicon to a crucible of the second apparatus. A stream of molten source material is transferred from the melter assembly to the second crystal forming apparatus.
    Type: Grant
    Filed: June 17, 2005
    Date of Patent: December 16, 2008
    Assignee: MEMC Electronic Materials, Inc.
    Inventor: John Davis Holder
  • Patent number: 7462246
    Abstract: A susceptor for supporting wafers during an chemical vapor deposition process. The susceptor has recesses and orifices disposed in the recesses extending to a central passage of the susceptor. The susceptor has exhaust openings disposed in the top of the susceptor to allow gas from the central passage of the susceptor to exit out the openings. A baffle plate covers the exhaust openings and a vertical space is created between the baffle plate and the top of the susceptor to allow gas to exit from the central passage to outside the susceptor. The bottom of the susceptor also has exhaust openings disposed therein. These openings allow gas from the central passage to exit the susceptor.
    Type: Grant
    Filed: April 15, 2005
    Date of Patent: December 9, 2008
    Assignee: MEMC Electronic Materials, Inc.
    Inventor: Lance G. Hellwig
  • Patent number: 7442253
    Abstract: The present invention is directed to a process for producing a silicon wafer which, during the heat treatment cycles of essentially any arbitrary electronic device manufacturing process, may form an ideal, non-uniform depth distribution of oxygen precipitates and may additionally contain an axially symmetric region which is substantially free of agglomerated intrinsic point defects. The process either comprises exposing the wafer's front and back surfaces to different atmospheres, or thermally annealing two wafers in a face-to-face arrangement.
    Type: Grant
    Filed: May 24, 2007
    Date of Patent: October 28, 2008
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Robert J. Falster, Joseph C. Holzer, Marco Cornara, Daniela Gambaro, Massimiliano Olmo, Steve A. Markgraf, Paolo Mutti, Seamus A. McQuaid, Bayard K. Johnson
  • Patent number: 7431765
    Abstract: A process for producing a single crystal silicon wafer comprising a front surface, a back surface, a lateral surface joining the front and back surfaces, a central axis perpendicular to the front and back surfaces, and a segment which is axially symmetric about the central axis extending substantially from the front surface to the back surface in which crystal lattice vacancies are the predominant intrinsic point defect, the segment having a radial width of at least about 25% of the radius and containing agglomerated vacancy defects and a residual concentration of crystal lattice vacancies wherein (i) the agglomerated vacancy defects have a radius of less than about 70 nm and (ii) the residual concentration of crystal lattice vacancy intrinsic point defects is less than the threshold concentration at which uncontrolled oxygen precipitation occurs upon subjecting the wafer to an oxygen precipitation heat treatment.
    Type: Grant
    Filed: March 24, 2005
    Date of Patent: October 7, 2008
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Robert J. Falster, Vladimir V. Voronkov, Paolo Mutti, Francesco Bonoli
  • Patent number: 7404856
    Abstract: The present invention relates to a process for forming single crystal silicon ingots or wafers that contain an axially symmetric region in which vacancies are the predominant intrinsic point defect, that are substantially free of oxidation induced stacking faults, and are nitrogen doped to stabilize oxygen precipitation nuclei therein.
    Type: Grant
    Filed: January 15, 2007
    Date of Patent: July 29, 2008
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Hiroyo Haga, Takaaki Aoshima, Mohsen Banan
  • Patent number: 7344594
    Abstract: A method of charging a crystal forming apparatus with molten source material is provided. The method includes the steps of positioning a melter assembly relative to the crystal forming apparatus for delivering molten silicon to a crucible of the apparatus. An upper heating coil in the melter assembly is operated to melt source material in a melting crucible. A lower heating coil in the melter assembly is operated to allow molten source material to flow through an orifice of the melter assembly to deliver a stream of molten source material to the crucible of the crystal forming apparatus. The invention is also directed to a method of charging a crystal puller with molten silicon including the step of removing an upper housing of the crystal puller defining a pulling chamber from a lower housing of the crystal puller defining a growth chamber and attaching the lower housing in place of the upper housing.
    Type: Grant
    Filed: June 17, 2005
    Date of Patent: March 18, 2008
    Assignee: MEMC Electronic Materials, Inc.
    Inventor: John Davis Holder
  • Patent number: 7323421
    Abstract: A process for etching silicon wafers using a caustic etchant in the form of an aqueous solution comprising water, a hydroxide ion source, and a chelating agent. The process produces silicon wafers substantially free from diffused metal ions.
    Type: Grant
    Filed: June 14, 2005
    Date of Patent: January 29, 2008
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Mark G. Stinson, Henry F. Erk, Guoqiang (David) Zhang, Mick Bjelopavlic, Alexis Grabbe, Jozef G. Vermeire, Judith A. Schmidt, Thomas E. Doane, James R. Capstick
  • Patent number: 7291222
    Abstract: The invention is directed to apparatus and methods for measuring and for reducing dust in granular polysilicon. In one aspect, a system includes a process vessel having a vacuum port for pulling dust from the polysilicon. Another system of the invention includes a baffle tube for receiving a polysilicon flow. A measuring system includes a manifold and filter for separating and measuring the dust from a flow of polysilicon. The invention is also directed to methods of using the systems, to methods of manufacturing and packaging granular polysilicon, and to a supply of granular polysilicon.
    Type: Grant
    Filed: August 31, 2004
    Date of Patent: November 6, 2007
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: John D. Holder, Hariprasad Sreedharamurthy, John D. Hilker
  • Patent number: 7291221
    Abstract: A method and system for use in combination with a crystal growing apparatus for growing a monocrystalline ingot according to a Czochralski process. The crystal growing apparatus has a heated crucible including a semiconductor melt from which the ingot is pulled. The ingot is grown on a seed crystal pulled from the melt. A time varying external magnetic field is imposed on the melt during pulling of the ingot. The magnetic field is selectively adjusted to produce pumping forces in the melt to control a melt flow velocity while the ingot is being pulled from the melt.
    Type: Grant
    Filed: December 30, 2004
    Date of Patent: November 6, 2007
    Assignee: MEMC Electronic Materials, Inc.
    Inventor: Harold W Korb
  • Patent number: 7242037
    Abstract: An electronic power device comprising a single crystal silicon segment being characterized in that the segment comprises a non-uniform distribution of minority carrier recombination centers, the minority carrier recombination centers comprising a substitutional metal, with the concentration of the centers in a bulk layer being greater than the concentration in a surface layer. The centers have a concentration profile in which the peak density of the centers is at or near the central plane with the concentration generally decreasing from the position of peak density in the direction of the front surface of the segment and generally decreasing from the position of peak density in the direction of the back surface of the segment.
    Type: Grant
    Filed: August 5, 2004
    Date of Patent: July 10, 2007
    Assignee: MEMC Electronic Materials, Inc.
    Inventor: Robert J. Falster
  • Patent number: 7229693
    Abstract: The present invention is directed to a silicon wafer which, during the heat treatment cycles of essentially any arbitrary electronic device manufacturing process, may form an ideal, non-uniform depth distribution of oxygen precipitates and may additionally contain an axially symmetric region which is substantially free of agglomerated intrinsic point defects.
    Type: Grant
    Filed: February 16, 2005
    Date of Patent: June 12, 2007
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Robert J. Falster, Joseph C. Holzer, Marco Cornara, Daniela Gambaro, Massimiliano Olmo, Steve A. Markgraf, Paolo Mutti, Seamus A. McQuaid, Bayard K. Johnson
  • Patent number: 7223304
    Abstract: Methods and system for controlling crystal growth in a Czochralski crystal growing apparatus. A magnetic field is applied within the crystal growing apparatus and varied to control a shape of the melt-solid interface where the ingot is being pulled from the melt. The shape of the melt-solid interface is formed to a desired shape in response to the varied magnetic field as a function of a length of the ingot.
    Type: Grant
    Filed: December 30, 2004
    Date of Patent: May 29, 2007
    Assignee: MEMC Electronic Materials, Inc.
    Inventor: Zheng Lu