Abstract: A calibration circuit (20, 50) and method (60) for calibrating the bias current of a VCO (10, 40) to minimize phase noise. The calibration circuit (20, 50) monitors the average voltage at the common-mode node of the VCO (10, 40) while varying the bias current over a predetermined range. The calibration circuit (20, 50) identifies the bias current associated with the minimum average common-mode voltage and utilizes this bias current for calibrating the biasing transistor of the VCO (10, 40).

Abstract: Clock speed is controlled based upon the supply voltage to a digital device. When the supply voltage is below a reference voltage the clock speed will be slower than if the supply voltage is above the reference voltage. A phase-lock-loop (PLL) may be used to generate a higher frequency that is an integer multiple of a reference oscillator. The clock speed will be proportional to the frequency multiplication of the PLL when the faster clock speed is selected. A multiplexer is used to switch between different frequency sources, and a timer can be used to insure stable operation of the PLL. A status configuration register has status and control bits for indicating and controlling operation of the clock speed control. A universal serial bus (USB) device can operate at a slower clock with reduced operating voltage, and at a faster clock with increased operating voltage.

Abstract: A remote keyless entry (RKE) transponder has a noise alarm timer having a time interval used for determining whether a received signal meets a predefined condition within a time interval. If the received signal meets the predefined condition within the time interval, the noise alarm timer is disabled and the RKE transponder circuits are enabled so that normal operation in processing the desired signal commences. If the received signal does not meet the predefined condition within the time interval the noise alarm timer issues an alert signal, whereby appropriate action may be taken such as adjusting the channel input sensitivity, disabling a channel, or placing the RKE transponder into a sleep mode in order to reduce the power consumption caused by undesired input signals. A smart wake-up filter determines whether or not the input signal meets the predefined condition within the time interval.

Abstract: A battery cover assembly having integrated battery condition monitoring for measuring electrical current passing to and from a battery post, including an electrically conductive collar for connecting to a post of a battery, and an electrically conductive terminal for receiving a connector of a load. An electrically conductive resistor having a known resistance extends between outer surfaces of the collar and the terminal.

Abstract: A microcontroller apparatus is provided with an instruction set for manipulating the behavior of the microcontroller. The apparatus and system is provided that enables a linearized address space that makes modular emulation possible. Direct or indirect addressing is possible through register files or data memory. Special function registers, including the Program Counter (PC) and Working Register (W), are mapped in the data memory. An orthogonal (symmetrical) instruction set makes possible any operation on any register using any addressing mode. Consequently, two file registers to be used in some two operand instructions. This allows data to be moved directly between two registers without going through the W register. Thus increasing performances and decreasing program memory usage.

Abstract: A microcontroller apparatus is provided with an instruction set for manipulating the behavior of the microcontroller. The apparatus and system is provided that enables a linearized address space that makes modular emulation possible. Direct or indirect addressing is possible through register files or data memory. Special function registers, including the Program Counter (PC) and Working Register (W), are mapped in the data memory. An orthogonal (symmetrical) instruction set makes possible any operation on any register using any addressing mode. Consequently, two file registers to be used to some two operand instructions. This allows data to be moved directly between two registers without going through the W register. Thus, increasing performance and decreasing program memory usage.

Abstract: A high voltage ESD-protection structure is used to protect delicate transistor circuits connected to an input or output of an integrated circuit bond pad from destructive high voltage ESD events by conducting at a controlled breakdown voltage that is less than a voltage that may cause destructive breakdown of the input and/or output circuits. The ESD-protection structure is able to absorb high current from these ESD events without snapback that would compromise operation of the higher voltage inputs and/or outputs of the integrated circuit. The ESD-protection structure will conduct when an ESD event occurs at a voltage above a controlled breakdown voltage of an electronic device, e.g., diode, in the ESD protection structure. Conduction of current from an ESD event having a voltage above the electronic device controlled breakdown voltage may be through another electronic device, e.g.

Abstract: A plurality of power supply modules having their outputs coupled in parallel are controlled for load balancing purposes through a direct current bus having filtered pulse width modulation (PWM) signals representative of the power outputs of each of the plurality of power supply modules. A local PWM signal for each of the plurality of power supply modules is filtered to a DC voltage and used to compare with an average power required from each of the plurality of power supply modules.

Abstract: An integrated circuit device comprising an integrated circuit die mounted on a leadframe having a plurality of inner leads. The integrated circuit die has a plurality of bond pads that are electrically connected to the inner leads of the leadframe, wherein at least two bond pads are connected to a one of the plurality of inner leads and/or at least two inner leads are connected to one or more bond pads with a single bond wire. A single bond wire is connected to a first bond pad or inner lead and subsequently wedge or stitch bonded to a second bond pad or inner lead, then it is connected to a third bond pad or inner lead. The single bond wire requires only one connection area at each of the bond pad(s) and inner lead(s). The bond pad(s) of the die and inner lead(s) of the leadframe are thereby electrically connected together by the single bond wire.

Abstract: An analog-to-digital conversion apparatus for converting a plurality of analog input signals may include a plurality of analog input, a plurality of sample and hold circuits, one or more analog-to-digital converters (ADCs), a plurality of trigger selection circuits, and one or more analog multiplexers. The analog inputs may receive an analog input signals. The sample and hold circuits may include an input selectively coupled to at least one of the plurality of input and an output. The analog-to-digital converters (ADCs) may include an input and an output. The trigger selection circuits may selectively couple one of the inputs to one of the sample and hold circuits. The analog multiplexers may include a plurality of inputs selectively coupled to one or more of the sample and hold circuit outputs and an output coupled to one of the one or more analog-to-digital-converters.

Abstract: The present invention relates generally to functional pathway configurations at the interfaces between integrated circuits (ICs) and the circuit assemblies with which the ICs communicate. More particularly, the present invention relates generally to the functional pathway configuration at the interface between a semiconductor device (e.g., computer chips like microcontrollers, microprocessors, application specific integrated circuits (ASIC), programmable gate arrays (PGA) and other devices and/or combinations thereof) and the circuitry of a system including the chip. Even more particularly, the present invention relates to a 14-pin microcontroller functional pathway configuration for the interface between the microcontroller and a system in which the microcontroller is embedded to support infrared communications.

Abstract: An electronic amplifier circuit comprising an operational amplifier circuit, such as a two-stage operational amplifier circuit, in tandem with a operational transconductance amplifier. The electronic amplifier circuit has high open-loop gain and high gain-bandwidth while maintaining stability over a wide range of operating parameters.

Abstract: Arbitration of multiple transponders, such as RFID tags, occurs in an interrogation field. The arbitration process is custom-tailored for individual applications, under software control, by the transponder reader or tag reader. Different wake-up slots are calculated for each tag during successive transmission cycles based upon the tag ID and the transmission cycle number. The tag reader may also send a special command to a tag to read its data and cause the tag to become decoupled from the environment. The tags may be selectively placed in either a tag-talk-first mode or a reader-talk-first mode. Furthermore, the tag reader may send a special fast read command to the tag which includes a read request and at least one parameter of the read request.

Abstract: An Integrated Circuit (IC) package is disclosed comprising an IC chip with a microcontroller therein having an n-bit data bus, and up to n pins electrically coupled to the microcontroller. The IC package also includes a control register coupled to the microcontroller for receiving enable and disable signals from the microcontroller. One or more of the pins have one or more functional block associated thereto. Each functional block defines a specified function for its corresponding pin. Thus, each pin having a plurality of corresponding functional blocks has a number of potential functions equal to the number of corresponding functional blocks. The specific function for a given pin is selected by the enable signal from the control register which selects the appropriate functional block upon appropriate command from the microcontroller. By using pins with multiple functions, the instant invention permits an n-bit architecture microcontroller to use less than or equal to n pins.

Abstract: A remote control system for opening and closing a barrier, such as a garage door, includes an RF receiver and a plurality of RF transmitters. The transmitters and receiver include circuitry programmed to provide transmission of encrypted code signals each time the transmitters are used and employing a code hopping method which prevents unauthorized signal interception or code “grabbing”. The system is operated in a code learning mode for the receiver by momentarily actuating a receiver learn mode button for receiving each transmitter identification code and a secret decryption key for that transmitter with the system automatically returning to the operate mode. Each transmitter identification and secret key code signal is automatically and randomly stored in an available and unused memory in the receiver circuitry.

Abstract: An output buffer, a slew-rate control circuit, a break-before-make circuit, and a current limited input amplifier are connected as a digital output driver. This provides a simple apparatus and method of switching current control and slew-rate control that limits power consumption of the digital output driver. To further minimize switching current, capacitors may be added to the break-before-make circuit. A comparator input circuit may be connected to the current limited input amplifier to form a comparator having a low-power-consuming digital output.

Abstract: A terminal assembly for measuring electrical current passing to and from a battery post, including an electrically conductive collar for connecting to a post of a battery, and an electrically conductive terminal for receiving a connector of a load. An electrically conductive resistor having a known resistance extends between outer surfaces of the collar and the terminal. The terminal assembly is incorporated into a battery, which also includes a volt meter connected between the outer surfaces of the collar and the terminal for measuring the voltage drop across the resistor, memory for storing the known resistance of the resistor, and a processor programmed to receive the measured voltage drop from the volt meter, retrieve the known resistance from the memory, and calculate current flow through the resistor based on the measured voltage drop and the known resistance, whereby current flow to and from the battery can be measured.

Abstract: A spectrum analyzer that may be implemented by a simple microcontroller that does not have a hardware multiply function is disclosed. The spectrum analyzer of the present invention utilizes at least five frequency bins. The input signal is sampled at four times the bin frequency. The input signal is sampled at twice the Nyquist rate, which results in symmetries in the sin(wn) and cos(wn) functions. These symmetries allow the in-phase and quadrature components of the input signal to be calculated by add, ignore or subtract operations instead of the more complex multiplication and integration operations. Accordingly, the energy for each bin may be calculated with a minimum number of multiply operations. Because the number of multiply operations have been significantly reduced, these multiply operations may be performed by software instead of hardware. As a result, the spectrum analyzer may be implemented with a simple processor that does not have a hardware multiply.

Abstract: An apparatus for measuring electrical energy passing to and from a battery post. The apparatus includes a resistor having a known resistance, a first conducting surface and a second conducting surface. The conducting surfaces are arranged such that current flow from a battery post will travel through the resistor from the first conducting surface to the second conducting surface, and current flow to the post travels through the resistor from the second to the first conducting surfaces. The energy measuring apparatus further includes a first lead electrically connected to the first conducting surface of the resistor, and a second lead electrically connected to the second conducting surface of the resistor.

Abstract: A processor that has pulse width modulation generation circuitry that provides an improved capability to deal with fault conditions, and particularly with multiple concurrent fault conditions, occurring in external circuitry and devices that are connected to PWM hardware included in a processor.