Abstract: A system and method for assembling components onto a circuit board is disclosed. The system includes: a thermal chamber for receiving a plurality of components therein and for heating the plurality of components at a predetermined temperature for a predetermined length of time; an outfeed slot located on a wall of the thermal chamber which allows at least one component from the plurality of components to pass therethrough and emerge externally of the thermal chamber; and a pick and place machine, located adjacent to the thermal chamber, which automatically retrieves the at least one component which has passed through the outfeed slot and automatically places the at least one component onto a designated circuit board.

Abstract: A computer system includes a memory requester that interfaces with a memory module that includes memory portions. An error map that identifies the defective memory portions of the memory module is created and stored in the computer system. Using the error map, a remapping table that maps each of the defective memory portions to a non-defective memory portion in the memory module is created and then stored. In response to receiving from the memory requester a request for access to a requested memory portion of the memory module, a determination is made from the error map whether the requested memory portion is one of the defective memory portions. If the error map indicates that the requested memory portion is one of the defective memory portions, then a determination is made from the remapping table the non-defective memory portion to which the requested memory portion is mapped.

Abstract: One embodiment of the invention is a method for locating an electronic device capable of sending e-mail. The method includes identifying that an e-mail is being sent from the electronic device. Next, the sender address is compared to an owner address. If the sender address does not match the owner address, the e-mail is redirected. In some embodiments, the method is performed by a computer. In other embodiments, the method is performed by a modem.

Abstract: A system for monitoring a computer system with an external status monitor during the power-on self test (POST) of the computer system. The computer system has tasks to be performed during the POST process. Each task has a token corresponding to an original message or a subsequently added message. Each subsequently added message is stored in the computer system, and each original message is stored in the external status monitor. Under the control of the computer system, the system identifies a task for the computer system to perform. The system then retrieves the token for the identified task and determines whether the retrieved token corresponds to an original message or a subsequently added message. If the retrieved token corresponds to an original message, the system sends only the retrieved token to the external status monitor.

Abstract: The present invention provides a method for mounting an element on a chassis. The method comprises several steps. The element is stopped from sliding in at least one direction when the element is placed on the surface of the chassis. A clip is pivotably connected to the chassis. The clip pivots between first and second position holding the element in place in the second position. The clip is locked in the second position.

Abstract: A monitor system for computer equipment under test comprising a system monitor in communication with a storage element and a status indicator. The system monitor scans video memory for values indicative of a pass, fail or test in progress condition. The system monitor also determines if the computer equipment has failed to respond to testing resulting in a locked up "frozen" condition. The status indicator communicates with an external port of the computer equipment to receive and display signals from the system monitor indicative of the test status. In addition, when the computer equipment fails to respond to testing, the system monitor communicates with a storage element to capture detailed information related to the condition of the computer equipment. The storage element may reside within the computer equipment under test or may be distributed across a local or wide area network in communication with the computer equipment under test.

Abstract: Disclosed is a connector device for retentively connecting a ribbon cable to a mating, connector. In one embodiment, the connector device defines a slot that mates with a hardware device of a computer. The connector device includes an internal retaining mechanism located between first and second members. The internal retaining mechanism operates in a first position in which the internal retaining mechanism engages the mating connector of the hardware device when the mating connector is positioned within the slot to thereby inhibit the mating connector from moving out of the slot. The internal retaining mechanism also operates in a second position in which the internal retaining mechanism is disengaged from the mating connector to allow the mating connector to move out of the slot.

Abstract: A computer system has first and second random access memory (RAM) modules for storing digital information, and first and second system controllers coupled to the first and second RAM modules, respectively. The first system controller has a first address decoder that allocates to the first RAM module a first set of addresses. The second system controller has a second address decoder that allocates to the second RAM module a second set of addresses. By employing two system controllers to control two RAM modules, a computer system can execute two memory transactions simultaneously and can eliminate or reduce the number of memory access delays incurred. The computer system can allocate addresses according to various interleaving schemes, such as page interleaving, cache line interleaving and word interleaving for different memory segments. A configuration register can be employed to allow programming to select which of the interleaving schemes to employ.

Abstract: An apparatus and method for securing a circuit card in a connector. The apparatus includes a frame member that defines an opening that is sized so as to receive the connector therein. The apparatus also includes an anchor member that is adapted to engage with the connector so as to anchor the frame member on the connector. A securing member is attached to the frame member and is adapted to engage with an aperture formed in the circuit card so as to retain the circuit card in electrical connection with the connector. The securing member is movable between a first position, where it secures the circuit card in the connector, and a second position where it is at least partially removed from the plane of the opening in the frame member so as to allow the circuit card to be positioned in electrical contact with the connector.

Abstract: A method for organizing and displaying management information regarding the hardware and software components in a computer network. The invention organizes the data into major component groups and displays these groups and their devices in clear, descriptive language. The method comprises a plurality of operational parameters about different components in a computer network. The operational parameters are organized into a plurality of hierarchical levels. The method further comprises a plurality of forms which enable the modification of one or more of the operational parameters. Each of the forms correspond to one of the hierarchical levels.

Abstract: A computer system is described having a chassis, a motherboard coupled to the chassis, the motherboard having at least one PCI (Peripheral Component Interconnect) connector, and a riser board coupled to the at least one PCI connector. When installed, a surface of the riser board having at least one PCI connector is oriented substantially perpendicular to the motherboard. The computer system may also include a bracket connected to the motherboard, that allows the motherboard to be slideably inserted and removed from the chassis.

Abstract: A PCI/ISA computer system architecture is disclosed in which the ISA legacy circuitry (such as the interrupt request controller, DMA controller, and timer counter unit) is integrated within the system controller coupling the processor and PCI buses. Accordingly, the ISA bridge coupling the PCI and ISA buses is simplified relative to prior art PCI-ISA bridges. A high speed communications channel between the system controller and the ISA bridge is established by first placing an address on the PCI bus which is recognizable only by the system controller and the ISA bridge. Data transfer then occurs within standard PCI protocols, but need only require a subset of the A/D lines. Backwards compatibility is maintained, while system performance is improved and system cost is reduced.

Abstract: A variable speed controller is disclosed that is capable of processing selected commands at a faster-than-normal rate. The invention is useful in the context of x86-based microcomputers to speed up the execution of MASK-A20 and/or RESET-CPU commands that are normally carried out by an 8042-based controller. Execution time for these operations is improved, yet compatibility with existing peripherals and/or code is retained.

Abstract: A method for preparing an upgradable Pentium-based mobile processor module that is forward-compatible with an enhanced Pentium II-based mobile processor module. The upgradable Pentium-based mobile processor module uses 0.5 millimeter pitch connection technology and contains a system controller that supports a single peripheral component interconnect port. The upgradable Pentium-based mobile processor module provides a PCI port for connection to a PCI bus and an AGP port for connection to an AGP bus. The AGP port is electronically connected to the PCI port so that both the AGP port and the PCI port receive data and control signals from the system controller according to the PCI protocol standard.

Abstract: A method of processing comprising first connecting a desk top computer to a portable computer; and then symmetrically processing.

Abstract: An embodiment of the present invention provides a software facility for inferring the identity of a preferred server for use by a computer system. The facility first reads system configuration information describing the configuration of the computer system. The facility also reads configuration mapping information specifying a mapping from system configuration information to preferred servers. The facility then applies the read mapping information to the read system configuration information to identify a preferred server for the computer system. In some embodiments, the computer system proceeds to consume resources of the preferred server identified in this manner.

Abstract: The present invention comprises a method of operating a computer system comprising issuing transactions on a first bus following a bus protocol, wherein the transactions comprise a plurality of bus phases, and wherein each bus phase employs a predetermined set of signals, clocking the bus phase signals onto a second bus following the bus protocol and employing the bus phase signals such that the first and second buses are logically able to follow the protocol. Furthermore, at least one of the bus phases may be a snoop phase, and the act of employing bus phase signals may comprise providing an early snoop signal.

Abstract: The present invention provides a method of providing two different modes of operation for an output driver on an integrated circuit. A first mode provides an open drain driver, such as an enhanced GTL+ driver, for high-speed data transmission. A second mode provides a totem pole output driver, such as a TTL or a LVTLL driver, which does not require additional circuitry for external terminations, as is required for open drain drivers. Thus, one embodiment of the present invention can be characterized as a method of providing a dual mode output from an integrated circuit. This method includes receiving an output mode signal indicating an enhanced GTL+ output mode or a totem pole output mode. This method also includes providing an enhanced GTL+ output signal if the mode signal indicates the enhanced GTL+ output mode, and providing a totem pole output signal if the mode signal indicates the totem pole output mode.

Abstract: An apparatus and method for mounting a disk drive such as a hard drive, floppy drive, or CD-ROM drive to the chassis of a computer. No tools or conventional fasteners such as screws are required to install or remove a disk drive. A combination of members, including shear connectors and a deformable member, are employed to secure a disk drive.

Abstract: The present invention provides an apparatus for providing two different modes of operation for an output driver on an integrated circuit. A first mode provides an open drain driver, such as an enhanced GTL+ driver, for high-speed data transmission. A second mode provides a totem pole output driver, such as a TTL or a LVTLL driver, which does not require additional circuitry for external terminations, as is required for open drain drivers. Thus, one embodiment of the present invention can be characterized as an integrated circuit with an output buffer having a first mode that provides a driver for an open drain bus, and a second mode that provides a totem pole output. This output buffer receives a signal to be outputted from the integrated circuit and a mode select signal that selects between the first mode and the second mode.