Patents Assigned to Microsystems, Inc.
  • Patent number: 7292952
    Abstract: One embodiment of the present invention provides a system that enhances reliability, availability and serviceability in a computer system by replacing a signal from a failed sensor with an estimated signal derived from correlations with other instrumentation signals in the computer system. During operation, the system determines whether a sensor has failed in the computer system while the computer system is operating. If so, the system uses an estimated signal for the failed sensor in place of the actual signal from the failed sensor during subsequent operation of the computer system, wherein the estimated signal is derived from correlations with other instrumentation signals in the computer system. This allows the computer system to continue operating without the failed sensor.
    Type: Grant
    Filed: February 3, 2004
    Date of Patent: November 6, 2007
    Assignee: Sun Microsystems, Inc.
    Inventors: Kenny C. Gross, Aleksey M. Urmanov, Steve S. Lin
  • Patent number: 7293259
    Abstract: One embodiment of the present invention provides a system that dynamically configures selected methods for instrument-based profiling at run-time. The system operates by identifying a root method in a target application, wherein methods that are reachable from the root method during execution of the target application are to be instrumented. Upon loading of a new method during execution of the target application, the system identifies methods in the target application that become reachable from the root method through the new method. The system then instruments methods that are reachable, loaded and have not been instrumented before.
    Type: Grant
    Filed: September 2, 2003
    Date of Patent: November 6, 2007
    Assignee: Sun Microsystems, Inc.
    Inventor: Mikhail A. Dmitriev
  • Patent number: 7292962
    Abstract: A technique for detecting changes in a signal that is measured and reported by quantization uses a model that is updated in response to the sampling of quantized values representing the signal. In one stage, (i) frequencies of occurrences of different sampled quantized values in the stage are calculated and (ii) mean frequencies for each of the different sampled quantized values in the stage are calculated and recorded. In a next stage, frequencies of occurrences of different sampled quantized values occurring after an end of the preceding stage are calculated and statistically compared with the mean frequencies of the different sampled quantized values determined in the preceding stage. Dependent on this comparison, a notification may be issued indicating the signal is anomalously changing.
    Type: Grant
    Filed: March 25, 2004
    Date of Patent: November 6, 2007
    Assignee: Sun Microsystems, Inc.
    Inventors: Kenneth C. Gross, Keith Whisnant
  • Patent number: 7292957
    Abstract: A system for a distributed computing network for managing instrumentation information from a plurality of network-connected managed entities. One or more instrumentation processes are coupled to each of the network-connected managed entities and configured to gather performance metric values. A first classification process is responsive to information describing a type of input/output operation being performed and is configured to select one or more counters based upon the type of input/output operation being performed. A second classification process is coupled to receive a performance metric value from the one or more instrumentation processes. The second classification process is responsive to a computed logarithm of a measured value of at least one metric to select and increment a particular counter of the one or more counters selected by the first classification process.
    Type: Grant
    Filed: January 26, 2005
    Date of Patent: November 6, 2007
    Assignee: Sun Microsystems, Inc.
    Inventor: John C. Schell
  • Patent number: 7293129
    Abstract: At an ingress point to a shared transaction infrastructure, for example a shared PCI Express infrastructure, an entry in a segment table maps an address in a transaction packet to a target for the transaction packet. The entry in the segment table identifies one of a plurality of channel descriptors providing one or more of forwarding information for the transaction packet and information for constructing an additional header for the transaction packet.
    Type: Grant
    Filed: December 1, 2005
    Date of Patent: November 6, 2007
    Assignee: Sun Microsystems, Inc.
    Inventors: Bjørn Dag Johnsen, Ola Tørudbakken
  • Patent number: 7293051
    Abstract: A space-incremental garbage collector performs marking operations that are usually separated by several collection increments. It uses the marking results to compute collection-efficiency metrics for regions into which it treats the heap as divided. It bases its selection of regions for successive increments' collection sets on the metrics' values, whose computations also depend on the sizes of the regions' “remembered sets,” i.e., on the lists of locations where references to objects in those regions have been observed. Although the remembered-set sizes therefore potentially change between collection increments, the collector re-computes metrics in most collection increments for only a subset of the regions. It selects the subset in accordance with a sorting of all regions that it performed at the end of the most recent completed marking operation.
    Type: Grant
    Filed: July 1, 2004
    Date of Patent: November 6, 2007
    Assignee: Sun Microsystems, Inc.
    Inventors: Antonios Printezis, David L. Detlefs
  • Patent number: 7293157
    Abstract: One embodiment of the present invention provides a system that logically partitions different classes of translation lookaside buffer (TLB) entries within a single caching structure. Upon receiving a request to lookup an address translation, the system applies a hash function to parameters associated with the request to determine a corresponding location in the single caching structure where a TLB entry for the request can reside. If the corresponding location contains a TLB entry for the request, the system returns data from the TLB entry to facilitate the address translation. This hash function partitions the single caching structure so that different classes of TLB entries are mapped to separate partitions of the single caching structure. In this way, the single caching structure can accommodate different classes of TLB entries at the same time.
    Type: Grant
    Filed: November 24, 2004
    Date of Patent: November 6, 2007
    Assignee: Sun Microsystems, Inc.
    Inventors: Vipul Y. Parikh, Quinn A. Jacobson
  • Patent number: 7293004
    Abstract: One embodiment of the present invention provides a system that tunes state-based scheduling policies, wherein the system contains a number of central processing units (CPUs). During operation, the system recurrently estimates a long-term benefit to the system by feeding a system state as input to a parametric value function and computing an output from the parametric value function. The system makes scheduling decisions for the CPUs based on the estimated long-term benefit to the system. The system also tunes a parameter of the parametric value function based on current and previously estimated long-term benefit to the system, thereby facilitating more effective scheduling policies.
    Type: Grant
    Filed: January 28, 2005
    Date of Patent: November 6, 2007
    Assignee: Sun Microsystems, Inc
    Inventor: David Vengerov
  • Patent number: 7293099
    Abstract: A method for a client to access data files residing on a first data server through a network includes coupling a heterogenous proxy server to the first data server through a first local network protocol, selectively receiving at the heterogeneous proxy server a data file from the first data servers by employing the first local network protocol, translating the data file into a format compatible with transmission through the network, and transmitting the translated data file to the client across the network.
    Type: Grant
    Filed: September 29, 1998
    Date of Patent: November 6, 2007
    Assignee: Sun Microsystems, Inc.
    Inventor: Kevin E. Kalajan
  • Patent number: 7293161
    Abstract: One embodiment of the present invention provides a system that facilitates deferring execution of instructions with unresolved data dependencies as they are issued for execution in program order. During a normal execution mode, the system issues instructions for execution in program order. Upon encountering an unresolved data dependency during execution of an instruction, the system generates a checkpoint that can subsequently be used to return execution of the program to the point of the instruction. Next, the system executes the instruction and subsequent instructions in an execute-ahead mode, wherein instructions that cannot be executed because of an unresolved data dependency are deferred, and wherein other non-deferred instructions are executed in program order. Upon encountering a store during the execute-ahead mode, the system determines if the store buffer is full. If so, the system prefetches a cache line for the store, and defers execution of the store.
    Type: Grant
    Filed: April 13, 2005
    Date of Patent: November 6, 2007
    Assignee: Sun Microsystems, Inc.
    Inventors: Shailender Chaudhry, Paul Caprioli, Marc Tremblay
  • Patent number: 7293163
    Abstract: One embodiment of the present invention provides a system that dynamically adjusts the aggressiveness of an execute-ahead processor. If a data-dependent stall condition is encountered during program execution, the system enters an execute-ahead mode, wherein instructions that cannot be executed because of the unresolved data dependency are deferred, and other non-deferred instructions are executed in program order. If a non-data-dependent stall condition is encountered during execute-ahead mode, the system enters a scout mode, wherein instructions are speculatively executed to prefetch future loads, but results are not committed to the architectural state of the execute-ahead processor. On the other hand, if an unresolved data dependency is resolved during the execute-ahead mode, enters a deferred mode and executes deferred instructions. During this deferred mode, if some instructions are deferred again, the system determines whether to resume execution in the execute-ahead mode.
    Type: Grant
    Filed: March 22, 2004
    Date of Patent: November 6, 2007
    Assignee: Sun Microsystems, Inc.
    Inventors: Paul Caprioli, Sherman H. Yip
  • Patent number: 7293003
    Abstract: A system and method for ranking objects by a likelihood of possessing a property is disclosed. The system can be used, for example, to assist in the determination of system events, such as, e.g., computer system failures, based upon an analysis of customer service reports or the like.
    Type: Grant
    Filed: March 21, 2002
    Date of Patent: November 6, 2007
    Assignee: Sun Microsystems, Inc.
    Inventor: Kurt H. Horton
  • Patent number: 7293255
    Abstract: Apparatus and method for automatically generating resource types for installation on nodes of a clustered computer system. The wizard provides a user interface for inputting user specified parameters relating to the configuration of the clustered computer system and the application. Based on the input information, the wizard automatically generates resource types that start, stop and monitor execution of the application on nodes of clustered computer system. The generated resource types can be provided as a software package for easy installation on nodes of the clustered computer system.
    Type: Grant
    Filed: March 30, 2001
    Date of Patent: November 6, 2007
    Assignee: Sun Microsystems, Inc.
    Inventor: Naveen Kumar
  • Patent number: 7293160
    Abstract: One embodiment of the present invention provides a system which facilitates eliminating a restart penalty when reissuing deferred instructions in a processor that supports speculative-execution. During a normal execution mode, the system issues instructions for execution in program order, wherein issuing the instructions involves decoding the instructions. Upon encountering an unresolved data dependency during execution of an instruction, the processor performs a checkpointing operation and executes subsequent instructions in an execute-ahead mode, wherein instructions that cannot be executed because of the unresolved data dependency are deferred, and wherein other non-deferred instructions are executed in program order. When an unresolved data dependency is resolved during execute-ahead mode, the processor begins to execute the deferred instructions in a deferred mode. In doing so, the processor initially issues deferred instructions, which have already been decoded, from a deferred queue.
    Type: Grant
    Filed: February 14, 2005
    Date of Patent: November 6, 2007
    Assignee: Sun Microsystems, Inc.
    Inventors: Shailender Chaudhry, Paul Caprioli, Marc Tremblay
  • Patent number: 7293221
    Abstract: A method for detecting transfer errors in an address bus is provided. In this method, a first address parity is generated using a memory address. Next, at least two data error-correction-code (ECC) check bits are scrambled using the first address parity. Subsequently, the data ECC check bits are written to a memory and the data ECC check bits enable detection of transfer errors in the address bus. A system for detecting transfer errors in an address bus is also described.
    Type: Grant
    Filed: January 27, 2004
    Date of Patent: November 6, 2007
    Assignee: Sun Microsystems, Inc.
    Inventors: Samson S. Wong, Kandasamy Aravinthan, Gideon N. Levinsky, Shahar Dor, Richard T. Van, Jiejun Lu
  • Patent number: 7293042
    Abstract: Methods, systems, and articles of manufacture consistent with the present invention provide for predicting system failure based on pattern recognition of subcomponent exposure to failure. A dataset is generated that has at least one exposure level to failure of a computer-based system and a corresponding rule identifier of a rule used to calculate the exposure level. The rule asynchronously receives information about the computer-based system and calculates the exposure level based on the received information. The generated dataset is compared to a previously generated dataset by comparing the at least one exposure level of the dataset to an at least one exposure level with the same rule identifier in the previously generated dataset, where the previously generated dataset is associated with a known problem with the computer-based system.
    Type: Grant
    Filed: October 22, 2003
    Date of Patent: November 6, 2007
    Assignee: Sun Microsystems, Inc.
    Inventor: Michael J. Wookey
  • Patent number: 7293267
    Abstract: A system and method for performing speculative initialization of application models for a cloned runtime system process is presented. A class loader is created for each application model. Each such class loader includes a representation of at least one class from a source definition provided as object-oriented program code and associated with the application model. A master runtime system process is executed. The representation of the class loader is interpreted, instantiated and warmed up as an application model specific class loader instance in a memory space of the master runtime system process. The memory space is cloned as a child runtime system process responsive to a process request and the child runtime system process is executed. The child runtime process selects one such application model specific class loader instance, rather than creating a new application model specific class loader instance.
    Type: Grant
    Filed: December 22, 2003
    Date of Patent: November 6, 2007
    Assignee: Sun Microsystems Inc
    Inventor: Nedim Fresko
  • Patent number: 7290323
    Abstract: A fingerprint-sensing device with a sensor array that does not use active switching elements is fabricated on a base. Sensor support integrated circuits, which contain processing and addressing circuitry, are separately fabricated and subsequently mounted on the base, establishing electrical connections with an interconnect structure within the base, and are thus not integrated with the sensor array. The sensor support integrated circuits can be covered by a bezel structure and the sensor array by a covering material. In addition, a connection cable can be provided to connect the sensor array and the sensor support integrated circuits with a power source and to other external devices and to convey signals generated by the sensor array to the external devices.
    Type: Grant
    Filed: November 14, 2003
    Date of Patent: November 6, 2007
    Assignee: Fidelica Microsystems, Inc.
    Inventors: Keith T. Deconde, Srinivasan K. Ganapathi, Randolph S. Gluck, Steve H. Hovey, Shiva Prakash, Robert Dobkin
  • Patent number: 7293143
    Abstract: The design of nonblocking linked data structures using single-location synchronization primitives such as compare-and-swap (CAS) is a complex affair that often requires severe restrictions on the way pointers are used. One way to address this problem is to provide stronger synchronization operations, for example, ones that atomically modify one memory location while simultaneously verifying the contents of others. We provide a simple and highly efficient nonblocking implementation of such an operation: an atomic k-word-compare single-swap operation (KCSS). Our implementation is obstruction-free. As a result, it is highly efficient in the uncontended case and relies on contention management mechanisms in the contended cases. It allows linked data structure manipulation without the complexity and restrictions of other solutions.
    Type: Grant
    Filed: September 24, 2003
    Date of Patent: November 6, 2007
    Assignee: Sun Microsystems, Inc.
    Inventors: Nir N. Shavit, Mark S. Moir, Victor M. Luchangco
  • Patent number: 7293260
    Abstract: One embodiment of the present invention provides a system that facilitates configuring selected methods for instrument-based profiling at run-time. The system first identifies a root method in a target application, wherein only methods that are reachable from the root method during execution of the target application are to be instrumented. The system then instruments the root method. Next, while subsequently executing a given instrumented method, the system determines if the given instrumented method is about to be executed for the first time. If so, the system instruments any methods that are called by the given instrumented method, are loaded, and have not been instrumented before.
    Type: Grant
    Filed: September 26, 2003
    Date of Patent: November 6, 2007
    Assignee: Sun Microsystems, Inc.
    Inventor: Mikhail A. Dmitriev