Abstract: A system in a package (SIP) or multi-chip module (200, 300, 400) (MCM) uses an electron beam (235, 335, 435) for electrically coupling between microcircuits (230, 330, 430) and (232, 332, 432). In one embodiment, the micro-circuits (230, 430) and (232, 432) can be configured in a side-by-side configuration. In another embodiment, the micro-circuits (330) and (332) can be configured in a chip-on-chip configuration. In yet another embodiment, the electron beam (435) can include a plurality of electron beams (436) and appear as ribbon shaped between two micro-circuits (430, 432). Further, the fabrication to form the electron source (234, 334, 434) and the deflector (261, 356, 461) can be at the final metallization step of the process.
Abstract: Methods and apparatus are described relating to a crossbar which is operable to route data from any of a first number of input channels to any of a second number of output channels according to routing control information. Each combination of an input channel and an output channel corresponds to one of a plurality of links. The crossbar circuitry is operable to route the data in a deterministic manner on each of the links thereby preserving a partial ordering represented by the routing control information. Events on different links are uncorrelated.
Abstract: An input/output interface is used to transmit data between a transmitting circuit and a receiving circuit. Selectively during both system startup and system operation, a known bit pattern transmitted by the transmitting circuit is compared to a received bit pattern. The received bit pattern may be seen at the receiving circuit or a voltage regulator that is used to control the power supply level of the input/output interface. Dependent on the comparison of the known bit pattern and the received bit pattern, a bit error rate across the input/output interface is determined, in response to which the voltage regulator adjusts the power supply level of the input/output interface.
Abstract: Methods and systems consistent with certain aspects related to the present invention provide a process for aligning service containers in a system environment. In one aspect of the invention, the process may include receiving first event data from an application service container providing application services during runtime of a web service and receiving second event data from a system service container providing system services during runtime of the web service. The process may also dynamically align the system and application services such that a predetermined service level associated with the web service is met during runtime based on at least one of the first and second event data.
Abstract: A technique for improving multiple critical timing paths that exhibit similar characteristics has been discovered. The technique efficiently improves multiple critical timing paths by reducing the number of unique critical timing path patterns for analysis. In some embodiments of the present invention a method for use in connection with an integrated circuit design includes identifying distinct timing paths of the integrated circuit design. The distinct timing paths have timing violations. The method includes associating a first plurality of the distinct timing paths with a first set of timing paths. Individual ones of the first plurality belonging to a second set of timing paths and include a first common characteristic. The method includes improving the first set of timing paths based at least in part on an improvement to an individual timing path of the first set of timing paths.
Type:
Grant
Filed:
March 11, 2004
Date of Patent:
October 16, 2007
Assignee:
Sun Microsystems, Inc.
Inventors:
Von-Kyoung Kim, Dakshesh Amin, Sriram Satakopan, Peter F. Lai
Abstract: One embodiment of the present invention provides a system that facilitates offloading message segmentation from a central processing unit onto a network interface card. The system operates by first receiving a TSO-send message at the network interface card, wherein the TSO-send message contains information about the message to be sent. Next, the system uses a header address from the TSO-send message to access a message header from memory using remote direct memory access. The system then uses a payload address from the TSO-send message to access a payload from memory that contains message data using remote direct memory access. Finally, the network interface card segments the payload into a set of maximum segment size (mss) segments and transmits the set of mss segments on the network.
Abstract: A large multimaster I2C bus system is partitioned into smaller bus segments. The bus segments are connected by bridges that isolate the segments and direct selected transactions and commands between the segments. The bridge may handle bus segment error conditions and particularly a hang on the Port B bus by attempting to cause any device on the bus segment to respond after the bus bridge has attempted to acquire the segment for a first predetermined period of time. If the bus responds within the first predetermined period of time, the bus bridge resets the bus segment.
Abstract: An electronic receiver for decoding data encoded into light is described. The light is received at an ultra-small resonant structure. The resonant structure generates an electric field in response to the incident light. An electron beam passing near the resonant structure is altered on at least one characteristic as a result of the electric field. Data is encoded into the light by a characteristic that is seen in the electric field during resonance and therefore in the electron beam as it passes the electric field. Alterations in the electron beam are thus correlated to data values encoded into the light.
Type:
Application
Filed:
April 10, 2006
Publication date:
October 11, 2007
Applicant:
Virgin Island Microsystems, Inc.
Inventors:
Jonathan Gorrell, Mark Davidson, Jean Tokarz, Lev Gasparov
Abstract: A method for tracing on a processor including executing an executing control block on the processor to obtain data, wherein an interrupt on the processor is disabled prior to executing the execution control block and the interrupt is enabling after execution of the execution control block is completed, storing the data in a first buffer, wherein the first buffer is set to active, and setting the first buffer to inactive and setting a second buffer to active, wherein the interrupt on the processor is disabled prior to switching the first buffer to inactive and the interrupt is enabling after setting the second buffer to active.
Abstract: Committing data loaded on a device includes computing a program unit storage commitment fingerprint over a program unit if the program unit is finally loaded in a non-volatile memory on the device, associating the program unit storage commitment fingerprint with the program unit and storing the program unit storage commitment fingerprint.
Abstract: A system (200) can provide data aggregation with a single primary table (206) formed in a content addressable memory (CAM) section (202). Within a primary table (206) CAM entries can be part of a primary table, one or more aggregate tables, or both. In one arrangement, valid bits in each CAM entry can indicate which particular schemes a CAM entry belongs to (primary table, or any of the aggregate tables). Associated data for each table can be stored in a RAM section (204) and can be accessed according to an offset address generated according to a scheme value (i).
Abstract: Processing circuitry is integrated within a hardware security module (HSM) chip card. The processing circuitry is configured to operate in accordance with a set of program instructions stored in a memory integrated within the HSM chip card. The set of program instructions includes program instructions for implementing a public-key cryptography standard (PKCS). The PKCS includes processes for generating and storing a master key. The master key is to be stored in the memory integrated within the HSM chip card. Also, using the master key stored in the memory of the HSM chip card, the HSM chip card enables direct management control of standard chip cards.
Abstract: A programmer to set his own input error handler after examining the context where the error occurs by utilizing a set error handler subroutine. The context may be provided by the system library to the user's handler routine so it can make a better judgment on how to proceed next. The customizable nature of the invention allows programmers to suit the error handling to individual application needs.
Abstract: There is provided a drive carrier. The drive carrier is configured to receive a media drive and is also configured to be removably receivable in a receiving location of a computer system. The drive carrier includes a base portion, a handle portion and a latch mechanism for securing the carrier within the receiving location. The base portion and the handle portion are configured to co-operate to operate the latch mechanism on insertion and/or removal of the carrier from the receiving location, for inserting and/or removing the carrier from the receiving location and operating the latch mechanism with a single movement of the handle portion.
Type:
Grant
Filed:
June 7, 2004
Date of Patent:
October 9, 2007
Assignee:
Sun Microsystems, Inc.
Inventors:
Helenaur Wilson, Sean Conor Wrycraft, Andrew Donovan
Abstract: A device configured to recover and repeat source synchronous data. The device is configured to receive source synchronous data via a first interface and recover the received data utilizing a first clock signal which is generated to be approximately ninety degrees out of phase with the received clock signal. A second clock signal is generated to be in phase with the received source synchronous clock signal. The second clock signal is the utilized to select a newly generated clock signal and latched data for transmission in a source synchronous manner. The device is further configured to shift the phase of the generated first clock signal to be approximately ninety degrees out of phase with the received data signal.
Abstract: A method for correcting an error in a first block including detecting an error in the first block, generating a first permutation of the first block, calculating a first permutation checksum for the first permutation of the first block, and replacing the first block with the first permutation of the first block, if a first block checksum matches the first permutation checksum.
Abstract: Access to external service providers is provided through portlets, where each portlet accessible by a user is represented on the display of the user device. Through use of a dynamic content channel, e.g., a portlet, a highly customizable content page may be produced for any individual client system. When a portlet is selected on a user device, the content associated with the portlet is retrieved and automatically transformed into data that can be displayed by that user device. Thus, a particular user device is not limited to accessing content in a format identical to that associated with the user interface in use on the user device. Consequently, the user's ability to access a wide variety of content sources independent of the characteristics of the particular user device is further enhanced.
Type:
Grant
Filed:
January 12, 2001
Date of Patent:
October 9, 2007
Assignee:
Sun Microsystems, Inc.
Inventors:
Ralf Hofmann, Torsten Schulz, Bernd Eilers, Thomas Pfohe
Abstract: A system and method for authenticating a legacy service using internet technology is disclosed. An authentication module is associated with the legacy server. Service requests from a user of the legacy server are passed to the authentication module. The authentication module generates a service request for a web server, requesting access to a protected page from the web server, and transmits the user's credentials to the web server. The web server attempts to access the protected server, which causes the web server to access a network-based authentication service to determine whether the user's credentials qualify for access to the protected page. The web server transmits a message back to the authentication module, which determines whether the user's credentials qualify for access the legacy server based on the message from the web server.
Abstract: The present invention provides for token based signing of an unsigned binary which may be a stream of bits (e.g., 0's and 1's). The unsigned binary is signed using a secret key which resides in a token (e.g., a smart card), which makes the secret key available to the token holder. The unsigned binary is downloaded and verified for authenticity by the token coupled to a computing device. In one embodiment, the downloaded unsigned binary is encrypted. If the unsigned binary is authentic, it may be used to replace the prior firmware on that computing device.