Abstract: A CAM and method for operating a CAM are presented. Copies of a CAM database are duplicated and placed in a first set of CAM locations and a second set of CAM locations. An error detector is used to determine false matches in the case of soft errors within the entries producing those false matches. While the entries producing a match should have the same index location, errors might cause those match lines to have an offset. If so, the present CAM, through use of duplicative sets of CAM locations, will detect the offset and thereafter the values in each index location that produces a match, along with the corresponding parity or error detection encoding bit(s). If the parity or error detection encoding bit(s) indicate an error in a particular entry, then that error is located and the corresponding entry at the same index within the other, duplicative set of CAM locations is copied into the that erroneous entry.

Abstract: Disclosed are apparatus and methods for controlling execution of a target software component within an isolated execution unit. In general terms, an intermediary software component is introduced within the isolated execution unit. This intermediary component program can initialize the isolated execution unit, and then start a target software component within the isolated execution unit. The intermediary component also establishes communication back to the parent (e.g., using an inter isolation communication). The intermediary component communicates with the target software component using the target component's unchanged API and mediates the communication back to the parent using the established inter isolation communication.

Abstract: Solutions to a value recycling problem that we define herein facilitate implementations of computer programs that may execute as multithreaded computations in multiprocessor computers, as well as implementations of related shared data structures. Some exploitations of the techniques described herein allow non-blocking, shared data structures to be implemented using standard dynamic allocation mechanisms (such as malloc and free). A variety of solutions to the proposed value recycling problem may be implemented. A class of general solutions to value recycling is described in the context of an illustration we call the Repeat Offender Problem (ROP), including illustrative Application Program Interfaces (APIs) defined in terms of the ROP terminology. Furthermore, specific solutions, implementations and algorithm, including a Pass-The-Buck (PTB) implementation are also described. Solutions to the value recycling problem can be applied in a variety of ways to implement dynamic-sized data structures.

Abstract: A method for optimizing low threshold-voltage (Vt) devices in an integrated circuit design. The method includes identifying paths and nodes within the integrated circuit design, determining node overlap within the integrated circuit design, calculating possible solutions for addressing timing violations within the integrated circuit design, choosing a solution for addressing timing violations, inserting low Vt devices at particular nodes of the integrated circuit design, and repeating the calculated possible solutions wherein choosing a solution and inserting low Vt devices at particular nodes to address timing violations within the integrated circuit design.

Abstract: The present invention provides a method and apparatus for defining verbs and adverbs. The method includes creating at least one of a verb and adverb, wherein the at least one of a verb and adverb are adapted to form sequences and the sequences are adapted to create errors in a system. The method further includes defining attributes of the at least one of a verb and adverb.

Abstract: In some circumstances a generational garbage collector may be made more efficient by “pre-tenuring” objects or directly allocating new objects in an old generation instead of allocating them in the normal fashion in a young generation. A pre-tenuring decision is made by a two step process. In the first step, during a young-generation collection, an execution frequency is determined for each allocation site and sites with the highest execution frequency are selected as candidate sites. In the second step, during a subsequent young-generation collection, the survival rates are determined for the candidate sites. After this, objects allocated from sites with sufficiently high survival rates are allocated directly in the old generation.

Abstract: A method for dynamic application tracing in virtual machine environments comprises receiving an instrumentation request that includes an identification of a probe point at which instrumentation code is to be inserted within an application. The method may further comprise making a determination whether the instrumentation code meets one or more acceptance criteria. If the instrumentation code is found to be acceptable, the method may further comprise inserting the instrumentation code at the probe point within the application while the application is executing within a virtual machine, and obtaining information indicative of application state from an execution of the instrumentation code when the probe point is reached during application execution.

Abstract: An audio management apparatus manages simultaneous streams of packet-switched audio data for a network conference tool, and allows the combining of conferences that are not co-located. The apparatus uses at least two audio bridges, each of which receives audio inputs from a plurality of local connection points, does mixing of the audio data for each local connection-point and provides the audio outputs thereto. Also provided is a communications link between the two audio bridges, and each of the audio bridges creates an audio mix from its local connection points and outputs it over the communications link to the other audio bridge. Each bridge may treat the audio data from the other audio bridge as it does any other call. In this way, the combining of the two conferences is accomplished in a simple and straightforward manner.

Abstract: A method and system are provided for reporting a status from a first node in a network to a second node in the network. The first node maintains a first value and a second value, both of which represent some status at the first node. When this status is modified, the first value is updated in accordance with the modified status. Once this has been done, a transmission is sent indicating the updated first value from the first node to the second node. The second node maintains a third value that also represents the status at the first node. Therefore, when the second node receives the transmission from the first node indicating the updated first value, it updates this third value in accordance with the updated first value. It then sends a confirmation back to the first node. Once this confirmation has been received at the first node, the second value is updated in accordance with the updated status. In this way, the third value mirrors the first value, and the second value mirrors the third value.

Abstract: A content comparator memory (CCM) device can include a row (100) of CCM cells (102-1 to 102-I). Each CCM cell (102-1 to 102-I) can have a controllable signal path (104-1 to 104-I) arranged in series to form a match path (106) that provides a match indication MATCH that can be activated when a comparand value (CD[1:I]) is determined to match a stored data value. Each CCM cell (102-1 to 102-I) can also be commonly connected to a comparator line (110) that can provide a comparator indication CMP when a compare value (CD[1:I]) has a predetermined magnitude with respect to a stored value.

Abstract: A mechanism may couple an electrical assembly with circuit boards in a computer system. The mechanism may include injectors on the electrical assembly and a receptacle on each of the circuit boards. The injectors may engage the receptacles to couple header connector parts on the electrical assembly with receptacle connector parts on the receptacles. The electrical assembly may include a latch device that holds the injectors in a closed position after injection of the electrical assembly.

Abstract: A content addressable memory includes a plurality of CAM blocks, each including an array of CAM cells to store a predetermined range of data values, a parsing circuit having an input to receive the search key and having an output to provide a selected portion of the search key in response to a select signal, and a plurality of block select circuits, each configured to enable a corresponding CAM block if the selected portion of the search key falls within the predetermined range of data values for the corresponding CAM block.

Abstract: A calibration and adjustment system for post-fabrication control of a delay locked loop bias-generator is provided. The calibration and adjustment system includes an adjustment circuit operatively connected to the bias-generator, where the adjustment circuit is controllable to facilitate a modification of a voltage output by the bias-generator. Such control of the voltage output by the bias-generator allows a designer to achieve a desired delay locked loop performance characteristic after the delay locked loop has been fabricated. A representative value of the amount of adjustment desired in the bias-generator output may be stored and subsequently read to adjust the delay locked loop.

Abstract: A method of utilizing timestamps for the global ordering of event information, particularly hardware error reporting, is disclosed. Locally generated time stamps are associated with hardware errors or other events. The timestamps form the basis for the global ordering of event information. The timestamps are normalized, either through a pre-synchronization process with a common time, or through the use of offsets maintained either locally near system chips or by the system processor. Once normalized, the timestamps can be compared to determine a first occurring event among multiple reported events.

Abstract: For validating user input fields in a graphical user interface, a data entry field includes a graphical validation indicator. In response to user activation of the validation indicator, such as by hovering with an on-screen pointer, a message is displayed in visual association with the data entry field. The message describes one or more expected characteristics of the data to be entered, for example that the data is numerical. As the user enters data consistent with the expected characteristics, the validation indicator is displayed with a neutral appearance, indicating that no errors have been detected. If incorrect data is detected, the validation indicator takes on an emphasized appearance, such as a higher intensity and/or an error-indicating color such as red, providing an immediate error indication to the user. An error message may also be displayed in visual association with the data entry field.

Abstract: In a space incremental garbage collector, remembered set information for a region is stored in a set of fixed-size data structures, each of which has a representation of the information and a level of precision that differs from other data structures in the set. Remembered set information for each other region is placed in a data structure based on the density of inter-region references between the region and the other region. The remembered set information for the other region is moved from one data structure to another data structure when the density of inter-region references between the region and the other changes. Some of the data structures use bit arrays to store the information and these arrays can be combined with bit arrays produced by the collector to facilitate the identification and removal of stale remembered set entries.

Abstract: In a generational, copying garbage collector, young generation collection may be made more efficient by dynamically measuring object survival rates as a function of “fine-grained” allocation age, and choosing, on the basis of these survival rates, part of the young generation that will be not be collected, but instead scanned for pointers to objects in the rest of the young generation. The rest of the young generation, including objects referenced by the pointers, is then collected.

Abstract: A technique for testing instruction TLB hardware involves (i) allocating a memory segment, (ii) writing instructions to pages in the memory segment for testing the instruction TLB hardware, where the instructions comprise at least one control transfer instruction, (iii) executing the instructions, and (iv) monitoring a count of events in the instruction TLB hardware occurring dependent on the executing.

Abstract: A device is described, including a first diffusion region having a first terminal, a second diffusion region having a second terminal, and a channel region disposed between the first diffusion region and the second diffusion region. Further, the first terminal and the second terminal are offset to enable a non-Manhattan current flow. A system is also described, including the previously described device and a second transistor. The pathway for the flow of the majority of the current carriers in the device defines a first direction. The second transistor also has at least two terminals, and a pathway for a majority of current carriers between the two terminals defines a second direction. The angle between the first direction and the second direction is nonzero and acute.

Abstract: A method for executing a selected input/output (I/O) command from a plurality of I/O commands based on a dependency graph of I/O commands includes building the dependency graph of I/O commands, wherein the dependency graph is built by requiring all children of the selected I/O command to be ready before the selected I/O command is ready, and executing the I/O command based on the dependency graph, wherein execution of the selected I/O command is completed when all of the children of the selected I/O command finish execution.