Abstract: A system and method for providing resources to networked devices for participating in a peer-to-peer environment. In one embodiment, a peer computing system on a network may include one or more bootstrap nodes that may provide, to devices coupled to the network, mechanisms for accessing resources for participating in the peer-to-peer environment. The bootstrap nodes may be peer nodes. The resources may give the devices access to services each of which may implement peer-to-peer platform protocols. The devices may be pre-configured to access one or more predefined peer nodes for information on bootstrap nodes. Alternatively, devices may use a bootstrapping mechanism to locate bootstrap nodes on the network.

Abstract: An apparatus and method for distributing multiple clock signals to multiple devices using an encoded clock signal is provided. A source clock signal can be encoded to result in an encoded system clock. The encoded system clock can be distributed to multiple devices in a computer system. The devices can decode the encoded system clock signal to generate a system clock signal and a global clock signal. The system clock signal and the global clock signal can then be distributed to their respective clock loads on each device. In certain embodiments, additional information, such as state information, can be encoded into the encoded system clock. A device can be configured to decode the additional information and can alter its state accordingly.

Abstract: Methods, systems, and articles of manufacture consistent with the present invention provide a development tool that enables computer programmers to design and develop a data flow program for execution in a multiprocessor computer system. The tool allows the programmer to define a region divided into multiple blocks, wherein each block is associated with data operated on by code segments of the data flow program. The development tool also maintains dependencies among the blocks, each dependency indicating a relationship between two blocks that indicates that the portion of the program associated with a first block of the relationship needs the resultant data provided by the portions of the program associated with a second block of the relationship. The development tool supports several debugging commands, including insertion of multiple types of breakpoints, adding and deleting dependencies, single stepping data flow program execution, and the like.

Abstract: In one embodiment, a memory controller is coupled to a memory subsystem and controls accesses to the memory subsystem. In addition, a temperature sensor is positioned to detect a temperature associated with the memory subsystem. In this embodiment, the memory controller is configured to selectively insert one or more idle clock cycles between a first memory access and a second memory access depending upon the sensed temperature. In a further embodiment, a sensor is positioned to detect a power condition associated with the memory subsystem. In this embodiment, the memory controller is configured to selectively insert one or more idle clock cycles between a first memory access and a second memory access depending upon the detected power condition.

Abstract: A computer system coupled with a pipelined network includes a plurality of initiator nodes coupled to send packets into the network. A plurality of target nodes receive packets sent into the network. The network uses a plurality of pipeline stages to transmit data across the network. Each pipeline stage consumes a known time period, which provides for a predetermined time period for transmission for each packet that is successfully sent from one of the initiator nodes to one of the target nodes. The pipelined network is synchronous in that boundaries of all the pipeline stages are aligned. The pipeline stages include at least an arbitration stage to obtain a path through the network, a transfer stage during which a data packet is transmitted, and an acknowledge stage during which successful transmission of a packet is indicated by the target. To simplify network design, all the pipeline stages are implemented to have equal length.

Abstract: A method for transparently optimizing data access. The method includes gathering information related to data usage when a system is processing and determining a usage pattern of the system using gathered information.

Abstract: A garbage collector that divides a dynamically allocated heap into car sections grouped into trains in accordance with the train algorithm subdivides large trains into subtrains. When an object that is reachable from the train-algorithm-managed generation of the heap is evacuated from a car being collected during a collection increment, it is placed into the last car in the subtrain in which the reference to it resides, even if that car is not the last car in the train to which the reference's subtrain belongs. The train-algorithm test for dead trains is performed not only on top-level trains but also on sub-trains.

Abstract: A method and system to allow user applications can access hardware platform-specific configuration information in a generic way. A platform independent framework lies on a layer that interfaces with the operating system layer. Accordingly, when a platform is changed, the operating system layer is notified of the change to facilitate informing the user of the change. This framework also has a plug-in publishing interface that is used to develop platform-specific modules to publish or export hardware configurations to other users. In another embodiment, this framework has a user interface that allows the user to make the necessary changes to the system management and hardware diagnostic tools whenever the platform is changed to ensure that the tools function correctly.

Abstract: An information processing module forms a blade for a high density computer system. A processor is operable to perform information processing and an information signal interface is connected between the processor(s) and a module information signal connection. A service controller is operable to perform system management functions and is connected to a module management connection. Redundant sets of information and management signal connections can be provided. The information signal interface and the service controller provide a buffer between the processor of the information processing module and the remainder of the modular computer system enabling flexibility in the choice of processor and internal structure for the information processing module.

Abstract: A system and method for rapid processing of scene-graph-based data and/or programs is disclosed. In one embodiment, the system may be configured to utilize a scene graph directly. In another embodiment, the system may be configured to generate a plurality of structures and thread that manage the data originally received as part of the scene graph. The structures and threads may be configured to convey information about state changes through the use of messaging. The system may include support for messaging between threads, messaging with time and/or event stamps, epochs to ensure consistency, and ancillary structures such as render-bins, geometry structures, and rendering environment structures.

Abstract: An apparatus for canceling an effect of power supply resonance is provided. The effect of power supply resonance is a variation in power supply voltage potential. This variation may substantially affect an output buffer by causing the output buffer's output to sag below desired values. A voltage regulating circuit is coupled to power supply lines local to the output buffer where the voltage regulating circuit is most effective in reducing voltage potential variation. An exemplary voltage regulating circuit is provided that uses charge-pumped capacitors to raise the power supply voltage potential when it falls below a desired value. A second example of a voltage regulating circuit uses charge-pumped capacitors to lower the power supply voltage potential when it rises above a desired value.

Abstract: A system that solves a global inequality constrained optimization problem specified by a function ƒ and a set of inequality constraints pi(x)?0(i=1, . . . , m), wherein ƒ and pi are scalar functions of a vector x=(x1, x2, x3, . . . xn). The system performs an interval inequality constrained global optimization process to compute guaranteed bounds on a globally minimum value of the function ƒ(x) subject to the set of inequality constraints. The system applies term consistency and box consistency to a set of relations associated with the global inequality constrained optimization problem over a subbox X, and excludes any portion of the subbox X that violates the set of relations. The system also performs an interval Newton step on the subbox X to produce a resulting subbox Y. The system integrates the sub-parts of the process with branch tests designed to increase the overall speed of the process.

Abstract: A technique for adjusting a communication system involves a link, where the link includes a data line arranged to transmit a data signal and a clock line adapted to transmit a clock signal. The technique uses one or more counters to test the transmission across the link. Dependent on one or more of these counters, a test circuit, connected to the link, compares a known test pattern signal to a latched test pattern signal transmitted on the data line. The test circuit includes an adjustment circuit arranged to generate an adjustable clock signal from the clock signal, where the adjustable clock signal determines when to latch the transmitted test pattern signal The test circuit adjusts a timing of the adjustable clock signal relative to the data signal of the link.

Abstract: Improved methods and apparatus suitable for accessing synchronized data in a broadcast system are disclosed. A synchronized data accessing system providing an interface that can be used by a data requester to access synchronized data is disclosed. The data requester can initiate a request to access synchronized data using the interface, and data can be made available and accessed by the data requester through the interface.

Abstract: A method is described for protecting dirty data in cache memories in a cost-effective manner. When an instruction to write data to a memory location is received, and that memory location is being cached, the data is written to a plurality of cache lines, which are referred to as duplicate cache lines. When the data is written back to memory, one of the duplicate cache lines is read. If the cache line is not corrupt, it is written back to the appropriate memory location and marked available. In one embodiment, if more duplicate cache lines exist, they are invalidated. In another embodiment, the other corresponding cache lines may be read for the highest confidence of reliability, and then marked clean or invalid.

Abstract: Methods, systems and articles of manufacture consistent with the present invention configure a computing system with a logging service that interacts with implementation objects associated with particular types of storage devices through a storage interface. The implementation objects may include processes used to access the storage devices during logging operations. The logging service may also be configured to adjust which storage device is to be used for logging operations without restarting the computing system. This adjustment may be made through a property file that includes properties specific to individual types of storage devices. The property file may be modified to include new properties by a system administrator or by the logging service during runtime operations of the computing system. The new properties may designate new storage devices to be used by the logging service to perform subsequent logging operations.

Abstract: A handheld computing device is used to copy files from the screen of a fixed computer. The display of the handheld device is linked to that of the underlying computer and file and directory icons together with their underlying files are copied to the handheld device. Files from the handheld device can also be transferred to the fixed computer. When a user is running a program on the fixed computer, he may capture the state of that computer and transfer everything needed to permit execution of that program to continue uninterrupted on the handheld device. Thus files and executing programs may be lifted from the fixed computer and used on the handheld device.

Abstract: A storage system comprises a storage array controller and a storage array, which includes multiple storage devices and disk drive controllers. The storage array controller issues scrubbing operation commands to one or more of the disk drive controllers. In response, each disk drive controller that receives a scrubbing operation command reads data from within a data range from at least one of the disk drives, calculates a new checksum for the data, and compares the new checksum to a preexisting checksum for the data. If the new checksum doesn't equal the preexisting checksum, the data within the data range is determined to be erroneous.

Abstract: Disclosed are novel methods and apparatus for efficiently providing concurrently programmable dynamic memory built-in self-testing (BIST). In an embodiment of the present invention, a method of utilizing a BIST system is disclosed. The method includes: loading setup data into a configuration register; loading a first instruction into a shift register; loading the first instruction into an update register; executing the loaded first instruction to perform a memory test; upon receiving a first update command, loading a second instruction into the shift register; and upon receiving a second update command, loading the second instruction into the update register.

Abstract: A method for providing a next clock edge value calculation includes obtaining a clock file data, calculating a next clock edge value using the clock file data, and generating an output file using the next clock edge value. A method for providing an nth clock edge value calculation includes obtaining a clock file data and an n value calculating an nth clock edge value using the clock file data and the n value, and generating an output file using the nth clock edge value.

Abstract: An electrolytic cell which comprises at least one anode and at least one cathode, an inlet channel through which liquor may be charged to the electrolytic cell, and an outlet channel through which liquor may be removed from the electrolytic cell, in which the outlet channel is operatively connected to the inlet channel, and in which the inlet channel comprises an ejector. The inlet and outlet channels may be formed in a unit made up of a plurality of shaped sheets, e.g. of electrically non-conducting plastics material, which together form the inlet and outlet channels.