Abstract: Oscillating circuitry built in integrated circuitry (1) comprises a ring oscillator (31) for generating a first clock, an external oscillator (40) capable of generating a second clock in either one of two oscillating modes which is determined according to an external circuit (12 and 13, or 6 through 8) connected to terminals (2 and 3) thereof, and an internal clock selection circuit (41) which delivers the first clock as an internal clock to the integrated circuitry (1) just after the integrated circuitry (1) is activated or reset, stops the delivery of the first clock and simultaneously furnishes a signal held at a logic high level as the internal clock in response to a control signal for instructing a selection of the second clock, and then determines whether or not the external oscillator (40) is generating the second clock properly, and which furnishes the second clock as the internal clock when it determines that the external oscillator (40) is generating the second clock properly.

Abstract: A semiconductor memory device includes memory elements, each maintaining memory contents within a period of time during which a refresh operation is repeated, and a refresh request circuit for making a refresh request. The semiconductor memory device includes refreshing circuits each of which, in response to a refresh request from the refresh request circuit, performs a refresh operation on a different number of memory elements at the same time, and a selecting circuit for selecting one refreshing circuit from among the refreshing circuits according to the number of memory elements included in the semiconductor memory device. The refresh request circuit can change the interval at which it makes a refresh request.

Abstract: A pattern data generating system solves a problem of a conventional pattern data generating system in which the total processing time is prolonged. The present pattern data generating system includes a parallel processing number calculator for computing the number of parallel processes to be used by a region divider that sequentially distributes the split pattern data. A group of pattern data generators generate pattern data in parallel processes. A pattern data combiner combines the pattern data output from the pattern data generators. A parallel processing controller controls the processing.