Abstract: Processes of assembling microelectronic packages with lead frames and/or other suitable substrates are described herein. In one embodiment, a method for fabricating a semiconductor assembly includes forming an attachment area and a non-attachment area on a lead finger of a lead frame. The attachment area is more wettable to the solder ball than the non-attachment area during reflow. The method also includes contacting a solder ball carried by a semiconductor die with the attachment area of the lead finger, reflowing the solder ball while the solder ball is in contact with the attachment area of the lead finger, and controllably collapsing the solder ball to establish an electrical connection between the semiconductor die and the lead finger of the lead frame.
Abstract: The present technology is generally related to LED bypass circuits and associated methods of operation. In one embodiment, an LED bypass circuit includes a monitoring circuit and a bypass switch. The monitoring circuit is coupled to the LED to monitor the differential voltage across the LED. The bypass switch is coupled to the LED in parallel. When an open status is detected by the monitoring circuit, the bypass switch is turned on to bypass the LED.
Abstract: A switching regulator with frequency limitation comprises a switch, a current sensing circuit, a voltage feedback circuit, a control circuit and a frequency limitation circuit. The current sensing circuit senses the current flowing through the switch and generating a current sensing signal representative of it. The voltage feedback circuit senses the output signal of the switching regulator and generates a feedback signal accordingly. The control circuit compares the current sensing signal with the feedback signal and turns off the switch based on the comparison result. The frequency limitation circuit is electrically coupled to the control circuit to limit the switching frequency of the switch.
Type:
Grant
Filed:
April 16, 2010
Date of Patent:
November 27, 2012
Assignee:
Monolithic Power Systems, Inc.
Inventors:
Jin Hu, James C. Moyer, Junming Zhang, Yuancheng Ren
Abstract: A switching power supply has an inductor that includes a coil. A chopper circuit chops the primary current drawn through the coil, for the inductor to output an induced current. A multifunction junction of the power supply has a multifunction voltage that is a function of a primary voltage that drives the coil. A first circuit suspends the chopping in response to a first sensed voltage crossing a first threshold, the first sensed voltage being a function of the multifunction voltage. A second circuit suspends the chopping in response to a second sensed voltage crossing a second threshold, the second threshold being a function of the multifunction voltage.
Abstract: A high-voltage LED drive scheme with multi-stage power regulation. The multi-stage power regulation applies two components of voltage to drive the LED strings. This scheme achieves high efficiency, small size and low cost.
Abstract: The present technology is related generally to vertical discrete devices with a trench at the topside of the vertical discrete devices. The trench is filled with a conducting material. In this approach, a drain or cathode of the vertical discrete devices is electrically connected to the topside to result in a small area with low RON*AREA.
Abstract: Power converters and associated methods of operation are disclosed herein. In one embodiment, a power converter includes a first switch and a second switch electrically coupled to the first switch in series. The first switch is electrically coupled to a first node and to a second node via the second switch. The power converter further includes a capacitor and a third switch electrically coupled to the first node and to the second node via the capacitor and the second switch. The third switch has a linear-active region of operation.
Abstract: Several embodiments of microelectronic packages with enhanced heat dissipation and associated methods of manufacturing are disclosed herein. In one embodiment, a microelectronic package includes a semiconductor die having a first side and a second side opposite the first side and a lead frame proximate the semiconductor die. The lead frame has a lead finger electrically coupled to the first side of the semiconductor die. The microelectronic package also includes an encapsulant at least partially encapsulating the semiconductor die and the lead frame. The encapsulant does not cover at least a portion of the second side of the semiconductor die.
Abstract: Switching mode power supplies (SMPS) that can operate in a control mode for a normal load condition and operate with a burst-mode controller for a light load condition are disclosed herein. In one embodiment, a method for controlling the switching mode power supply includes when the load is in a light load condition, the switching mode power supply is controlled by a burst-mode controller.
Abstract: Various embodiments of LED drivers and associated methods of are described below. In one embodiment, a method for controlling an LED driver includes receiving a reference voltage, receiving a feedback voltage from said LED driver, receiving said input voltage as a first feed forward voltage and said output voltage as a second feed forward voltage, generating a hysteretic width based on said first feed forward voltage and said second feed forward voltage, and generating a hysteretic band voltage using said hysteretic width and said reference voltage. The method also includes generating a first control signal for controlling said LED driver based on said hysteretic band voltage and said feedback voltage, inverting said first control signal to generate a second control signal for controlling said LED driver, and achieving a generally fixed frequency for said LED driver.
Abstract: In accordance with the teachings described herein, systems and methods are provided for a switching mode power supply. In one example, the switching mode power supply may include a transformer, a switching circuit and a switching control circuit. The transformer receives a DC input voltage on a primary winding and generates a DC output voltage on a secondary winding. The switching circuit, which may include a MOSFET switch, is coupled to the transformer and is configured to switch the transformer on and off. The switching control circuit generates a switching control signal to control the switching circuit in order to regulate the DC output voltage of the transformer.
Abstract: An LED circuit is disclosed. The circuit senses the average current flowing through the LED. The sensed signal is compensated and modulated. The modulated signal is then used to control the ON/OFF state of a switch that supplies power to the LED.
Abstract: Dual-mode AC/DC power converters and associated methods of operation are disclosed herein. In one embodiment, the AC/DC converter includes a primary winding, a switching transistor coupled to the primary winding, the switching transistor configured to carry a drain-source current, and a feedback voltage port configured to carry a feedback voltage. The feedback voltage port is coupled to the switching transistor to switch off the switching transistor when the drain-source current reaches a peak current limit. The peak current limit increases with increasing feedback voltage if and only if the feedback voltage satisfies an ordered relationship with a threshold.
Abstract: A frequency limitation method used in quasi-resonant control of a switching regulator is disclosed. The switching frequency is limited through setting a minimum time limit, such as a minimum switching period or a minimum OFF time. The minimum time limit may be a first time limit or a second time limit. The minimum time limit is changed into another value if the minimum voltage point approaches the minimum time limit point, so as to eliminate the audible noise.
Type:
Grant
Filed:
June 16, 2010
Date of Patent:
August 7, 2012
Assignee:
Monolithic Power Systems, Inc.
Inventors:
Junming Zhang, Yuanchang Ren, Jin Hu, Huanyu Lu, Yang Shi
Abstract: A circuit is disclosed that includes a buck voltage regulator electrically coupled to an active current modulator. The active current modulator is operable to detect a negative current in the low-side switch of the buck voltage regulator circuit during a light mode operation. Whenever the negative current is detected, the active negative current modulator causes the low-side switch to stay ON in a linear mode and limits the negative current to a predetermined current level.
Abstract: A switching regulator integrated circuit (IC) is disclosed that includes a switch circuit that further includes a first switch and a second switch, a mode selector circuit controlled by external circuitry to select between a first mode and a second mode, and a control circuit. In response to a feedback signal from the switch circuit, when the first mode is selected, the control circuit toggles the first switch and the second switch ON and OFF alternately at a fixed first frequency. When a second mode is selected, the control circuit causes the second switch to turn OFF completely and the first switch to switch ON and OFF at a variable second frequency.
Abstract: High voltage NMOS devices with low on resistance and associated methods of making are disclosed herein. In one embodiment, a method for making N typed MOSFET devices includes forming an N-well and a P-well with twin well process, forming field oxide, forming gate comprising an oxide layer and a conducting layer, forming a P-base in the P-well, the P-base being self-aligned to the gate, side diffusing the P-base to contact the N-well, and forming N+ source pickup region and N+ drain pickup region.
Abstract: The present invention discloses a control circuit for constant on-time converter and a control method thereof. The proposed constant on-time DC/DC converter stabilizes the system and improves the performance of the load transient response without large equivalent series resistance of the output capacitor.
Abstract: According to one embodiment, a self-aligned trench structure junction gate field-effect transistor (JFET) includes a silicon substrate, two or more trenches having a P-type polysilicon gate region near a bottom portion of the trench and an interlayer dielectric layer (ILDL) above the P-type polysilicon gate region, a channel region separating each trench including epitaxial silicon, an N+ source region above the channel region extending between a top of each trench, and a source metal above the N+ source region. In another embodiment, a self-aligned trench structure JFET includes a silicon substrate, two or more trenches having an N-type polysilicon gate region near a bottom portion of the trench and an ILDL above the N-type polysilicon gate region, a channel region separating each trench including epitaxial silicon, a P+ source region above the channel region extending between a top of each trench, and a source metal above the P+ source region.