Patents Assigned to Monolithic Power Systems, Inc.
  • Low leakage and/or low turn-on voltage Schottky diode
    Patent number: 8809988
    Abstract: A Schottky diode and a method of manufacturing the Schottky diode are disclosed. The Schottky diode has an N-well or N-epitaxial layer with a first region, a second region substantially adjacent to an electron doped buried layer that has a donor electron concentration greater than that of the first region, and a third region substantially adjacent to the anode that has a donor electron concentration that is less than that of the first region. The second region may be doped with implanted phosphorus and the third region may be doped with implanted boron.
    Type: Grant
    Filed: September 3, 2009
    Date of Patent: August 19, 2014
    Assignee: Monolithic Power Systems, Inc.
    Inventors: Ji-Hyoung Yoo, Martin E. Garnett
  • Methods of manufacturing lateral diffused MOS devices with layout controlled body curvature and related devices
    Patent number: 8796100
    Abstract: The present invention discloses a method of manufacturing an N-type LDMOS device. The method comprises forming a gate above the semiconductor substrate; forming a body, comprising forming a Pwell apart from the gate and forming a Pbase partly in the Pwell, wherein the Pbase is wider and shallower than the Pwell; and forming an N-type source and a drain contact region. Wherein the body curvature of the LDMOS device is controlled by adjusting the layout width of the Pwell.
    Type: Grant
    Filed: August 8, 2011
    Date of Patent: August 5, 2014
    Assignee: Monolithic Power Systems, Inc.
    Inventor: Jeesung Jung
  • Reference adjusting power supply for processor and control method thereof
    Patent number: 8791676
    Abstract: The present invention provides a power supply for processor and control method thereof. The power supply comprises a reference adjusting circuit and a voltage regulator. The reference adjusting circuit is configured to receive a VID code from a processor, and adjust a reference voltage based on the VID code. The voltage regulator is coupled to the reference adjusting circuit and converts an input voltage into an output voltage in accordance to the reference voltage. The reference adjusting circuit adjusts the reference voltage in a plurality of steps until the reference voltage reaches a target value corresponding to the VID code. The reference adjusting circuit adjusts the reference voltage by a preset value during each step, and proceeds to adjust the reference voltage by a next step only after the output voltage reaches a predetermined scope of the reference voltage.
    Type: Grant
    Filed: September 30, 2011
    Date of Patent: July 29, 2014
    Assignee: Monolithic Power Systems, Inc.
    Inventor: Chao Liu
  • LED driver circuits with current envelope control
    Patent number: 8791648
    Abstract: A light emitting diode (LED) driver circuit controls switching of an output transistor. The LED driver circuit monitors inductor current flowing through an output inductor that is coupled to one or more LEDs. In response to detecting that the inductor current has reached a peak value, the LED driver circuit switches OFF the output transistor. The LED driver circuit switches ON the output transistor in response to detecting zero crossing of the inductor current. The LED driver circuit may detect zero crossing of the inductor current from a gate voltage of the output transistor by detecting for a negative spike.
    Type: Grant
    Filed: April 10, 2012
    Date of Patent: July 29, 2014
    Assignee: Monolithic Power Systems, Inc.
    Inventors: Zheng Luo, Eric Yang
  • HIGH VOLTAGE CIRCUIT LAYOUT STRUCTURE
    Publication number: 20140197515
    Abstract: A high voltage circuit layout structure has a P-type substrate; a first N-type tub, a second N-type tub, a third N-type tub, a first P-type tub with a first width and a second P-type tub with a second width formed on the P-type substrate; wherein the first P-type tub is formed between the first N-type tub and the second N-type tub; and the second P-type tub is formed between the second N-type tub and the third N-type tub.
    Type: Application
    Filed: January 17, 2013
    Publication date: July 17, 2014
    Applicant: MONOLITHIC POWER SYSTEMS, INC.
    Inventor: Joseph Urienza
  • Voltage regulator with adaptive hysteretic control
    Patent number: 8773090
    Abstract: A voltage regulator with adaptive hysteretic control. The voltage regulator may include a top switch (e.g., MOSFET) configured to couple a power supply supplying an input voltage to a load. An adaptive hysteretic control circuit of the voltage regulator may turn on the top switch when the feedback voltage reaches the low threshold and turn off the top switch when the feedback voltage reaches the high threshold. The adaptive hysteretic control circuit may adjust the upper and lower threshold to make the voltage regulator working like a constant on time control circuit in steady state. When a step down transient happens, the top switch could be turned off when the output voltage reaches the upper threshold, and when a step up transient happens, the top switch could be turned on when the output voltage reaches the lower threshold, it makes the voltage regulator working like a hysteretic control circuit.
    Type: Grant
    Filed: July 1, 2011
    Date of Patent: July 8, 2014
    Assignee: Monolithic Power Systems, Inc.
    Inventors: Qian Ouyang, Yuancheng Ren
  • High-voltage transistor device
    Patent number: 8759912
    Abstract: A high-voltage transistor device comprises a spiral resistive field plate over a first well region between a drain region and a source region of the high-voltage transistor device, wherein the spiral resistive field plate is separated from the first well region by a first isolation layer, and is coupled between the drain region and the source region. The high-voltage transistor device further comprises a plurality of first field plates over the spiral resistive field plate with each first field plate covering one or more segments of the spiral resistive field plate, wherein the plurality of first field plates are isolated from the spiral resistive field plate by a first dielectric layer, and wherein the plurality of first field plates are isolated from each other, and a starting first field plate is connected to the source region.
    Type: Grant
    Filed: August 1, 2011
    Date of Patent: June 24, 2014
    Assignee: Monolithic Power Systems, Inc.
    Inventors: Donald R. Disney, Ognjen Milic, Kun Yi
  • Schottky diodes with dual guard ring regions and associated methods
    Patent number: 8749014
    Abstract: The present invention discloses a Schottky diode. The Schottky diode comprises a cathode region, an anode region and a guard ring region. The anode region may comprise a metal Schottky contact. The guard ring region may comprise an outer guard ring and a plurality of inner guard stripes inside the outer guard ring. And wherein the inner guard stripe has a shallower junction depth than the outer guard ring.
    Type: Grant
    Filed: September 7, 2011
    Date of Patent: June 10, 2014
    Assignee: Monolithic Power Systems, Inc.
    Inventor: Ji-Hyoung Yoo
  • U-shape RESURF MOSFET devices and associated methods of manufacturing
    Patent number: 8748980
    Abstract: The present technology discloses a U-shape RESURF MOSFET device. Wherein the MOSFET device comprises a drain having a drain contact region and a drift region, a source, a body, a gate and a recessed-FOX structure. Wherein the recessed-FOX structure is between the gate and the drift region vertically and between the body and the drain contact region laterally, and wherein the recessed-FOX structure is configured to make the drift region into a U shape. The present technology further discloses the depth of the drift region is controlled by adjusting a layout width.
    Type: Grant
    Filed: August 23, 2011
    Date of Patent: June 10, 2014
    Assignee: Monolithic Power Systems, Inc.
    Inventor: Jeesung Jung
  • HIGH VOLTAGE HIGH SIDE DMOS AND THE METHOD FOR FORMING THEREOF
    Publication number: 20140151792
    Abstract: A high voltage high side DMOS removing the N-buried layer from the DMOS bottom provides lower Ron*A at given breakdown voltage. The high voltage high side DMOS has a P-type substrate, an epitaxial layer, a field oxide, an N-type well region a gate oxide, a gate poly, a P-type base region, a deep P-type region, an N-type lightly doped well region, a first N-type highly doped region, a second N-type highly doped region and a P-type highly doped region.
    Type: Application
    Filed: December 3, 2012
    Publication date: June 5, 2014
    Applicant: MONOLITHIC POWER SYSTEMS, INC.
    Inventors: Ji-Young Yoo, Martin Garnett
  • Vertical power transistor die packages and associated methods of manufacturing
    Patent number: 8742490
    Abstract: The present technology is directed generally to a semiconductor device. In one embodiment, the semiconductor device includes a first vertical transistor and a second vertical transistor, and the first vertical transistor is stacked on top of the second vertical transistor. The first vertical transistor is mounted on a lead frame with the source electrode of the first vertical transistor coupled to the lead frame. The second vertical transistor is stacked on the first vertical transistor with the source electrode of the second vertical transistor coupled to the drain electrode of the first vertical transistor.
    Type: Grant
    Filed: May 2, 2011
    Date of Patent: June 3, 2014
    Assignee: Monolithic Power Systems, Inc.
    Inventor: Donald R. Disney
  • Integrated MOSFET devices with Schottky diodes and associated methods of manufacturing
    Patent number: 8735968
    Abstract: The present technology discloses a semiconductor die integrating a MOSFET device and a Schottky diode. The semiconductor die comprises a MOSFET area comprising the active region of MOSFET, a Schottky diode area comprising the active region of Schottky diode, and a termination area comprising termination structures. Wherein the Schottky diode area is placed between the MOSFET area and the termination area such that the Schottky diode area surrounds the MOSFET area.
    Type: Grant
    Filed: December 28, 2010
    Date of Patent: May 27, 2014
    Assignee: Monolithic Power Systems, Inc.
    Inventors: Tiesheng Li, Lei Zhang
  • Integrated field effect transistors with high voltage drain sensing
    Patent number: 8723178
    Abstract: An integrated circuit includes a junction field effect transistor (JFET) and a power metal oxide semiconductor field effect transistor (MOSFET) on a same substrate. The integrated circuit includes a drain sense terminal for sensing the drain of the power MOSFET through the JFET. The JFET protects a controller or other electrical circuit coupled to the drain sense terminal from high voltage that may be present on the drain of the power MOSFET. The JFET and the power MOSFET share a same drift region, which includes an epitaxial layer formed on the substrate. The integrated circuit may be packaged in a four terminal small outline integrated circuit (SOIC) package. The integrated circuit may be employed in a variety of applications including as an ideal diode.
    Type: Grant
    Filed: January 20, 2012
    Date of Patent: May 13, 2014
    Assignee: Monolithic Power Systems, Inc.
    Inventor: Tiesheng Li
  • COT CONVERTER WITH CONTROLLED FREQUENCY AND ASSOCIATED METHOD
    Publication number: 20140125302
    Abstract: A SMPS having a switch; an output port coupled to a load, configured to provide a voltage feedback signal and a current feedback signal; an on-time generator, having an input end coupled to the current feedback signal, and having an output end providing a time signal indicating a time period; and a PWM generator, having a first input end coupled to the voltage feedback signal, a second input end coupled to the time signal, and an output end providing a PWM signal that is coupled to the control end of the switch, and wherein the PWM signal is configured to turn ON the switch when the voltage feedback signal is lower than a threshold voltage, and the PWM signal is configured to turn OFF the switch after the time period.
    Type: Application
    Filed: November 2, 2012
    Publication date: May 8, 2014
    Applicant: MONOLITHIC POWER SYSTEMS, INC.
    Inventors: Eric Yang, Qian Ouyang, Bo Zhang, Lijie Jiang, Xiaokang Wu, Suhua Luo
  • Switching-mode power supply with ripple mode control and associated methods
    Patent number: 8698475
    Abstract: The present invention discloses a SMPS. The SMPS comprises an output port, configured to supply a load; a control signal generator, having an input and an output configured to provide a first control signal; a first switch configured to receive the first control signal and regulate the voltage at the output port; and a ramp signal generator, comprising an input and an output, wherein the input is configured to receive the control signal and the output is configured to provide a current signal simulating an output signal at the output port, and wherein the output of the ramp signal generator is further coupled to the input of the means for generating control signal.
    Type: Grant
    Filed: October 20, 2011
    Date of Patent: April 15, 2014
    Assignee: Monolithic Power Systems, Inc.
    Inventors: Yan Dong, Peng Xu
  • Power supply, associated management unit and method
    Patent number: 8693276
    Abstract: The present invention discloses a power supply. The power supply may comprise an input power terminal, a capacitor module, a first converter module and a second converter module. The first converter module may have a first terminal and a second terminal, wherein the first terminal is coupled to the input power terminal and the second terminal is coupled to the capacitor module. The second converter module may comprise an input and an output, wherein the input of the second converter module is coupled to the input power terminal, and the output of the second converter module is configured to supply a load.
    Type: Grant
    Filed: December 28, 2011
    Date of Patent: April 8, 2014
    Assignee: Monolithic Power Systems, Inc.
    Inventors: Pengjie Lai, Jian Jiang
  • Lateral high-voltage transistor and associated method for manufacturing
    Patent number: 8686503
    Abstract: The present disclosure discloses a lateral high-voltage transistor and associated method for making the same.
    Type: Grant
    Filed: August 17, 2011
    Date of Patent: April 1, 2014
    Assignee: Monolithic Power Systems, Inc.
    Inventors: Donald R. Disney, Ognjen Milic
  • Split trench-gate MOSFET with integrated Schottky diode
    Patent number: 8680614
    Abstract: A split trench-gate MOSFET device and method for forming this device is disclosed. The device has a trench gate structure, comprising a shield electrode and two gate electrodes, wherein a substantial portion of shield electrode region is lower than the gate electrode region, and wherein a portion of the shield electrode region extends to the top surface between the two gate electrodes. The device further comprises a source metal layer, contacting to an initial layer, a well region, the shield electrode and a source region at the top surface, wherein the contact between the source metal layer and the initial layer forms a Schottky diode.
    Type: Grant
    Filed: June 12, 2012
    Date of Patent: March 25, 2014
    Assignee: Monolithic Power Systems, Inc.
    Inventors: Tiesheng Li, Rongyao Ma, Lei Zhang
  • High-voltage devices with integrated over-voltage protection and associated methods
    Patent number: 8670219
    Abstract: The present technology discloses a high-voltage device comprising a high-voltage transistor and an integrated over-voltage protection circuit. The over-voltage protection circuit monitors a voltage across the high-voltage transistor to detect an over-voltage condition of the high-voltage transistor, and turns the high-voltage transistor ON when the over-voltage condition is detected. Thus, once the high-voltage transistor is in over-voltage condition, the high-voltage transistor is turned ON and can dissipate the power from the over-voltage event through its channel.
    Type: Grant
    Filed: June 16, 2011
    Date of Patent: March 11, 2014
    Assignee: Monolithic Power Systems, Inc.
    Inventor: Donald R. Disney
  • CMOS devices with reduced short channel effects
    Patent number: 8664067
    Abstract: An MOS transistor includes a doping profile that selectively increases the dopant concentration of the body region. The doping profile has a shallow portion that increases the dopant concentration of the body region just under the surface of the transistor under the gate, and a deep portion that increases the dopant concentration of the body region under the source and drain regions. The doping profile may be formed by implanting dopants through the gate, source region, and drain region. The dopants may be implanted in a high energy ion implant step through openings of a mask that is also used to perform another implant step. The dopants may also be implanted through openings of a dedicated mask.
    Type: Grant
    Filed: November 18, 2010
    Date of Patent: March 4, 2014
    Assignee: Monolithic Power Systems, Inc.
    Inventor: Donald R. Disney