Abstract: A method and apparatus adapted to prevent Head-Of-Line blocking by forwarding dummy packets to queues which have not received data for a predetermined period of time. This prevention of HOL may be on an input where data is forwarded to each of a number of FIFOs or an output where data is de-queued from FIFOs. The dummy packets may be provided with a time stamp derived from a recently queued or de-queued packet.

Abstract: A printed circuit board having an electronic component which is to be cooled by a cooling surface biased thereon, where the biasing elements are abutted not by the PCB but a stiffer element attached to the PCB in order to not strain or bend the PCB.

Abstract: A thermally controlled assembly having two parallel PCBs defining there between, and by the aid of a channel forming element, a channel in which air is forced, using a fan, to cool components in the channel. The fan has a cooling surface cooled by air from the fan and which is biased toward an element provided in a space below the cooling surface. The forced air also drawing air from outside the assembly through the space and into the channel to cool other elements provided in the space.

Abstract: An apparatus and a method where a plurality of physically separate data receiving/analyzing elements receive data packets and time stamp these. A controlling unit determines a storing address for each data packet based on at least the time stamp, where the controlling unit does not perform the determination of the address until a predetermined time delay has elapsed after the time of receipt.

Abstract: An assembly and a method where a number of receiving units receive and store data in a number of queues de-queued by a plurality of processors/processes. If a selected queue for one processor has a fill level exceeding a limit, the packet is forwarded to a queue of another processor which is instructed to not de-queue that queue until the queue with the exceeded fill level has been emptied. Thus, load balancing between processes/processors may be obtained while maintaining an ordering between packets.

Abstract: A system and a method of operating the system, the system having a plurality of data receiving elements each receiving data packets from a data connection and from another receiving element and forwarding the two data packets to another receiving element in a predetermined order. If, at a point in time, only one data packet is received, a period of time is allowed to elapse, and if a second data packet is received, the two packets are output in the order. If not, the received data packet is output.

Abstract: An assembly where a number of receivers receiving packets for storing in queues in a storage and a means for de-queuing data from the storage. A controller determines addresses for the storage, the address being determined on the basis of at least a fill level of the queue(s), where information relating to de-queues addresses is only read-out when the fill-level(s) exceed a limit so as to not spend bandwidth on this information before it is required.

Abstract: An apparatus and method for analyzing a data packet, where the first and second information is derived relating to the data packet. The first information relates to a type of the data packet, a standard to which the data packet conforms and/or which data item(s) is/are present in the data packet. The first information is used for identifying a function into which the second information is input to generate third, and this third information is output together with at least part of the data packet.

Abstract: A data merge unit is provided for providing an interleaved data stream, the data stream including data frames received on two or more input channels, wherein data frames from each of the two or more input channels are arranged in time-slots of the interleaved data stream. The data merge unit comprises an input unit to receive data frames from two or more input channels, a frame merge buffer arranged to receive data frames from the two or more input channels via the input unit and store said data frames; and, an output generator to generate the interleaved data stream, the output generator being configured to select complete data frames from the frame merge buffer and arrange said complete data frames in the interleaved data stream.