Abstract: The cost and size of an atomic magnetometer are reduced by attaching together a first die which integrates together a vapor cell, top and side photo detectors, and processing electronics, a second die which integrates together an optics package and a heater for the vapor cell, and a third die which integrates together a VCSEL, a heater for the VCSEL, and control electronics.

Abstract: A trench DMOS transistor with a very low on-state drain-to-source resistance and a high gate-to-drain charge includes one or more floating islands that lie between the gate and drain to reduce the charge coupling between the gate and drain, and effectively lower the gate-to-drain capacitance.

Abstract: In semiconductor wafer manufacturing, processes such as analyzing test data associated with semiconductor wafers, interpreting the test data analysis, and acting on the test data interpretation and analysis are automated. Such automation can eliminate delays that were previously imposed by the action of test analysis engineers and wafer fabrication personnel, thereby reducing the amount of useless material that is produced before a process defect can be detected.

Abstract: A phase detection system for providing a phase signal indicative of a phase difference between first and second input signals, with the system including a pair of amplification channels for receiving the input signals, with each channel including a plurality of amplifier stages. The outputs of the two amplification channels are connected to the inputs of a multiplier arrangement, with the arrangement producing an uncompensated phase signal. Compensation circuitry is provided to receive a magnitude signal indicative of the relative magnitudes of the two input signals, with the magnitude signal being used to produce a corrected phase signal indicative of the phase difference between the two input signals.

Abstract: A control circuit for use in a battery charger circuit that includes a switching voltage regulator, with the control circuit having a constant current charging mode and a constant voltage charging mode. A switcher controller is provided which configured to control a state of a top side switching transistor and a low side transistor of the switching voltage regulator in response to at least one error signal. A power path transistor switch is disposed intermediate an output of the switching voltage regulator and a first node for receiving a first terminal of a battery to be charged.

Abstract: A system may include a database configured to store information including characteristics of a plurality of components. The system may further include a server in communication with the database and configured to receive design parameters indicative of a plurality of loads of a multiple-load device; determine a plurality of power supply architectures that may be used to provide power supply solutions satisfying the plurality of loads, each power supply architecture including at least one position requiring a component configured to satisfy a load requirement; for each one of at least a subset of the plurality of power supply architectures, determine, based on the characteristics of the plurality of components, at least one component configured to satisfy the corresponding load requirement for each position of the one of the power supply architectures; and generate at least one power supply design in accordance with the power supply architectures and the determined components.

Abstract: An apparatus includes a constant on-time or constant off-time (COT) switching regulator configured to generate an output signal. The switching regulator includes a switch that is turned on or off for a specified amount of time during each of multiple switching cycles. The apparatus also includes a modulator configured to modulate the specified amount of time that the switch is turned on or off during at least some of the switching cycles. The specified amount of time that the switch is turned on or off during each of the switching cycles could be equal to tON/OFF+?tMODF(?MOD), where tON/OFF denotes a constant amount of time, ?tMOD denotes an amplitude of the second signal, ?MOD denotes a frequency of the second signal, and F( ) denotes a modulation function. This could help to modulate switching noise over a range of frequencies and spread electro-magnetic interference generated by the switching regulator.

Abstract: A semiconductor device includes a first layer and a second layer over the first layer. The first and second layers are configured to form an electron gas layer at an interface of the first and second layers. The semiconductor device also includes an Ohmic contact and multiple conductive vias through the second layer. The conductive vias are configured to electrically couple the Ohmic contact to the electron gas layer. The conductive vias could have substantially vertical sidewalls or substantially sloped sidewalls, or the conductive vias could form a nano-textured surface on the Ohmic contact. The first layer could include Group III-nitride nucleation, buffer, and channel layers, and the second layer could include a Group III-nitride barrier layer.

Abstract: Interface circuitry and method for transmitting and receiving downstream and upstream data signals simultaneously via a common conductor pair. The composite signal containing the downstream and upstream data signal components being conveyed by the common conductor pair is isolated, e.g., via signal filtering or buffering, and combined with an appropriately scaled inverse replica of the outgoing upstream data signal to subtract out upstream data signal components and thereby provide the downstream data signal substantially free of any upstream data signal components.

Abstract: A wireless energy transfer receiver includes an input configured to receive alternating current (AC) electric energy and an output configured to make available direct current (DC) electric energy. The receiver further includes a rectification component configured to convert the AC energy received at the input into DC energy available at the output, the DC energy made available as DC voltage; and a multiplication component configured to amplify a peak voltage of the AC energy received at the input, the DC voltage made available at the output correspondingly being higher than the peak voltage of the AC energy received at the input.

Abstract: A bi-directional charging device includes a rechargeable battery, a coil coupled to the rechargeable battery, a selection mechanism that selectively causes power to be delivered from the coil to the battery and selectively causes power to be delivered from the battery to the coil, and a control mechanism. Upon determining that the coil is to provide power to the battery, the control mechanism causes the selection mechanism to selectively cause power to be delivered from the coil to the battery, and upon determining that the coil is to receive power from the battery, the control mechanism causes the selection mechanism to selectively cause power to be delivered from the battery to the coil. The bi-directional charging device includes a housing enclosing the rechargeable battery, the coil, the selection mechanism, and the control mechanism.

Abstract: A master modem is configured to generate a carrier signal for transmission over a wired connection. A slave modem is configured to change an impedance of the wired connection to alter generation of the carrier signal by the master modem. The impedance of the wired connection is changed based on data to be provided by the slave modem. The master modem can demodulate its own carrier signal to obtain the data provided by the slave modem. The impedance of the wired connection could be changed by changing an impedance of a transformer winding or inductor of the slave modem, where the transformer winding or inductor is coupled to the wired connection. The impedance of the wired connection could also be changed by changing a reactance of a circuit coupled to the wired connection.

Abstract: An error amplifier includes a difference amplifier providing an error signal representing a difference in voltage between a feedback signal and a reference signal. The error amplifier further includes a compensation circuit limiting the rate of change of the error signal. The compensation circuit includes a switch that when activated effectively removes a circuit portion from the compensation circuit. A switch signal indicates for the switch to be activated when the feedback signal exceeds the reference signal by a predefined amount. The compensation circuit may further include a second switch that when activated effectively removes a second circuit portion from the compensation circuit. A second switch signal indicates for the second switch to be activated when the feedback signal exceeds the reference signal by a second predefined amount.

Abstract: A digital sensing device includes a sensor diagnostic system for detecting sensor fault conditions. The sensor diagnostic system including an input multiplexer applying a first burnout current or a second burnout current to a selected input channel and a near-rail detector configured to detect when an input voltage of the digital sensing device is near a positive power supply or near a negative power supply. The burnout current injection is applied without interfering with the sensor data. In other embodiments, the sensor diagnostic system may further include an overload detector configured to detect an overflow or underflow condition at the analog-to-digital converter. The sensor diagnostic system may further include a window comparator to detect when the ADC digital output is near a zero digital value. Finally, the sensor diagnostic system may further include a sensor flag generator to generate data flags indicative of sensor fault conditions.

Abstract: A clock generator circuit for producing a clock output having a controlled duty cycle is disclosed. A bi-stable circuit provides the clock output which is switchable to a first state in response to an edge of the input clock signal and to a second state in response to a feedback signal. A duty cycle detection circuit is configured to source a current to a node and to sink a current from the node depending upon the output clock state. A capacitor is connected to receive a duty cycle current relating to the current at the node, with a comparator circuit being configured to sense a voltage on the capacitor and to produce the feedback signal when the voltage is at a selected level.

Abstract: A photovoltaic array for use in an electrical power system includes multiple photovoltaic modules and a voltage converter coupled to at least one of the photovoltaic modules. The photovoltaic array also includes an over-voltage protection circuit. The over-voltage protection circuit includes an interface adapted to couple to an output of the voltage converter. The over-voltage protection circuit also includes a spike detector configured to detect a voltage spike in an output voltage of the voltage converter. The over-voltage protection circuit further includes a voltage control module configured to regulate an output voltage slew rate of the voltage converter in response to an over-voltage signal received from the spike detector.

Abstract: A DMOS transistor with a lower on-state drain-to-source resistance and a higher breakdown voltage utilizes a slanted super junction drift structure that lies along the side wall of an opening with the drain region at the bottom of the opening and the source region near the top of the opening.

Abstract: A method includes providing an input signal identifying a desired brightness for one or more LEDs to first and second parallel control paths. The method also includes generating a digital modulation control signal using the first control path, generating a current control signal using the second control path, and driving the one or more LEDs using the control signals. The method further includes performing compensation in at least one of the control paths to compensate for an increased efficiency of the one or more LEDs. Generating the control signals could include (i) adjusting the digital modulation control signal while maintaining the current control signal at a substantially constant value for a range of lower LED brightness values and (ii) adjusting the current control signal while maintaining the digital modulation control signal at a maximum value or within a range of maximum values for a range of higher LED brightness values.

Abstract: A system and method is disclosed for adding a low data rate data channel to a 100Base-T Ethernet link without significantly impacting an IEEE defined 100Base-T protocol for the Ethernet link. A dual data channel transmitter encodes a high data rate data stream in an MLT-3 encoder and encodes a low data rate data stream using bit representations that are not valid bit representations in the MLT-3 encoder. The dual data channel transmitter transmits both of the encoded bit streams in a dual data stream. A dual data channel receiver receives the dual data stream and separates and decodes the two bit streams. A low data rate data channel is provided in conjunction with a high data rate data channel without significantly impacting the operation of the high data rate data channel.

Abstract: A battery temperature monitoring circuit, which has a cold comparator and a hot comparator, achieves high accuracy in a small cell size by utilizing a cold current optimized for the cold comparator and a cold reference voltage, and a hot current optimized for the hot comparator and a hot reference voltage, along with switching circuitry that provides the cold current to the cold comparator as the battery temperature approaches the cold trip temperature, and the hot current to the hot comparator as the battery temperature approaches the hot trip temperature.