Patents Assigned to National Semiconductor
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Patent number: 9716167Abstract: A trench DMOS transistor with a very low on-state drain-to-source resistance and a high gate-to-drain charge includes one or more floating islands that lie between the gate and drain to reduce the charge coupling between the gate and drain, and effectively lower the gate-to-drain capacitance.Type: GrantFiled: February 22, 2011Date of Patent: July 25, 2017Assignee: National Semiconductor CorporationInventors: Yaojian Leng, Richard Wendell Foote, Jr., Steven J. Adler
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Patent number: 9543296Abstract: In a dual direction ESD protection circuit formed from multiple base-emitter fingers that include a SiGe base region, and a common sub-collector region, the I-V characteristics are adjusted by including P+ regions to define SCR structures that are operable to sink positive and negative ESD pulses, and adjusting the layout and distances between regions and the number of regions.Type: GrantFiled: October 9, 2013Date of Patent: January 10, 2017Assignee: NATIONAL SEMICONDUCTOR CORPORATIONInventor: Vladislav Vashchenko
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Patent number: 9444284Abstract: A bi-directional charging device includes a rechargeable battery, a coil coupled to the rechargeable battery, a selection mechanism that selectively causes power to be delivered from the coil to the battery and selectively causes power to be delivered from the battery to the coil, and a control mechanism. Upon determining that the coil is to provide power to the battery, the control mechanism causes the selection mechanism to selectively cause power to be delivered from the coil to the battery, and upon determining that the coil is to receive power from the battery, the control mechanism causes the selection mechanism to selectively cause power to be delivered from the battery to the coil. The bi-directional charging device includes a housing enclosing the rechargeable battery, the coil, the selection mechanism, and the control mechanism.Type: GrantFiled: December 2, 2014Date of Patent: September 13, 2016Assignee: NATIONAL SEMICONDUCTOR CORPORATIONInventor: James E. Schuessler
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Patent number: 9418611Abstract: The line banding image artifact that results from the interaction of LCD ripple and LED flicker in an LCD device that utilizes LED backlighting strings is substantially reduced by selecting a number of LED strings, individually driving the number of LED strings with a corresponding number of identical clock signals that are equally phase delayed, and selecting the frequency of the clock signals so that the product of the frequency of the clock signal multiplied by the number of LED strings is equal to the line clock frequency.Type: GrantFiled: June 6, 2011Date of Patent: August 16, 2016Assignee: NATIONAL SEMICONDUCTOR CORPORATIONInventors: Tuomas Tapani Tuikkanen, Jeremy K. Yaeger, Mikko Topi Loikkanen, Tomi Juhani Koskela
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Patent number: 9385199Abstract: A method includes forming a relaxed layer in a semiconductor device. The method also includes forming a tensile layer over the relaxed layer, where the tensile layer has tensile stress. The method further includes forming a compressive layer over the relaxed layer, where the compressive layer has compressive stress. The compressive layer has a piezoelectric polarization that is approximately equal to or greater than a spontaneous polarization in the relaxed, tensile, and compressive layers. The piezoelectric polarization in the compressive layer could be in an opposite direction than the spontaneous polarization in the compressive layer. The relaxed layer could include gallium nitride, the tensile layer could include aluminum gallium nitride, and the compressive layer could include aluminum indium gallium nitride.Type: GrantFiled: June 30, 2014Date of Patent: July 5, 2016Assignee: NATIONAL SEMICONDUCTOR CORPORATIONInventor: Jamal Ramdani
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Patent number: 9370064Abstract: A device driver which includes an input driver configured to produce a sequence of uncompensated drive signals along with compensation circuitry connected to receive the uncompensated drive signals and to produce corresponding compensated drive signals. The compensation circuitry is capable of storing two or less control points that define a single compensation curve such as a Bezier curve, with the compensation circuitry converting the uncompensated drive signals to the corresponding compensated drive signals utilizing the control points. An output driver is configured to drive a device such as one or more light emitting diodes to be connected to the output driver with the compensated drive signals.Type: GrantFiled: October 6, 2011Date of Patent: June 14, 2016Assignee: NATIONAL SEMICONDUCTOR CORPORATIONInventor: David James Fensore
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Patent number: 9363067Abstract: Interface circuitry and method for transmitting and receiving downstream and upstream data signals simultaneously via a common conductor pair. The composite signal containing the downstream and upstream data signal components being conveyed by the common conductor pair is isolated, e.g., via signal filtering or buffering, and combined with an appropriately scaled inverse replica of the outgoing upstream data signal to subtract out upstream data signal components and thereby provide the downstream data signal substantially free of any upstream data signal components.Type: GrantFiled: December 24, 2014Date of Patent: June 7, 2016Assignee: NATIONAL SEMICONDUCTOR CORPORATIONInventors: Vijaya G. Ceekala, Qingping Zheng, Min Du, Xin Liu, Chandrakumar R. Pathi
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Patent number: 9313853Abstract: A method includes providing an input signal identifying a desired brightness for one or more LEDs to first and second parallel control paths. The method also includes generating a digital modulation control signal using the first control path, generating a current control signal using the second control path, and driving the one or more LEDs using the control signals. The method further includes performing compensation in at least one of the control paths to compensate for an increased efficiency of the one or more LEDs. Generating the control signals could include (i) adjusting the digital modulation control signal while maintaining the current control signal at a substantially constant value for a range of lower LED brightness values and (ii) adjusting the current control signal while maintaining the digital modulation control signal at a maximum value or within a range of maximum values for a range of higher LED brightness values.Type: GrantFiled: October 28, 2014Date of Patent: April 12, 2016Assignee: NATIONAL SEMICONDUCTOR CORPORATIONInventors: Ari K. Väänänen, Mauri K. Määttä, T. Tapani Tuikkanen
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Patent number: 9305540Abstract: A system and method for processing close talking differential microphone array (CTDMA) signals in which incoming microphone signals are transformed from time domain signals to frequency domain signals having separable magnitude and phase information. Processing of the frequency domain signals is performed using the magnitude information, following which phase information is reintroduced using phase information of one of the original frequency domain signals. As a result, high pass filtering effects of conventional differential signal processing of CTDMA signals are substantially avoided.Type: GrantFiled: January 4, 2013Date of Patent: April 5, 2016Assignee: NATIONAL SEMICONDUCTOR CORPORATIONInventors: Yunhong Li, Lin Sun, Wei Ma
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Patent number: 9264682Abstract: An apparatus is provided, which includes a driving circuit. The driving circuit includes a gamma reference source and a liquid crystal display (LCD) source driver circuit. A first resistor string is provided. A plurality of digital-to-analog converters (DACs) are provided, where each DAC is coupled to the first resistor string. An output circuit having a second resistor string is provided so as to output a plurality of reference voltages. The LCD source driver circuit is coupled to the output circuit of the gamma reference source. The source driver is configured to receive the plurality of reference voltages, wherein the plurality of reference voltages are arranged in a first sequence during a positive polarity cycle and are arranged in a second sequence during a negative polarity cycle. The fifth sequence is an inverse of the fourth sequence.Type: GrantFiled: July 27, 2012Date of Patent: February 16, 2016Assignee: NATIONAL SEMICONDUCTOR CORPORATIONInventors: Christopher Ludden, Imre Knausz
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Patent number: 9250298Abstract: An apparatus includes a sense module configured to be coupled to at least one power supply, where the sense module has a first leg. The apparatus also includes a replica module having a second leg, where the first and second legs have a common structure. The apparatus further includes a feedback loop configured to cause an output voltage across terminals of the replica module to at least substantially equal an input voltage across terminals of the sense module based on sense currents in the first and second legs. At least one cascode stage coupled to the sense module can be configured to reduce a voltage at which one or more signals from the sense module are referenced. One or more trim units can be used to reduce a gain error and/or an offset error between the input voltage and the output voltage.Type: GrantFiled: April 13, 2011Date of Patent: February 2, 2016Assignee: NATIONAL SEMICONDUCTOR CORPORATIONInventors: Athos Canclini, Willem Johannes Kindt
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Patent number: 9235413Abstract: In semiconductor wafer manufacturing, processes such as analyzing test data associated with semiconductor wafers, interpreting the test data analysis, and acting on the test data interpretation and analysis are automated. Such automation can eliminate delays that were previously imposed by the action of test analysis engineers and wafer fabrication personnel, thereby reducing the amount of useless material that is produced before a process defect can be detected.Type: GrantFiled: August 3, 2005Date of Patent: January 12, 2016Assignee: National Semiconductor CorporationInventors: William MacDonald, George Logsdon, Matthew Lascom, Steven Craig Gessler
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Patent number: 9231412Abstract: In a wireless power transfer system with multiple receivers, receiver management may be necessary to effectively provide power to the multiple receivers. In one implementation, receiver management includes sweeping or stepping the transmitter resonant and/or operating frequency. In another implementation, receiver management includes receiver self-management, in which the receiver load current duty cycle is controlled to maintain receiver voltage even in the presence of multiple receivers. In another implementation, receiver management includes receiver self-management, in which one or more receivers use a time-sharing heuristic to identify when other receivers are charging and wait to begin receiving a transfer of power until another receiver has stopped receiving a transfer of power.Type: GrantFiled: December 20, 2011Date of Patent: January 5, 2016Assignee: NATIONAL SEMICONDUCTOR CORPORATIONInventors: Gianpaolo Lisi, Gerard G. Socci, Ali Djabbari, Ali Kiaei, Ahmad R. S. Bahai, Jeffrey Anthony Morroni
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Patent number: 9201124Abstract: The cost and size of an atomic magnetometer are reduced by attaching together a first die which integrates together a vapor cell, top and side photo detectors, and processing electronics, a second die which integrates together an optics package and a heater for the vapor cell, and a third die which integrates together a VCSEL, a heater for the VCSEL, and control electronics.Type: GrantFiled: July 14, 2011Date of Patent: December 1, 2015Assignee: NATIONAL SEMICONDUCTOR CORPORATIONInventors: Philipp Lindorfer, Peter J. Hopper, William French, Paul Mawson, Steven Hunt, Roozbeh Parsa
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Patent number: 9203380Abstract: One heuristic for tuning a wireless power transfer device includes monitoring a circuit parameter while sweeping a power source frequency; identifying two frequencies related to local maxima of the circuit parameter values; estimating self-resonant frequency of an electromagnetically coupled device based on the two frequencies; determining a value for a tuning component of the wireless power transfer device such that the device self-resonant frequency equals the estimated coupled device self-resonant frequency; and adjusting the tuning component to the determined value.Type: GrantFiled: May 27, 2011Date of Patent: December 1, 2015Assignee: NATIONAL SEMICONDUCTOR CORPORATIONInventors: Vijay N. Choudhary, Robert Loke
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Patent number: 9178407Abstract: A battery charger circuit having a regulator controller configured to control the switching transistors of a switching voltage regulator. A power path switch is disposed intermediate an output of the switching voltage regulator and a terminal of a battery to be charged, with the power path switch including at least two transistor segments having common respective drain electrodes, common respective source electrodes and separate respective gate electrodes. A power path switch controller operates to sequentially turn ON the at least two transistor segments of the power path switch, preferably in the order of a decreasing ON resistance.Type: GrantFiled: August 17, 2011Date of Patent: November 3, 2015Assignee: NATIONAL SEMICONDUCTOR CORPORATIONInventor: Sanjay Gurlahosur
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Patent number: 9111753Abstract: A method includes forming a stress compensation layer over a first side of a semiconductor substrate and forming a Group III-nitride layer over a second side of the substrate. Stress created on the substrate by the Group III-nitride layer is at least partially reduced by stress created on the substrate by the stress compensation layer. Forming the stress compensation layer could include forming a stress compensation layer from amorphous or microcrystalline material. Also, the method could include crystallizing the amorphous or microcrystalline material during subsequent formation of one or more layers over the second side of the substrate. Crystallizing the amorphous or microcrystalline material could occur during subsequent formation of the Group III-nitride layer and/or during an annealing process. The amorphous or microcrystalline material could create no or a smaller amount of stress on the substrate, and the crystallized material could create a larger amount of stress on the substrate.Type: GrantFiled: June 11, 2014Date of Patent: August 18, 2015Assignee: NATIONAL SEMICONDUCTOR CORPORATIONInventor: Jamal Ramdani
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Patent number: 9093846Abstract: A methodology for regulating power supplied to a powered component based on hardware performance, such as may be used in a system that includes the powered component and a switching regulator (EMU or energy management unit) configured to supply a regulated supply voltage to the powered component. Performance monitoring circuitry generates a performance monitoring signal corresponding to a detected performance level of selected digital operations of the powered component relative to a reference performance level. Switching control circuitry provides a switching control signal in response to the performance monitoring signal. In an example embodiments, the switching control circuitry for the switching regulator (switching transistor) is integrated into the powered component, and the detected performance level corresponds to a detected signal path delay associated with the digital operations of the powered component.Type: GrantFiled: February 27, 2013Date of Patent: July 28, 2015Assignee: NATIONAL SEMICONDUCTOR CORPORATIONInventor: Mark Hartman
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Patent number: 9087164Abstract: A system may include a database configured to store information including characteristics of a plurality of components. The system may further include a server in communication with the database and configured to receive design requirements indicative of desired power supply designs; query the database for components that satisfy the design requirements; determine a plurality of power supply designs in accordance with the components and the design parameters; determine key parameters of at least a subset of the determined power supply designs; and rank the power supply designs.Type: GrantFiled: August 26, 2010Date of Patent: July 21, 2015Assignee: NATIONAL SEMICONDUCTOR CORPORATIONInventors: Jeffrey R. Perry, Khanh Nhat Vo, Dien Mac, Martin Garrison, Phil Gibson
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Patent number: 9088307Abstract: A wireless power transfer system includes: a non-resonant transmitter, or a transmitter with a resonant circuit; and a non-resonant receiver, or a receiver with a resonant circuit. In some implementations, a transmitter with a resonant circuit is operated away from its resonance frequency. In some implementations, a receiver with a resonant circuit is operated away from the transmitter resonance frequency and/or the transmitter operating frequency. In some implementations, the selection of receiver resonance frequency is based on receiver power requirements. Thus, wireless power transfer may be accomplished by operating away from resonance in a quasi-resonant or non-resonant mode, and further may be accomplished using a non-resonant transmitter and/or a non-resonant receiver. Effective power transfer may also be achieved between a transmitter and multiple receivers. A combination of resonant and non-resonant transmitter and receiver(s) may be used for power transfer.Type: GrantFiled: December 19, 2011Date of Patent: July 21, 2015Assignee: NATIONAL SEMICONDUCTOR CORPORATIONInventors: Gianpaolo Lisi, Gerard G. Socci, Ali Djabbari, Kosha Mahmodieh