Abstract: A low voltage one-time-programmable memory includes a first conductive layer, a first via, a second conductive layer, a select transistor, a second via and a third conductive layer. The first via is electrically connected to the first conductive layer. The second conductive layer is electrically connected to the first via. The select transistor is electrically connected to the second conductive layer. The second via is electrically connected to the second conductive layer. The third conductive layer is electrically connected to the second via. A first current passed through the second via is a sum of a second current passed through the first via and a third current passed through the select transistor.

Abstract: A radio frequency integrated circuit comprising: at least one transistor; a matching circuit coupled to said transistor; and at least one bump is used to form a passive element in said matching circuit, and said bump is used for radio frequency matching, the bumps can be used as passive components for amplifier harmonic impedance matching or the bumps can be the amplifier's passive components of the harmonic impedance matching, both of them can enhance the power, bandwidth and efficiency of amplifiers and integrated circuits.

Abstract: A feed-forward equalizer (FFE) and a voltage-mode signal transmitter using the same are provided. The FFE includes an output, a plurality of tap drivers, and a control circuit. Each tap driver includes a cell driver. The control circuit includes a FFE control loop and an impedance control loop. The FFE control loop includes a first replica circuit corresponding to a part of the cell drivers. The FFE control loop generates at least one first reference voltage according to the first replica circuit. The impedance control loop includes a second replica circuit corresponding to the cell drivers in the tap drivers. The impedance control loop generates at least one second reference voltage according to the first reference voltage and the second replica circuit. The tap drivers are controlled by the first and second reference voltages to adjust respective output impedance thereof.

Abstract: A memory device includes a current source and a memory array. The current source is configured to provide a current to a first node. The memory array is coupled to the current source at the first node. The memory array includes memory cells. First terminals of the memory cells are coupled to the first node. Each of the memory cells has a first resistance in response to having a first data value, and has a second resistance in response to having a second data value. The second data value is N times the first data value. The second resistance is approximately one-Nth of the first resistance, for N being a positive integer larger than one. A method of operating a memory device is also disclosed herein.

Abstract: A feed-forward equalizer (FFE) and a voltage-mode signal transmitter using the same are provided. The FFE includes an output, a plurality of tap drivers, and a control circuit. Each tap driver includes a cell driver. The control circuit includes a FFE control loop and an impedance control loop. The FFE control loop includes a first replica circuit corresponding to a part of the cell drivers. The FFE control loop generates at least one first reference voltage according to the first replica circuit. The impedance control loop includes a second replica circuit corresponding to the cell drivers in the tap drivers. The impedance control loop generates at least one second reference voltage according to the first reference voltage and the second replica circuit. The tap drivers are controlled by the first and second reference voltages to adjust respective output impedance thereof.

Abstract: An edge detector applied to a vertical-cavity surface-emitting laser is provided. The edge detector includes an alignment circuit, a rising-edge detecting circuit and a falling-edge detecting circuit. The alignment circuit is configured to receive and align multiple sets of differential input data and output multiple sets of differential output data corresponding to the multiple sets of differential input data. The multiple sets of differential output data include a set of delayed differential output data. The rising-edge detecting circuit is coupled to the alignment circuit. The rising-edge detecting circuit is configured to detect rising edges of the multiple sets of differential output data and output multiple sets of corresponding differential rising data. The falling-edge detecting circuit is coupled to the alignment circuit.

Abstract: A balloon catheter system assisted by ultrasound and microbubbles and a method for vasodilation are provided. The system includes: a controller; a sensor catheter; a highly focused ultrasound probe, and the highly focused ultrasound probe and the sensor catheter is connected to the controller; and a balloon catheter. The method of vasodilation includes: providing a sensor catheter into a blood vessel, and controlling a highly focused ultrasound probe to focus at a hardened portion of the blood vessel; removing the sensor catheter from the blood vessel and inserting a balloon catheter into the blood vessel; infusing microbubbles into the balloon catheter and controlling the highly focused ultrasound probe to start working to destroy a calcification point of the hardened portion of the blood vessel, and smoothly inflating the balloon catheter at the hardened portion of the blood vessel.

Abstract: Protein cyclization is a method for making proteins more stable. The method requires a properly designed linker to connect the original N-terminus and C-terminus of a protein sequence. A new strategy is used for creating flexibility in the linker design. The new strategy includes an activatable polypeptide arrangement to produce cyclized proteins, characterized in that the strategy can be used to produce cyclized interleukins. The strategy cyclizes the interleukins via introducing a linker into the interleukin and using an intein-mediated protein splicing. The linker sequence is not related to the protein splicing reaction, thus providing flexibility in the introduction of linker. The prepared cyclized interleukins contain high structural stability, native interleukin structure and long-lasting activity. The cyclized interleukins have the potential to replace native interleukins in bio-industrial applications or to modulate the functions of interleukins.

Abstract: A method of screening for a drug combination for treating colorectal carcinoma, the screened drug combination and its related application are provided. The drug combination includes at least three selected from Regorafenib, Gemcitabine, Cetuximab and 5-Fluorouracil. With the method of the disclosure, the best and novel drug combination can be selected from the existing clinical drugs, the technical effect of rapidly screening for a drug combination can be achieved, and the screened combination drug has an excellent therapeutic effect.

Abstract: A memory includes a memory device, a reading device and a feedback device. The memory device stores a plurality of bits. The reading device includes first and second reading circuits coupled to the memory device. The second reading circuit is coupled to the first reading circuit at a first node. The first and second reading circuits cooperates with each other to generate a first voltage signal at the first node based on at least one first bit of the plurality of bits. The feedback device adjusts at least one of the first reading circuit or the second reading circuit based on the first voltage signal. The first and second reading circuits generate a second voltage signal, different from the first voltage signal, corresponding to the bits, after the at least one of the first reading circuit or the second reading circuit is adjusted by the feedback device.

Abstract: A dielectric-grating waveguide free-electron laser device generating coherent or laser-like radiation is provided. An electron beam propagates next to a dielectric waveguide with a built-in grating structure to generate highly confined coherent or laser-like radiation in the waveguide through the Bragg resonance, the backward-wave resonance, or the Fabry-Perot resonance provided by the grating-waveguide structure. The dielectric-grating waveguide can be made of linear optical materials or nonlinear optical materials or combination of linear and nonlinear optical materials to enable versatile functionalities, such as laser generation, laser-wavelength conversion, and laser signal processing. Owing to the build-up of the laser modes inside the dielectric waveguide, coherent or laser-like Smith-Purcell radiation is also generated above the grating via coupling and bunching of the electrons with the surface mode fields.

Abstract: A memory device is provided, including a memory array and a selection circuit. At least one first faulty cell and at least one second faulty cell that are in the memory array store data corresponding to, respectively, first and second fields of a floating-point number. The selection circuit identifies the at least one first faulty cell and the at least one second faulty cell based on a priority of a cell replacement operation which indicates that a priority of the at least one first faulty cell is higher than that of the at least one second faulty cell. The selection circuit further outputs a fault address of the at least one first faulty cell to a redundancy analyzer circuit for replacing the at least one first faulty cell.

Abstract: A method includes applying a first voltage to a source of a first transistor of a detector unit of a semiconductor detector in a test wafer and applying a second voltage to a gate of the first transistor and a drain of a second transistor of the detector unit. The first transistor is coupled to the second transistor in series, and the first voltage is higher than the second voltage. A pre-exposure reading operation is performed to the detector unit. Light of an exposure apparatus is illuminated to a gate of the second transistor after applying the first and second voltages. A post-exposure reading operation is performed to the detector unit. Data of the pre-exposure reading operation is compared with the post-exposure reading operation. An intensity of the light is adjusted based on the compared data of the pre-exposure reading operation and the post-exposure reading operation.

Abstract: A composite solid base catalyst, a manufacturing method thereof and a manufacturing method of glycidol are provided. The composite solid base catalyst includes an aluminum carrier and a plurality of calcium particles. The plurality of calcium particles are supported by the aluminum carrier. Beta basic sites of the composite solid base catalyst are 0.58 mmol/g-3.89 mmol/g.

Abstract: A memory unit includes at least one memory cell and a computational cell. The at least one memory cell stores a weight. The at least one memory cell is controlled by a first word line and includes a local bit line transmitting the weight. The computational cell is connected to the at least one memory cell and receiving the weight via the local bit line. Each of an input bit line and an input bit line bar transmits a multi-bit input value. The computational cell is controlled by a second word line and an enable signal to generate a multi-bit output value on each of an output bit line and an output bit line bar according to the multi-bit input value multiplied by the weight. The computational cell is controlled by a first switching signal and a second switching signal for charge sharing.

Abstract: A non-fullerene acceptor polymer includes a structure represented by formula (I). Formula (I) is defined as in the specification. The non-fullerene acceptor polymer has an electron donating unit and an electron attracting end group. The non-fullerene acceptor polymer uses phenyl or its derivatives as the linker to form the polymer.

Abstract: A memory includes a memory device, a reading device and a feedback device. The memory device stores a plurality of bits. The reading device includes first and second reading circuits coupled to the memory device. The second reading circuit is coupled to the first reading circuit at a first node. The first and second reading circuits cooperates with each other to generate a first voltage signal at the first node based on at least one first bit of the plurality of bits. The feedback device adjusts at least one of the first reading circuit or the second reading circuit based on the first voltage signal. The first and second reading circuits generate a second voltage signal, different from the first voltage signal, corresponding to the bits, after the at least one of the first reading circuit or the second reading circuit is adjusted by the feedback device.

Abstract: A photoresist composition includes a mixture. The mixture includes a first photosensitive material and a second photosensitive material. The first photosensitive material is a 6-Sn oxide cluster, a 12-Sn oxide cluster or a combination thereof. The second photosensitive material has a composition being different from a composition of the first photosensitive material.

Abstract: A high hardness and temperature-resistant alloy is disclosed, and comprises 10-40 atomic percent Co, 30-56 atomic percent Cr, 10-40 atomic percent Ni, 6-13 atomic percent C, 0-8 atomic percent Mo, and 0-8 atomic percent W. Moreover, the elemental composition of the high hardness and temperature-resistant alloy can further comprise at least one additive element, such as Pb, Sn, Ge, Si, Zn, Sb, P, B, Mg, Mn, V, Nb, Ti, Zr, Y, La, Ce, Al, Ta, Cu, and Fe. Experimental data reveal that, the high hardness and temperature-resistant alloy can still show a property of hardness greater than HV100 in 900 degrees Celsius. Therefore, experimental data have proved that the high hardness and temperature-resistant alloy has a significant potential for applications in the manufacture of hot working die metals, components (e.g., turbine blade) for high temperature applications, and devices (e.g., aeroengine) for high temperature applications.

Abstract: A sensing system on chip (SOC) is disclosed. The sensing system on chip (SOC) includes a substrate, a humidity sensing unit, an air pressure sensing unit and a gas sensing unit. The substrate has a plane. The humidity sensing unit is formed on the substrate. The air pressure sensing unit is formed on the substrate. The gas sensing unit is formed on the substrate, wherein the humidity sensing unit, the air pressure sensing unit and the gas sensing unit are all arranged on the plane.