Abstract: Each data element in an inputted variable-length code word is matched simultaneously with correspondingly positioned data elements stored in a pair of memory units. The first memory unit has stored therein a plurality of variable-length code words which by their stored position in the memory unit represents the coded information contained in the inputted variable-length code word. The second memory unit has stored therein length-defining words each indicating the length of the corresponding variable-length code word stored in the first memory unit.

Abstract: A pressure-sensitive record sheet material comprising a supporting web material having adhesively bound on the surface thereof a coating composition comprising kaolin clay, a zinc-modified alkyphenol-formaldehyde resin and a metallic compound selected from the group consisting of calcium oxide, calcium hydroxide and magnesium oxide, said resin and metallic compound combining to produce an improved color response when contacted with a color-producing material.

Abstract: A data storage system having a charge coupled device (CCD) shift register and a detection circuit for detecting the binary value represented by the charge level or signal within each cell location of the CCD shift register. The detection circuit includes a sense amplifier for comparing the signals from two adjacent cell locations, with one signal representing a known binary value. The comparison of adjacent cell locations compensates for signal losses during shifting, since the losses experienced by adjacent cell locations are nearly identical. Switching transistors cause an adjustment voltage to be added to one of the signals prior to comparison. The output of the sense amplifier is provided to a flip-flop, which in turn has an output initially set at the known binary value and which controls the switching transistors.

Abstract: A method of manufacturing a silicon gate MIS device providing automatic formation and alignment of the gate structure during formation of adjacent impurity regions. In a preferred embodiment, the process is for the gate structure and source and drain of silicon gate FETs. The layered gate constituents-- typically oxide and silicon-- are formed on a semiconductor wafer. A photoresist mask which is larger than the desired gate size is formed on the silicon and the silicon is etched to a predetermined size beneath the overhanging mask. A deposition mask in the form of the photoresist mask or the gate silicon oxide and which is of the same size as the photoresist mask, is used to control the deposition of impurities within predetermined surface areas of the substrate which are spaced a predetermined distance from the silicon gate boundaries.

Abstract: A high density memory system is formed by reducing the number of electrical conductors that are needed to connect individual memory devices into an operable memory system. The reduction is accomplished by serially reading and writing data from and into selected memory elements on one function conductor while eliminating the need for additional control conductors by causing the state of the signal on a clock conductor as compared to the state of the signal on the function conductor at selected times to control the operating mode of the memory system.

Abstract: A decoding circuit including an adaptive synchronizing circuit for synchronizing to time-encoded data streams with an explicit output for eliminating non-data flux reversals in certain types of phase-encoded data such as Manchester-coded data. A preferred embodiment of the circuit includes a timer having first and second inputs and an output for producing a first state in response to a first signal at the first input, and also includes a means for producing a second state at the output of the timer in response to a predetermined condition at the second input. The circuit also includes additional circuit paths operatively coupling the output of the timer with the second input thereto whereby each of the first and second states are maintained at a relatively stable percentage of the time between successive first signals to the first input when the frequency of successive first signals varies. One of the first and second states of the timer provides a blanking pulse for eliminating the non-data flux reversals.

Abstract: A thermally sensitive record material having a very low abrasive surface comprising a substrate coated with a colorless chromogenic material and a phenolic co-reactant in a binder and including a cross-linked urea-formaldehyde resin pigment as a component thereof. The use of the urea-formaldehyde (UF) resin pigment provides a thermal record material with superior bleed resistance, extremely low abrasivity, thereby reducing wear on imaging tools such as print heads, and improved release properties. The UF pigment also improves the image to background contrast and the efficiency of the action of the co-reactants in the record material.

Abstract: A mask generator for use in a digital computer receives input signals defining the beginning and the end addresses of the inhibiting bits of the mask. The mask generator includes decoder circuits for receiving the input signals and a look-ahead carry circuit whose output signals represent the mask.

Abstract: A two piece hand-manipulated variable fit fastener is disclosed comprising an elongated fastener member having a reduced axially extending portion permitting the fastener member to be folded on itself prior to being inserted through aligned apertures located in a pair of mating surfaces and a retainer element having a plurality of locking surfaces, the retainer element being slidably mounted on the fastener member. After insertion through the aligned apertures in the mating surfaces, the fastener element is unfolded to a position engaging one of the locking surfaces in the retainer element to lock the fastener member in the unfolded position. The positioning of the fastener member in the unfolded position also allows a pair of end shoulder portions to engage one of the mating surfaces and the retainer element to fasten the mating surfaces together.

Abstract: A document dispensing system for dispensing documents or bills from a source to a customer access receptacle or a reject bin depending upon certain characteristics of the bills or the manner in which they are fed. Sensors which are positioned along a dispensing path are sampled to produce first and second states therein in accordance with the presence or absence, respectively, of bills in the dispensing path. The states of the sensors are stored to provide short term and long term histories of the sensors along with a time in transport for each of the bills in the dispensing path. The short and long term histories and the time in transport are utilized for evaluating the status of each of the bills in the dispensing path with regard to predetermined criteria such as, for example, "double thickness", or "bill too long", and for producing a control signal which controls a diverter gate to divert the bills into the access receptacle or reject bin in accordance with the evaluation.

Abstract: A connector comprising a female member having a slot therein to receive a complementary member such as a male connector or a printed circuit board. First and second groups of contacts are located in the female member to engage the complementary member. An actuating structure including an actuating member is used for sequentially moving the contacts of the first and second groups between a first or "restored" position and a second or "expanded" position when the actuating member is moved in a first direction, whereby the contacts of the first group are first moved to the expanded position, and thereafter, the contacts of the second group are moved to the expanded position upon further movement of said actuating member in said first direction. When the contacts of the first and second groups are moved to the expanded positions, the complementary member may then be inserted into the female member with zero-insertion force.

Abstract: An electrically configurable decoder including selectively configurable combinations of a plurality of basic decode circuits. The electrically configurable decoder includes a plurality of mode selection inputs, a plurality of address inputs, a plurality of logic level definition inputs, and a plurality of disable inputs. Various combinations of decoding functions are provided by the electrically configurable decoder in response to the mode selection inputs. A plurality of selection circuits selectively decodes various ones of the address inputs and mode selection inputs to produce signals which are applied to decode inputs and enable inputs of the basic decoder circuits. A logical "one" applied to a first one of the logic level definition inputs causes "high" and "low" voltage levels produced at the outputs of a first one of the basic decoder circuits to represent logical "ones" and "zeroes," respectively.

Abstract: An adapter for use with a host processor for processing interrupts between a host processor and a plurality of remote data terminal devices is disclosed. The adapter includes a microprocessor, counter means which is incremented by a clock for sequentially interrogating a plurality of remote data terminal devices to determine whether or not a remote device is requesting access to the host processor and an external buffer for storing the output of the counter. The output of the counter is transferred to the microprocessor upon the sensing of a request signal for use by the microprocessor in identifying the requesting remote data terminal device and for processing the data from the requesting device to the host processor. The operation of the counter means is controlled by the microprocessor in accordance with the availability of the microprocessor to service the requesting data terminal device.

Abstract: A program is developed for testing printed circuit boards by applying a proposed test program to a board which is initially in an arbitrary response state, comparing the resulting response pattern with a reference, modifying the proposed program if necessary to obtain a valid comparison, running the program on the board successively while faults are applied to selective board input nodes, determining penetration of the faults through the board by analyzing the toggle signatures of the response nodes, and again modifying the program if necessary. Circuit boards are tested with the resulting program by accumulating a running toggle signature number for selected response nodes as the program is applied to the test board, periodically sampling the numbers, and comparing the test samples with corresponding samples from a reference board.

Abstract: An adhesion-enhancing technique for preparing the surface of a polycrystalline silicon body to receive organic photoresist. In an exemplary procedure, the polysilicon is placed in an oxygen plasma chamber operating under rf power of about 90 milliwatts per cubic centimeter of chamber volume and a pressure of approximately 1 torr for 10 minutes to form an adhesion-enhancing oxide monolayer on the polysilicon.

Abstract: Portable tester and method for testing a variety of circuit boards without utilizing adaptor boards for re-routing input test signals and supply voltage from the tester to pins of the board under test. A plurality of edge adaptors having different pin spacings have their respective pins connected in parallel to corresponding edge connector stake pins. Each edge connector stake pin is connected to or isolated from the corresponding driver/sensor stake pin by means of a switch. Each driver/sensor stake pin is connected to the input/output terminal of a programmable driver/sensor circuit. A plurality of power supply stake pins are connected to various power supplies of the portable tester. Connectors coupled to the family board can be utilized to route power supply voltages to electrically isolated edge connector stake pins. Isolated driver/sensor outputs can be routed to other edge connector stake pins.

Abstract: Portable tester and method for testing a variety of printed circuit boards without utilizing specialized adaptor boards for rerouting input test signals and supply voltages from the tester to various pins of the board under test. A plurality of edge connectors have their respective pins connected to corresponding edge connector stake pins. Each edge connector stake pin is connected to or isolated from the corresponding driver/sensor stake pin by means of a switch. Each driver/sensor stake pin is connected to the input/output terminal of a programmable driver/sensor circuit. A main processor is utilized to store a test program and to transmit data and control information to predetermined driver/sensor circuits. A high speed processor coupled between the main processor and the inputs of the driver/sensor circuits includes a parallel-loadable shift register, an instruction register, an instruction decoder and control circuitry connected to the inputs of the driver/sensor circuitry.

Abstract: A record member feeding device is disclosed for feeding record members from a stack, located in a hopper having spaced-apart surfaces positioned at one end thereof defining an opening through which the record members may be fed. A vacuum-operated, solenoid-control picking member grasps one of the record members and shifts it through the opening to a position in which it is contacted by projections on a rotatable feeding element and is moved thereby into engagement with counter-rotating take away rollers which further transport it to its desired destination.

Abstract: A data processor utilizes a central processor controller to determine selectively the next required operation phase while executing a current operation phase. Control words contained in a second stage control memory are selectively addressed from addresses contained in a first stage control memory. The selection of a particular address of a control word contained in said first stage control memory is determined from combinations of signals received by a condition multiplexer interposed between said first and second stage control memories, portions of program instructions contained in main memory, externally operated manual switches, and various internal control flags. The operation phase is defined as an operation, which is defined by said control word. The generation of the address for the next required control word and the execution of the operation defined by the current control word occurs in the same machine cycle.

Abstract: A circuit providing a means of transferring and storing the energy from the collapsing field of a deenergized inductive load to a capacitor, and subsequently delivering this energy back to the inductive load to aid in its re-energization. A first circuit path is provided for transferring the energy from the inductive load to the capacitor, and a second circuit path is provided for transferring the energy from the capacitor to the inductive load, said second circuit path including a signal translating device, the conductivity of which is controlled by the charge on the capacitor at the time re-energization of the inductive load is initiated.