Patents Assigned to NEC Corporation
  • Patent number: 5977807
    Abstract: An output buffer circuit for transferring a high speed signal between large scale integrated circuits includes a first inverter with first and second transistors of opposite conductivity type, a second inverter with third and fourth transistors of opposite conductivity type, and a switch circuit for controlling the gates of the first and second transistors in accordance with a test control signal so as to change a dividing power. The respective outputs of the first and second inverters are connected in common to an output signal having a predetermined signal level related to an input signal.
    Type: Grant
    Filed: September 30, 1998
    Date of Patent: November 2, 1999
    Assignee: NEC Corporation
    Inventor: Hiroyuki Watanabe
  • Patent number: 5978533
    Abstract: An optical part fixing chip in accordance with the present invention comprises: a guide trench bored in a substrate and having one end thereof abutted on one side of the chip; and a stepped area abutting on one end of the guide trench and extending along one side of the optical part fixing chip. The height of the step of the stepped area is the same as the depth of the guide trench.
    Type: Grant
    Filed: April 23, 1998
    Date of Patent: November 2, 1999
    Assignee: NEC Corporation
    Inventor: Mitsuhiro Sugiyama
  • Patent number: 5977614
    Abstract: The lead structure for a first power supply potential is formed by first and second power supply leads 35a and 35b and a first connecting conductor part 36a connected there, and the lead structure for a second power supply potential is formed by third and fourth power supply leads 35c and 35d and a second connecting conductor part 36b connected there. The first connecting conductor part 36a and the second connecting conductor part 36b are placed at the central part of a semiconductor chip with a predetermined spacing between them, a plurality of first signal leads 34a and first signal pads 32a which are respectively connected there are disposed in the area between the first connecting conductor part 36a and a first edge 41, and a plurality of second signal leads 34b and second signal pads which are respectively connected there are disposed in the area between the second connecting conductor part 36b and a second edge 42.
    Type: Grant
    Filed: May 19, 1997
    Date of Patent: November 2, 1999
    Assignee: NEC Corporation
    Inventor: Yasuhito Takeuchi
  • Patent number: 5978531
    Abstract: It is the object of the invention to integrally conform functions of devices of optical fiber types with those of SiO.sub.2 waveguides, miniaturize optical devices and provide optical waveguide devices with various optical functions. A SiO.sub.2 waveguide, which is composed of a SiO.sub.2 waveguide clad with low refractive index and a SiO.sub.2 waveguide core with high refractive index, is formed on a Si substrate. The core and the clad on an area, where the direction of the core coincides with the orientation of crystallization of a Si substrate, are removed. A V-groove is formed along the orientation of crystallization of the exposed Si substrate. Both the end surfaces of an optical fiber grating, which is fitted in the V-groove, face those of the remaining SiO.sub.2 waveguide. The cores of the SiO.sub.2 waveguides and the optical fiber grating are optically coupled with each other.
    Type: Grant
    Filed: December 9, 1997
    Date of Patent: November 2, 1999
    Assignee: NEC Corporation
    Inventor: Masaaki Funabashi
  • Patent number: 5977696
    Abstract: In a field emission electron gun including emitters (104) on predetermined parts of a substrate (109), an insulator film (105) on a remaining part of the substrate, a first gate electrode (101) on the insulator film so as to surround the emitters with a space left between each emitter and the first gate electrode and to have an outer peripheral surface defining an emission region (E), a gate edge portion (106) of a conductor is formed on the insulator film to surround the outer peripheral surface of the first gate electrode in contact with the outer peripheral surface of the first gate electrode. A second gate electrode (102) is formed on the insulator film to surround the gate edge portion with a distance left between the gate edge portion and the second gate electrode applied with a second voltage less than a first voltage applied to the first gate electrode.
    Type: Grant
    Filed: May 8, 1997
    Date of Patent: November 2, 1999
    Assignee: NEC Corporation
    Inventor: Akihiko Okamoto
  • Patent number: 5977710
    Abstract: A patch antenna has: a driven patch fed with a high-frequency signal and radiates a high-frequency electromagnetic field from its one surface; a parasitic patch receives the high-frequency electromagnetic field from the driven patch at a first surface and reradiates the high-frequency electromagnetic field from a second surface; and a radome which protectively holds the driven patch and the parasitic patch inside of the radome; wherein the parasitic patch is held by the inner surface of the radome which contacts the second surface of the parasitic patch and by a holder which protrudes from the inner surface of the radome and covers a part of the first surface of the parasitic patch.
    Type: Grant
    Filed: March 11, 1997
    Date of Patent: November 2, 1999
    Assignee: NEC Corporation
    Inventors: Akio Kuramoto, Kosuke Tanabe
  • Patent number: 5978395
    Abstract: A light transmitting circuit of a light wave length multiplexing apparatus comprises a LD module 2 including a semi-conductor laser device, a temperature control circuit 3 and a driving current generating circuit for providing the semi-conductor laser device with a driving current. A temperature control circuit 3 generates a temperature error signal, when the difference between a temperature monitor signal and a temperature set signal is too great, that is, while the wave length is not normal. The temperature error signal is input to a LD driver 1, a bias circuit 4 or a light amplifier 6, and the light output signal stops. The light transmitting circuit has no influence on the output signal of the light transmitting circuit of a remaining wavelength for the light wave length multiplexing operation, when the temperature of the semi-conductor laser device differs significantly the temperature set value because of the set-up process or a failure.
    Type: Grant
    Filed: January 2, 1997
    Date of Patent: November 2, 1999
    Assignee: NEC Corporation
    Inventor: Kenichi Nomura
  • Patent number: 5977617
    Abstract: A semiconductor device includes multilayer film carriers, a plurality of connection layers having innerleads protruded from the film carriers, and a semiconductor chip having electrode pads connected to the innerleads.
    Type: Grant
    Filed: May 12, 1997
    Date of Patent: November 2, 1999
    Assignee: NEC Corporation
    Inventor: Keiichiro Kata
  • Patent number: 5976962
    Abstract: There is provided a method of fabricating a semiconductor device, including the steps of (a) forming impurity-diffused layers at a surface of a silicon semiconductor substrate in selected regions, (b) forming a refractory metal film over the impurity-diffused layers, (c) carrying out first thermal annealing in nitrogen atmosphere to convert the refractory metal film into a refractory metal silicide layer, (d) causing damage to a denaturated layer having been formed over the refractory metal film due to the first thermal annealing, (e) etching both the denaturated layer and non-reacted portions of the refractory metal film with a solution containing ammonia and hydrogen peroxide therein, and (f) carrying out second thermal annealing in nitrogen atmosphere to reduce resistance of the refractory metal silicide layer. For instance, the damage is caused to the denaturated layer by arsenic (As) ion implantation. The damage may be caused to the denaturated layer by exposing to oxygen plasma.
    Type: Grant
    Filed: January 12, 1998
    Date of Patent: November 2, 1999
    Assignee: NEC Corporation
    Inventor: Noriaki Oda
  • Patent number: 5976965
    Abstract: A method for arranging metallic balls to form an array of bump electrodes comprises the steps of immersing a silicon template in ethanol dropping metallic balls through the ethanol onto the template to receive the metallic balls in the holes of the template. The metallic balls are free from cohesion caused by electrostatic charge or moisture. The template may be inclined in the ethanol. The holes are formed by anisotropic etching a silicon plate.
    Type: Grant
    Filed: June 17, 1998
    Date of Patent: November 2, 1999
    Assignee: NEC Corporation
    Inventors: Nobuaki Takahashi, Naoji Senba, Yuzo Shimada
  • Patent number: 5978508
    Abstract: A two-dimensional inverse discrete cosine transformation circuit of an MPEG2 video decoder including a one-dimensional inverse discrete cosine transformation circuit, an input switching circuit for receiving input of new data and data already subjected to first one-dimensional inverse discrete cosine transformation and sending one of them to the one-dimensional inverse discrete cosine transformation circuit, an input switching control circuit for controlling the input switching circuit so as to alternately and continuously output data output from a first serial-parallel conversion circuit and data output from a second serial-parallel conversion circuit, and a data allocation circuit for switching and controlling an output destination of output data of the one-dimensional inverse discrete cosine transformation circuit based on the timing of switching by the input switching control circuit.
    Type: Grant
    Filed: September 18, 1997
    Date of Patent: November 2, 1999
    Assignee: NEC Corporation
    Inventor: Eiji Tsuboi
  • Patent number: 5977633
    Abstract: In the manufacture of a semiconductor device, an insulator film is attached to the back surface of a metal base substrate, and over the insulator film a wiring pattern is formed. A silicon chip is loaded on the metal base substrate via a mount and is connected to the wiring pattern via bonding wires. Solder pads or bump contacts are formed on the wiring pattern; the metal base substrate is locally cut out at areas just above the solder bump contacts to form hollows. Finally the resulting wiring pattern is covered with a cover insulator film and the silicon chip is sealed with seal resin.
    Type: Grant
    Filed: May 29, 1998
    Date of Patent: November 2, 1999
    Assignee: NEC Corporation
    Inventors: Katsunobu Suzuki, Hiroyuki Uchida
  • Patent number: 5978758
    Abstract: A first vector quantizer generates output codevectors corresponding in number to a number determined by a predetermined number of bits through linear coupling of integer coefficients of a predetermined number of base vectors stored in a base vector memory. A second vector quantizer determines coefficients of the base vectors according to at least one of output indexes of the output codevectors.
    Type: Grant
    Filed: July 10, 1997
    Date of Patent: November 2, 1999
    Assignee: NEC Corporation
    Inventor: Shigeru Ono
  • Patent number: 5977881
    Abstract: A radio selective calling receiver has a function of causing a reception section for receiving a transmitted radio signal to intermittently receive the radio signal by intermittently supplying a reception section power supply ON signal for turning on the reception section. The radio selective calling receiver detects the movement of the receiver out of a coverage zone on the basis of data indicating that the radio signal received by the reception section contains no sync signals having a predetermined period. The receiver then determines the state of movement out of the coverage zone on the basis of a received state of the sync signals within a predetermined period of time in the past until the movement of the receiver out of the coverage zone is detected, and controls the time intervals at which the reception section power supply ON signal is supplied to the reception section in accordance with the determined state.
    Type: Grant
    Filed: August 1, 1997
    Date of Patent: November 2, 1999
    Assignee: NEC Corporation
    Inventor: Toru Kido
  • Patent number: 5978355
    Abstract: When an ATM cell is re-assembled, in order to accommodate fluctuation of delay of arriving ATM cells, the ATM cells are sequentially written in and read out from a re-assembling queue buffer in a first-in first-out manner. A storage depth of the buffer is automatically adjusted so that a delay of the ATM cells becomes minimum. After initializing a storage depth of the buffer, reading out of the ATM cells from the buffer is initiated when the cells are accumulated up to the intermediate depth of the initialized storage depth. Then, overflow or underflow within the predetermined period is monitored by a training control portion. When the overflow or underflow is detected, the storage depth is increased by a predetermined amount and then the ATM cells are again accumulated and read out with monitoring overflow and underflow. The above mentioned process is repeated until the overflow and underflow are not detected. By this, the storage depth of the buffer can be optimized.
    Type: Grant
    Filed: March 20, 1997
    Date of Patent: November 2, 1999
    Assignee: NEC Corporation
    Inventor: Yasuhiro Yamaguchi
  • Patent number: 5974961
    Abstract: A multi-hopper embosser comprising a card processing apparatus (13, 14, 15) for performing encoding, embossing and tipping processings on a card, plural hoppers (11) which are connected to the card processing apparatus via a loader unit (12) and adapted to stock cards therein, and a control apparatus (18) for controlling the card processing apparatus and the loader unit (12) to take out the card from a selected one of the plural hoppers (11) and perform the encoding, embossing and tipping processings on the card taken out.
    Type: Grant
    Filed: December 15, 1997
    Date of Patent: November 2, 1999
    Assignees: NEC Corporation, Dodwell BMS, Ltd
    Inventors: Osamu Kazo, Tsuyoshi Kokubo, Hirokazu Furuya
  • Patent number: 5978345
    Abstract: According to an astigmatic difference correcting method for an optical head, a rotational optical member which is arranged between a first laser beam source having an astigmatic difference and a collimator lens to be rotatable around an optical path of a laser beam of a first wavelength emitted from the first laser beam source is rotated and adjusted. Rotation and adjustment of the rotational optical member is caused to set a minimum difference between focal positions in an X-axis direction and in a Y-axis direction which are perpendicular to the optical path of the laser beam. The laser beam in which the difference between the focusing offset positions is minimum is irradiated on an optical disk having a recording density having a bit length not more than half a laser wavelength.
    Type: Grant
    Filed: November 12, 1997
    Date of Patent: November 2, 1999
    Assignee: NEC Corporation
    Inventor: Tsutomu Matsui
  • Patent number: 5976946
    Abstract: A thin film formation method includes the deposition step of forming a dielectric thin film consisting of many elements. In the deposition step, first- and second-layer thin films are deposited as lower and upper layers on an underlayer, and at least one of the thin films is crystallized to form the dielectric thin film. The first-layer thin film closer to the underlayer is deposited with a larger composition of at least one kind of constituent element of the thin film than stoichiometric composition to allow for diffusion outside the film.
    Type: Grant
    Filed: June 5, 1997
    Date of Patent: November 2, 1999
    Assignee: NEC Corporation
    Inventors: Takeo Matsuki, Yoshihiro Hayashi
  • Patent number: 5978930
    Abstract: A clock signal control system of the present invention includes a simple circuit for generating a clock stop signal. With this circuit, the system is small size and easy to design and consumes a minimum of power.
    Type: Grant
    Filed: October 7, 1997
    Date of Patent: November 2, 1999
    Assignee: NEC Corporation
    Inventors: Koichiro Furuta, Masayuki Mizuno, Junichi Goto
  • Patent number: 5975780
    Abstract: A keyboard cover of the present invention includes a cover holder removably mounted to one side of a keyboard. A flat plate is mounted on the cover holder and selectively rotatable toward the top of the keyboard for covering it or toward the bottom of the keyboard for covering it. A connecting device is rotatably connected to the cover holder at one end and rotatably connected to the plate at the other end for connecting the cover holder and plate. With this configuration, the keyboard cover is capable of selectively playing the role of a cover, a keyboard angle adjusting device or, when the keyboard is not used, a bookrest or a mouse table, as desired.
    Type: Grant
    Filed: October 20, 1998
    Date of Patent: November 2, 1999
    Assignee: NEC Corporation
    Inventor: Hideo Fukami