Abstract: An I/O-request processing system which is capable of reducing the maximum value of the time required until the I/O request of each external device is registered. An I/O-request receiving section (501) receives an I/O request issued from an external device (600). A process-information storage section (510) stores an I/O-request delay time (512) for each external device (600). A priority-process judgment section (520) registers the I/O request having a maximum 1o I/O-request delay time (512) among the I/O requests which have been registered into an I/O-request cue (540).

Abstract: A corrected channel estimating apparatus is disclosed, which is capable of removing side-lobe components mutually leaking into transmission paths from channel estimates to increase the accuracy. A channel estimation unit calculates channel estimates for a plurality of transmission paths due to a signal that arrives through multipath. A channel estimate correction unit removes side-lobe components mutually leaking into the transmission paths from the channel estimates calculated by the channel estimation unit to correct the channel estimates. In this way, the corrected channel estimating apparatus estimates transmission paths of a multipath.

Abstract: A sample which contains protein is stably maintained in a liquid state during electrophoresis. Electrophoresis chip 1 includes substrate 2, channels 5a to 5d which is provided on surface 3 of substrate 2 and which has openings 4a to 4d at the top thereof, wherein a sample solvent is adapted to be supplied to the channel, and evaporation inhibitor reservoirs 8a, 8b for storing an evaporation inhibitor for the sample solvent, the reservoir being provided independently of channel 5a to 5d and being spatially connected to opening 4a to 4d of channel 5a to 5d.

Abstract: There are accomplished nMOSFET and pMOSFET both having high mobility, by optimizing stress and location of a film existing around a gate electrode such that high stress acts on a channel. In nMOSFET, a first film having compressive stress is formed on a gate electrode, and a second film having tensile stress is formed covering a gate electrode, a sidewall spacer of a gate electrode, and source/drain regions therewith. In pMOSFET, a film having tensile stress is formed on the gate electrode in place of the first film, and a film having compressive stress is formed in place of the second film.

Abstract: A semiconductor device includes a silicon substrate, a strain-inducing layer, a silicon layer, a FET, and an isolation region. On the silicon substrate, the strain-inducing layer is provided. On the strain-inducing layer, the silicon layer is provided. The strain-inducing layer induces lattice strain in a channel region of the FET in the silicon layer. The silicon layer includes the FET. The FET includes a source/drain region, an SD extension region, a gate electrode and a sidewall. The source/drain region and the strain-inducing layer are spaced from each other. Around the FET, the isolation region is provided. The isolation region penetrates the silicon layer so as to reach the strain-inducing layer.

Abstract: With the object of realizing a microchip that allows drying and fixing of a substance that is the object of analysis in a shorter time while maintaining the separation capabilities of a separation operation, a microchip used to implement a separation operation of an analysis sample without contamination or spillage is composed of a substrate and a cover, the substrate being provided with a trench-shaped channel in its upper surface and substrate reservoirs that are linked with this channel, and the cover hermetically sealing the upper surface of the channel, attachable to or detachable from the substrate, and provided with through-holes formed at positions corresponding to the substrate reservoirs, cover reservoirs that are formed on the inner sides of the through-holes for holding liquid that is introduced when the cover is in the state of hermetically sealing the upper surface of the channel, and partitions that are formed on the bottom surfaces of the cover reservoirs.

Abstract: [Problems] To provide an optical head device capable of obtaining a desirable track error signal and a lens position signal for both two types of optical media having different groove pitches. [Means for Solving the Problems] Light emitted from a light source is divided by a diffraction optical element (3a) into a main beam that is transmitted light, first sub beams that are positive and negative first order diffracted light beams, and second sub beams that are positive and negative second order diffracted light beams. The phase of the positive and negative first order diffracted light beams from regions (13a, 13c) and that of the positive and negative first order diffracted light beams from regions (13b, 13d) are shifted from each other by 180 degrees, and the phase of positive and negative second order diffracted light beams from regions (13a, 13d) and that of the positive and negative second order diffracted light beams from regions (13b, 13c) are shifted from each other by 180 degrees.

Abstract: [Problems] Multilayered optical information recording media involve a problem that a BCA is erroneously formed in a different information recording layer even if the BCA is intended to be formed in a specific information recording layer. [Means for Solving the Problems] An optical information medium (1) for recording/reproducing information by applying a laser beam includes two or more recording layers (11, 12) for recording/reproducing information by receiving a laser beam at the same laser beam incident surface (1a). A geometrical irregularity (K) is formed in an area (inner peripheral side) (21) for a BCA on one recording layer (12), and a mirror surface is formed in the area of the other information recording layer (11) corresponding to the BCA area (21). The geometrical irregularity (K) is detected when focus servo is actuated so as to detect the desired information recording layer. Thus, a BCA is prevented from being erroneously formed in another information recording layer.

Abstract: A vacuum processor includes: a chamber; a pump which keeps the inside of the chamber in a vacuum state by; a connection part which connects the chamber with the pump and is formed with a gas passage therein. An inner wall of the connection part is provided with a capturing part capturing particles in the passage. The capturing part has a fibrous substance facing the passage and disposed along the passage. The fibrous substance is provided to capture particles. A peripheral part of the woven cloth of the fibrous substance is folded to a back side of the unwoven cloth and the front end of the peripheral part of the woven cloth is interfolded to the back side of the unwoven cloth.

Abstract: Disclosed is a mixed mode parallel processor system in which N number of processing elements PEs, capable of performing SIMD operation, are grouped into M (=N÷S) processing units PUs performing MIMD operation. In MIMD operation, P out of S memories in each PU, which S memories inherently belong to the PEs, where P<S, operate as an instruction cache. The remaining memories operate as data memories or as data cache memories. One out of S sets of general-purpose registers, inherently belonging to the PEs, directly operates as a general register group for the PU. Out of the remaining S?1 sets, T set or a required number of sets, where T<S?1, are used as storage registers that store tags of the instruction cache.

Abstract: A regenerating apparatus includes an identification circuit, an error correcting circuit, an abnormality detecting circuit which generates an alarm when a predetermined abnormal operation is detected, a threshold value adjusting circuit which adjusts the threshold value to make a first error correction number equal to a second error correction number when the alarm is not generated, and a threshold value initializing circuit which sets the threshold value to an initial threshold value when the alarm is generated.

Abstract: A semiconductor memory device is provided with a memory array including memory cells arranged in rows and columns; and a sense amplifier circuit. Each of the memory cells includes at least one magnetoresistive element storing data, and an amplifying member used to amplify a signal generated by a current through the at least one magnetoresistive element. The sense amplifier circuit identifies data stored in the at least one magnetoresistive element in response to an output signal of the amplifying member.

Abstract: A driver circuit that prevents amplitude reduction at a high temperature comprises a differential pre-buffer circuit 22 for performing signal clamping by diodes 16 and 17 each having a nonlinear voltage-current characteristic with respect to an input signal and a differential output circuit 23 for amplifying output signals of the differential pre-buffer circuit 22, for output. The driver circuit further includes a temperature characteristic compensation circuit 44 for controlling direct currents to be passed through the diodes 16 and 17 based on a current to be passed through a diode 43 having a voltage-current characteristic with the same temperature coefficient as those of the diodes 16 and 17. A current related to constant currents I1 and I2 is supplied from the temperature characteristic compensation circuit 44 as a current that cancels the temperature characteristic of a fall in forward voltages of the diodes 16 and 17.

Abstract: A semiconductor device capable of making an effective use of a support substrate as interconnect is proposed. The semiconductor device (chip 4) of the present invention has a first Si substrate 1 as a support substrate and a second Si substrate 3 which is layered on a first insulating film layered on one main surface of the first Si substrate 1. A diffusion layer 2 used as a support substrate interconnect is formed at least in a part of the surficial portion of the first Si substrate 1 on the side thereof in contact with the first SiO2 film 9.

Abstract: A data stream generating apparatus for a recording/replaying apparatus includes a storage unit and a control module. The control module generates a video elementary stream and an audio elementary stream from inputted video data and audio data to store in the storage unit, and generates and stores a navigation pack in the storage unit. The control module determines an output order of the navigation pack, a plurality of video packs generated from the video elementary stream and a plurality of audio packs generated from the audio elementary stream based on a unit size of an output data stream, a data quantity of the video elementary stream and a data quantity of the audio elementary stream, while updating the navigation pack. Then, the control module outputs the navigation pack, the plurality of video packs, and the plurality of audio packs as an output data stream based on the output order.

Abstract: A semiconductor chip includes a plurality of pads; input/output circuits connected with the plurality of pads, respectively; a product data storage section configured to store a product data; and a setting section configured to set to an active state, each of the input circuits which is connected to one of the plurality of pads used for input to an internal circuit, and each of the output circuits which is connected to one of the plurality of pads used for output from the internal circuit, and set remaining input/output circuits to an inactive state, based on the product data.

Abstract: A packet scheduling apparatus corrects an overhead amount between a DSL rate and a packet rate, converts DSL rate information to the packet rate, and shapes the IP packets from the Internet such that the IP packets are delivered at a transmission rate equal to or lower than the packet rate. An IP/ATM converter converts the IP packets from the packet scheduling apparatus to ATM cells. A DSL multiplexer has a DSL current rate detector for supplying DSL rate information indicative of a currently set DSL rate, and transmits the ATM cells from the IP/ATM converter or the IP packets from the packet scheduling apparatus to user terminals through DSL processing using telephone lines.

Abstract: In an active matrix liquid crystal display device, a drain and source of a TFT element for controlling power supply to a pixel electrode, are arranged so that an alignment direction of liquid crystal molecules over the source and drain does not change, thereby preventing formation of ghost images in the display. In one embodiment, an electric field generated between the source and drain is parallel to an initial non-zero alignment angle of the molecules.

Abstract: A location system comprises a communication terminal for transmitting a location request specifying a target mobile terminal and a type of location information, and a location network. In response to the location request, the location network produces current location information of the target mobile terminal if the type of location information of the received request specifies current location information and transmits the current location information to the communication terminal and stores the last known location information in a memory as last known location information of the target mobile terminal. If the type of location information specifies last known location information, stored last known location information of the target mobile terminal is copied from the memory and transmitted to the communication terminal if the location request is verified by a privacy check and if the stored information is reusable.

Abstract: A multiprocessor system includes a plurality of processors that share a multiple-way set-associative cache memory that includes a directory and a data array, the multiprocessor system being partitioned such that the plurality of processor operate as independent systems. The multiprocessor system also includes a hit judgement circuit that determines hits of, of the ways in the sets that are designated at the time a processor of a particular partition accesses the shared cache memory, only those ways that have been allocated in advance in accordance with active signals that are supplied as output at the time of the access.