Abstract: A synthesizer that has a phase detector 8 and a charge pump circuit 9 for injecting an electric charge, or pulling it out that corresponded to a frequency difference of an input, a low-pass filter 11 for converting this electric charge into a voltage, a voltage control oscillator (VCO) 13 for changing an output frequency for this input voltage, a divider 14 for dividing the frequency of the input, and a voltage holding circuit 10 for holding the input voltage for a plurality of output frequencies of the VCO. A holding voltage of the voltage holding circuit 10 is switched with a switch 12, and the frequency of an output clock signal 3 is switched.
Abstract: A nonvolatile semiconductor memory device includes a plurality of nonvolatile memory cells for a user area and a trimming data storage area; and a plurality of word lines. A first trimming data is stored in the trimming data storage area, and is for adjusting a read voltage to be applied to a selected word line as one of the plurality of word lines in a read operation. The read voltage is set to a voltage which exceeds a maximum voltage in an adjustable voltage range based on the first trimming data when the read operation is carried out to the trimming data storage area.
Abstract: A semiconductor device contains a semiconductor chip, and includes first and second circuits, a control signal line and a terminal. The first circuit is arranged in a center of the semiconductor chip and is configured to operate at a first voltage. The second circuit is arranged in an input/output circuit area around the first circuit on the semiconductor chip, and is configured to operate at the first voltage and a second voltage and to transfer a signal between an external unit outside the semiconductor chip and the first circuit. The control signal line is provided for the input/output circuit area on the semiconductor chip. The terminal is connected with the control signal line and supplied with a control signal. The second circuit stops a transfer of the signal between the external unit and the first circuit in response to the control signal which is transferred on the control signal line.
Abstract: In a slot format of a received signal, AGC gain update timings (t1 to t4) are shifted every time to disperse and reduce an influence of a noise attributable to a direct current component specific to direct conversion which is accompanied by AGC gain update. In particular, in the case where each of slots in the received signal includes an information portion (data) having a larger code correcting capability and an information portion having a smaller code correcting capability (TPC (transmission power control), TFCI (transport format combination indicator), PILOT), the AGC gain update timing is generated while being shifted in the former information portion, thereby reduce the influence of the noise. When the amount of shift of the AGC gain update timing is set to be larger than that of one symbol of the received signal, the influence of the noise accompanied by the AGC gain update is further reduced.
Abstract: To improve the ESD protection of a circuit receiving a signal. An inverter circuit INV1 is connected to ground wiring GND1 for supplying power, and is connected to power supply wiring VDD1 via a PMOS transistor MP5. An inverter circuit INV2 is connected to ground wiring GND2 and power supply wiring VDD2 for supplying power, and its input node is connected to an output node of the inverter circuit INV1. Further, the ground wiring GND1 and the ground wiring GND2 are connected via a protection element PE0. During normal operation, the output of an inverter circuit INV3 goes to an H level, the output of an inverter circuit INV4 goes to an L level, and the PMOS transistor MP5 is turned on. When ESD is applied, the power supply wiring VDD2 is place in a floating state, the output of the inverter circuit INV4 goes to an H level, the PMOS transistor MP5 is turned off, and a current that occurs when EDS is applied does not flow into the inverter circuit INV2.
Abstract: A system-in-package type semiconductor device includes a logic chip; and a memory chip connected with external terminal through the logic chip. The logic chip includes a data holding circuit configured to hold a test data in a test mode, and store the test data supplied through the data input/output terminal in the data holding circuit in response to a test data set command, and writes the test data which has been stored in the data holding circuit in the memory chip in response to the test data write command.
Abstract: A liquid crystal display panel for displaying an image by controlling an orientation direction of a liquid crystal mixture with respect to each pixel, includes a first common electrode which is formed on a first substrate; a second common electrode which is formed on a second substrate and includes a predetermined opening; and a pixel electrode which is formed on the second substrate, wherein the first substrate faces the second substrate so that the liquid crystal mixture with positive dielectric anisotropy is sandwiched between the first common electrode and the second common electrode, and wherein the orientation direction of the liquid crystal mixture changes mainly in a face parallel to the substrate according to an electric field generated from electric potential of the first common electrode, the second common electrode, and the pixel electrode.
Abstract: [Problems] To provide a speech-to-text system and the like capable of matching edit result text acquired by editing recognition result text or edit result text which is newly-written text information with speech data. [Means for Solving Problems] A speech-to-text system (1) includes a matching unit (27) which collates edit result text acquired by a text editor unit (22) with speech recognition result information having time information created by a speech recognition unit (11) to thereby match the edit result text and speech data.
Abstract: An amplifier includes a carrier amplifier which performs signal amplification at all times, a peak amplifier which operates only at a time when the high electric power is outputted, a combiner which combines the output from the carrier amplifier and the peak amplifier, and a distributor which distributes an input signal to the carrier amplifier and the peak amplifier. The carrier amplifier and the peak amplifier are included in a single package transistor.
Abstract: The load of OPC processing (especially, the load of bias processing) has been increasing due to optical effects involved in the placement of a dummy pattern. A pattern placement apparatus places dummy patterns in a layout region where a plurality of wiring patterns is placed. The pattern placement apparatus comprises: a placement region setting section that sets a placement region, where each of the dummy patterns should be placed, in an intermediate region between the adjacent wiring patterns at substantially constant intervals to the adjacent writing patterns; and a pattern placement section that places the dummy pattern in the placement region.
Abstract: A method includes inserting a virtual circuit connectivity verification packet into aggregated traffic of m packets transmitted over multiple pseudowires in a network path, replying to the transmitted m packets with a virtual circuit connectivity verification packet with a packet loss indication when at least one packet loss is detected in an m packet group, and adjusting a rate of transmitting the aggregated m packets responsive to the packet loss indication. In the preferred embodiment the multiple pseudowires are one of constant bit rate and variable bit rate and the adjusting of the rate includes rate adjustment of variable bit rate pseudowires.
Abstract: A wiring board for mounting semiconductor device, includes at least a dielectric film 1; wirings formed in the dielectric film 1; a plurality of electrode pads provided at front and back surfaces of the dielectric film with their surfaces exposed and at least portions of lateral sides of them buried into the dielectric film; vias connecting the wirings and the electrode pads. At least one via connecting each other the wirings formed in the dielectric film includes second material different from first material forming the vias connecting the wirings and the electrode pads. The wiring board for mounting semiconductor device, is effective for an increase in terminals and finer pitch of terminal intervals due to an improvement in integration, performance or multi-function of semiconductor devices, can mount semiconductor devices especially on both sides of the board at a high density and high accuracy, and furthermore, is excellent in reliability as well.
Type:
Application
Filed:
December 20, 2006
Publication date:
February 19, 2009
Applicants:
Nec Corporation, Nec Electronics Corporation
Abstract: There is provided a piezoelectric actuator and the like capable of efficiently transmitting vibration between an object (e.g., a housing of an electronic device) and a piezoelectric ceramic vibrator. The piezoelectric actuator 50A includes a piezoelectric ceramic vibrator 15 and a holder 12 to hold an edge section thereof and functions as, for example, a vibrator by propagating deflective vibration of the vibrator 15 via the holder 12 to an elastic body 14 as the object. A subsidiary holder 13 is disposed between the vibrator 15 and the elastic body 14, and part of the deflective vibration of the vibrator 15 is propagated via the elastic body 14.
Type:
Application
Filed:
February 20, 2007
Publication date:
February 19, 2009
Applicant:
NEC CORPORATION
Inventors:
Yasuhiro Sasaki, Yasuharu Oonishi, Jun Kuroda, Yukio Murata, Ukyou Mori
Abstract: An optical head apparatus of an optical information recording/reproducing apparatus is provided with a light source. An objective lens focuses an output light emitted by said light source on a disc optical recording medium for which a groove or a pit for tracking is provided. T photo-detector receives a reflected light reflected by said optical recording medium. A polarizing splitter unit splits said output light and said reflected light. A quarter-wave plate disposed between said polarizing splitter section and said objective lens. A birefringence compensating unit reduces a change in an amplitude of a track error signal caused by birefringence in a protective layer of said optical recording medium.
Abstract: The present invention has an object to provide a photosensitive resin composition for optical waveguide formation, which has low transmission loss and can form a waveguide pattern with high shape accuracy at low cost; an optical waveguide; and a method for producing an optical waveguide. The present invention provides a photosensitive resin composition for optical waveguide formation comprising at least: a polymer containing at least a (meth)acrylate structure unit having an epoxy structure, and a (meth)acrylate structure unit having a lactone structure and/or a vinyl monomer structure unit having an aromatic structure; and a photoacid generator, of which one or both of a core layer and a cladding layer are formed of a cured product.
Abstract: A multilayer printed circuit board includes an inner magnetic layer essentially consisting of magnetic material. The inner magnetic layer may be formed by an action of chemical bond or van der Waals force. The inner magnetic layer may comprise a plurality of magnetic units, each of which provides magnetism, and may be formed by magnetically coupling the magnetic units with each other by using a strong interaction. The inner magnetic layer may essentially consist of a ferrite film. The ferrite film may be formed directly on the inner conductive layer by means of an electroless plating method. The ferrite film may essentially consist of an oxide metal composition, the metal composition being represented by the formula of FeaNibZncCod, where: a+b+c+d=3.0; 2.1?a?2.7; 0.1?b?0.3; 0.1?c?0.7; and 0?d?0.15.
Abstract: A molecular structure prediction method for predicting the most stable molecular structure of a molecule based on results obtained by a plurality of appraisal systems includes steps of: generating a plurality of data sets by re-sampling from a training data set, determining a parameter set for each data set that has been generated to obtain a plurality of parameter sets, using the plurality of parameter sets to calculate energy of a molecule for molecular data for prediction, taking a consensus based on the results of a plurality of energies or three-dimensional structures, and predicting the most stable molecular structure based on the results of consensus.