Abstract: In order to achieve an aspect of the present invention, an electronic mail server includes a mail box, and an interface unit for receiving an electronic mail. A mail processing section analyzes the received electronic mail and applies to the received electronic mail a processing, which is determined based on the analyzing result and an instruction corresponding to the received electronic mail, to store the processed electronic mail in the mail box.

Abstract: A sound effects affixing device which enables sound effects and background music to be affixed in relation to inputted sentences automatically. A keyword extraction device is provided with a onomatopoeias extraction measure, a sound source extraction measure, and a subjective words extraction measure, which measures extract keyword of the onomatopoeias, the sound source names, or the subjective words within inputted sentences. A sound retrieval device selects sound effects and music by these keywords, thus selected sound effects and music are outputted by an output sound control device synchronized with synthesized speech.

Abstract: This invention relates to a manufacturing process for a semiconductor device, comprising injecting a silane compound and a dopant into a low-pressure chemical vapor deposition reactor to deposit a doped silicon film on a wafer; and at the end of the deposition, injecting an oxidizing gas to form an oxide film over the silicon film deposited in the reactor. According to this invention, anomalous growth or generation of foreign matters such as particles during a deposition step can be effectively minimized to improve a production yield and provide a high-quality and highly reliable semiconductor device.

Abstract: This invention provides a manufacturing process for a charge transfer device comprising an N-type well formed in a P-type well on a semiconductor substrate for transferring a signal charge, an N+region formed on both sides along the charge transfer direction of the N-type well and containing a dopant in a higher concentration than that in the N-type well, a P-type region formed around the N+ region, and a gate electrode covering the N+ region and the N-type well and formed via a gate insulator, comprising ion-implanting an N-type dopant into the region to be the N-type well and the N+ region using the first mask and ion-implanting a P-type dopant into the region to be the N-type well using the second mask. Thus, there can be provided a charge transfer device which has a structure where there is an N+ region on both sides of the N-type well, a large maximum transferable charge and a compact CCD with a width up to 3 times the minimum design dimension.

Abstract: The present invention provides a magneto-resistance effect (hereinafter, referred to as MR) type composite head.

Abstract: A clock control circuit for reducing jitter has at least one averaging circuit for generating, and outputting from an output terminal, a signal having a time difference obtained by internally dividing a time difference between first and second signals input respectively from first and second input terminals. First and second clock signals are supplied respectively to the first and second input terminals of the timing averaging circuit, and a clock in which a time difference between pulses of the first and second clock signals is averaged is generated.

Abstract: An optical wavelength selector is provided that selects WDM channels from WDM optical signal and outputs each WDM channels from a plurality of ports. WDM optical signal in which m×n WDM channels are multiplexed is divided into n WDM channel groups and outputted by means of one wavelength-division demultiplexer. One WDM channel group is selected from the n WDM channel groups by means of n optical gate switches. The selected WDM optical signal is then separated into m WDM channels by wavelength and outputted by means of an optical wavelength router. As a result, m WDM channels of a specific WDM channel group can be received by m optical receivers.

Abstract: In an error detecting method and device for calculating a phase error in a PSK modulated signal having a predetermined modulation phase number, and so configured that a received phase of the modulated signal is mapped on a complex plane by allocating an inphase signal and a quadrature signal generated from the modulated signal as values of the axis of abscissas and the axis of ordinates, and a phase error between the received phase of the modulated signal thus mapped and a reference phase in each of a plurality of signal areas. The phase error between the received phase of the modulated signal mapped on the complex plane and a reference phase in each of the plurality of signal areas, is calculated as a distance between the mapped position of the modulated signal and a reference straight line, from at least one of the inphase signal and the quadrature signal, so as to obtain a plurality of phase errors.

Abstract: In a method of test pattern generation for logic circuits, a whole circuit is divided into a plurality of partial circuits for test pattern generation by distributed-processing. ATG (Algorithmic Test Generation) process is performed per each of the partial circuits based on the result of RTG (Random Test Generation) process. Also disclosed are a test pattern generation system performing the method, and computer readable media having program for the test pattern generation system to perform the method.

Abstract: A semiconductor device according to the present invention includes insulating branches which are formed as an interlayer insulating film on a semiconductor substrate. The interlayer insulating film has holes (voids) between the branches to thereby reduce electrostatic capacitance between stacked layers within a semiconductor device.

Abstract: An electronic device includes a thermally isolated element formed above a substrate such that the thermally isolated element is isolated from the substrate by a cavity, a thermal-to-electrical transducer for converting heat to an electrical signal, an electrical-to-thermal transducer for converting an electrical signal to heat, a functional material whose physical property changes at a particular temperature, and a circuit, formed on the substrate, for controlling the electrical-to-thermal transducer in accordance with a signal received from the thermal-to-electrical transducer. The thermal-to-electrical transducer, the electrical-to-thermal transducer, and the functional material are formed in the thermally isolated element.

Abstract: A system is for sorting an article on shipping the article. The article has a tag label in which a symbol is written. The article has an ID tag in which tag information is written. The article is conveyed on a conveyer. A first detector detects the article conveyed on the conveyer to produce a first detection signal. A second detector is located downstream of the first detector and detects the article conveyed on the conveyer to produce a second detection signal. A control device controls a symbol reading device in response to the first detection signal to make the symbol reading device read the symbol as read-out symbol information out of the tag label. The control device controls an ID tag writing device in response to the second detection signal to make the ID tag writing device write the tag information in the ID tag in accordance with the read-out symbol information. The article is sorted on the basis of the tag information written in the ID tag.

Abstract: A fault tolerant computer comprising plural operation controllers is provided, which can judge and separate a damaged element by using a double-redundant structure without using a triple or greater-redundant structure. The computer comprises two judgment sections corresponding to each operation controller in the double-redundant structure, and each judgment section compares an output from the operation controller connected to the present judgment section with an output from the operation controller connected to the other judgment section, wherein one judgment section receives a signal indicating a comparison result from the other judgment section, and collates this signal and a comparison result obtained in the present judgment section with reference to additional diagnosis information so as to judge whether the output from the operation controller connected to the present judgment section is correct.

Abstract: An on-line line monitor system is provided for fault diagnosis of signal processing blocks, which perform cross-connecting of ATM cells by using at least reception-side memory blocks, a SRAM block and transmission-side memory blocks under control of a CPU block with respect to an operating line system, which is presently placed in an on-line state to be in communication service, and a spare line system which is placed in a standby state to be out of the communication service. Test ATM cells are sequentially input to the signal processing blocks, in which they are processed and are then output together with normal ATM cells. By comparing the processed test ATM cell with the original test ATM cell, it is possible to determine occurrence of fault in the signal processing blocks. When the fault is detected with respect to the operating line system, line control is switched over to the spare line system. In addition, the on-line line monitor system monitors a pileup state of the normal ATM cells in the SRAM block.

Abstract: A helical antenna permitting a diminution in dielectric loss includes an antenna section divided into short insulator units with a molded body over which antenna elements are helically would, and the insulator units are connected in tandem. The relationship among the insulator units is so configured that, when they are fitted into one another for connection, the end faces of element units constituting the antenna elements are brought into electric face contact with each other.

Abstract: An apparatus includes a rotation member having a pair of floats having different weights. The floats are fixed thereto at such positions that turning moment is produced due to one of a floating force and a sinking force for each of the floats. The apparatus further includes a rotation angle sensor for sensing a change in rotation angle of the rotation member as a change in concentration of the solute in the solution.

Abstract: An SRAM cell is arranged in a semiconductor device. A metal oxide semiconductor field effect transistor is arranged in the SRAM cell. An interlayer insulating film is formed on the metal oxide semiconductor field effect transistor. A load resistor conductive layer is formed on the interlayer insulating film. In addition, a wiring conductive layer which connects the gate electrode of the metal oxide semiconductor field effect transistor to the load resistor conductive layer is provided. The resistance of the wiring conductive layer is lower than the resistance of the load resistor conductive layer. A side wall is formed between the load resistor conductive layer and the wiring conductive layer.

Abstract: An optical output control circuit enables intensity of light signal to be kept constant, and enables various kind of additive function to be provided. A quantity of light detection circuit part includes a light-electricity conversion circuit, an A-D conversion circuit for digital converting level of analog voltage outputted from the light electricity conversion circuit. An attenuator control circuit gives attenuation quantity in accordance with value of digital control signal from CPU to an variable light attenuator. A correlation table sets relationship between digital value inputted from the quantity of light detection circuit part and an output light signal intensity (output level), and relationship between value of digital control signal and attenuation quantity of variable light attenuator beforehand.

Abstract: In an electrostatic protection circuit of the present invention, a trigger voltage for causing snapback operation in MOSFET is reduced and circuit elements with low breakdown voltages can be protected. A protection nMOSFET having a drain connected to an input/output terminal and a source and a substrate that are grounded is provided. A diode array, composed of at least one diode, is connected in series in a forward direction between the gate of the protection nMOSFET and the input/output terminal. Finally, a resistor is connected between the gate of the protection nMOSFET and ground.

Abstract: Disclosed is a FAX signal transmission system, in which the transmission side and the reception side are inter-coupled by a bearer. Each side is constituted by DCME comprising a transmission side, which includes a signal identification circuit 3, a FAX data allotment control circuit 4, a delay circuit 9, a FAX data demodulation circuit 11, a FAX data allotment signal generation circuit 13 and a multiplexing circuit 14, and a reception side, which includes a FAX data distribution control circuit, a FAX data transmission circuit and a FAX data remodulation circuit. The transmission side is provided with a control terminal for inputting signal identification data. The input signal identification content of the signal identification circuit 3 can be changed according to the signal identification data.