Abstract: A system and method of transmitting video in a time division multiplexing (TDM) system, wherein the method comprises identifying a video reference frame from a series of video frames; encoding a difference between the video reference frame and a video non-reference frame; placing the video reference frame at a beginning of a data burst; transmitting the series of video frames and the data burst from a transmitter to a mobile TV receiver; and the mobile TV receiver immediately locating the video reference frame upon receipt of the data burst. The method may further comprise the mobile TV receiver decoding the series of video frames. Additionally, the placing process results in a substantially non-existent channel switching delay in the mobile TV receiver. Moreover, the method may further comprise placing exactly one video reference frame at the beginning of the data burst. Preferably, the TDM system comprises a mobile TV system.

Abstract: A method and apparatus for de-interleaving interleaved data in a deinterleaver memory in an Orthogonal Frequency Division Multiplexing (OFDM) based Integrated Services Digital Broadcasting Terrestrial (ISDB-T) receiver. In different embodiments, the apparatus comprises of a OFDM symbol counter along with a divider or a buffer pointer RAM with circular pointer logic, a first lookup table to obtain delay buffer size and interleaving lengths for a given OFDM transmission layer, and a second lookup table to obtain buffer base address and interleaving lengths for a given OFDM transmission layer.

Abstract: An electrical circuit includes a first transistor having a first source, a first drain, and a first gate, whereby the first transistor receives an input voltage through the first gate. An output voltage terminal outputs voltage from the first transistor and is connected to the first drain. A second transistor includes a second source, a second drain, and a second gate, whereby the second transistor receives a bias voltage through the second gate, and wherein the first source is connected to the second drain. A first capacitor is connected to the first source, the second source, and the second drain. An inductor is connected to the first drain. A second capacitor is connected in parallel with the inductor and further connected to the first drain.

Abstract: Address generation for interleaving in a wireless communication system includes at least one input generation module to generate at least one input signal. A first address generator module and a second address generator module generate a first output address for interleaving and a second output address for interleaving. A selector module selects an address for interleaving from the first and the second output address based on predetermined criteria. At least one input translation module is receives an input signal and translate the received input signal to generate a nominal input signal based on a value of the received input signal. An address generation module generates an address for interleaving based on the nominal input signal.

Abstract: A method of filtering and a RF filtering circuit comprising a LO adapted to generate in-phase and quadrature LO signals; a quadrature passive mixer operatively connected to the LO; a filtering impedance operatively connected to the quadrature passive mixer, wherein the voltage at an input node of the quadrature passive mixer comprises the voltage across the filtering impedance up-converted to a frequency of a LO signal received by the quadrature passive mixer. Preferably, the voltage across the filtering impedance comprises a frequency of an input signal of the quadrature passive mixer down-converted by a frequency of the in-phase and quadrature LO signals and filtered by the filtering impedance.

Abstract: Data transfer in a communications network includes a first communication device including a transceiver; and an interface operatively connected to the first communication device, wherein the interface provides multiple operative connections for data transfer, wherein the multiple operative connections include a WLAN connection adapted for communication with an access point that generates data exchange signals; and a P2P connection adapted for communication with a second communication device, wherein the transceiver is shared between the multiple operative connections. The first and second communication devices may include a WiFi device. The first communication device may further include a pair of data registers and state machines; a MAC layer controller that receives input from the pair of data registers and state machines; and a PHY layer controller that receives input from the pair of data registers and state machines and the MAC layer controller, and sends instructions to the transceiver.

Abstract: One embodiment provides a method of providing low power operations in a switchable Digital Video Broadcasting—Handheld (DVB-H) receiver operable as a single receiver and as a diversity receiver includes operating the switchable DVB-H receiver in a single receiver mode in a first coverage region, the first coverage region corresponding to conditions in which both the single receiver as well as the diversity receiver satisfy a predetermined performance criteria, and switching the switchable DVB-H receiver to a diversity receiver mode in a second coverage region, the second coverage region corresponding to conditions in which the diversity receiver satisfies the predetermined performance criteria and the single receiver does not satisfy the predetermined performance criteria.

Abstract: A multi-chip antenna diversity architecture includes a first receiver chip including a first tuner, and a first demodulator directly connected to the tuner. The first demodulator demodulates the first input signal received from the first tuner. A first power sequencer that controls the first receiver chip, and a first chip ID including a voltage source VSS that indicates the first receiver chip as a slave chip. A second receiver chip includes a second tuner, and a second demodulator directly connected to the second tuner. The second demodulator demodulates the second input signal received from the second tuner. A second diversity combiner directly connected to the second demodulator. A second chip ID includes a voltage source VDD that indicates the second receiver chip as a master chip. A Diversity State Machine (DSM) controls an operating state of the first receiver chip and the second receiver chip that are structurally identical.

Abstract: An apparatus and a method for adaptive filtering includes an antenna that receives analog video broadcast signal data; an analog-to-digital converter coupled to the antenna and converting the received analog video broadcast signal data to digital video signal data; a frame buffer memory storing the digital video signal data; an instruction memory storing adaptive filtering instructions; and an adaptive filter coupled to the memory and the analog-to-digital converter, wherein the adaptive filter: reads the adaptive filter instructions from the memory; executes the adaptive filter instructions; averages an input pixel with a corresponding pixel stored in the frame buffer memory; calculates a forgetting factor for each pixel in the plurality of pixel values stored in the frame buffer memory; and filters noise from each pixel of the plurality of pixel values stored in the frame buffer memory based on the forgetting factor.

Abstract: An integrated circuit for digital controlling switching noise spurs in a receiver by shifting a switching frequency (fs) to a clock frequency (fs+?f) to move a Kth harmonic of the switching frequency (fs) is provided. The integrated circuit includes a spur controlled clock that operates the clock frequency (fs+?f), and a DC-DC converter circuitry that includes a first power switch, and a second power switch. The first power switch and the second power switch are driven by the clock frequency (fs+?f). ?f ranges from ( f RF - Kf s ) + BW K ? ? to ? ? ( f RF - ( K - 1 ) ? f s ) - BW K - 1 , and fRF is center frequency of a received channel. None of the harmonics of the clock frequency (fs+?f) is present in a channel of interest. The switching frequency is larger than the channel bandwidth 2BW.

Abstract: A multi-chip antenna diversity architecture and method includes a first receiver chip that receives a first input signal from a first antenna. The first receiver chip includes a first tuner that amplifies the first input signal, a crystal operatively connected to a first crystal oscillator circuit, and a first crystal oscillator clock buffer that receives a clock signal from the first crystal oscillator circuit. A first demodulator demodulates the input signal received from the first tuner. A second receiver chip receives a second input signal from a second antenna. The second receiver chip includes a second crystal oscillator circuit, a second crystal oscillator clock buffer, a second tuner, and a second demodulator that receives diversity data from the first demodulator. The first crystal oscillator clock buffer drives the clock signal to the second crystal oscillator clock buffer, the second tuner, and the second demodulator of the second receiver chip.

Abstract: A system, method, and service of managing data comprises establishing a computerized user profile guideline corresponding to selected television programming interests of a user; instructing a processor to manage data based on the computerized user profile guideline, wherein the data is received from a television programming broadcaster; and managing access to specified television programming when the computerized user profile guideline corresponding to the selected television programming interests of the user is satisfied. The process of managing access may comprise alerting the user with information pertaining to the specified television programming.

Abstract: An ESD circuit includes a plurality of MOS devices arranged in a stack, wherein each of the MOS devices comprises a source, a drain, and a gate; a voltage source inputting a supply voltage to the stack of MOS devices; a first plurality of resistors dividing the supply voltage to each source and each drain of the MOS devices in the stack; a second plurality of resistors biasing the supply voltage to each gate of the MOS devices in the stack; an inverter device operatively connected to the second plurality of resistors; a time lag circuit that turns the inverter device on and off; and a plurality of capacitors pulling the voltage to each gate of the MOS devices in the stack to the supply voltage upon the inverter device turning off.

Abstract: A system and method of permitting coexistence of WiFi and Bluetooth® data transfer on a single chip in UE including a transceiver includes using CTS data packets to protect Bluetooth® signals for SCO communication links; using only WiFi circuitry in the chip to determine when Bluetooth® data transfer is required by the UE; establishing a specified period of the Bluetooth® data transfer; and starting WiFi medium contention only upon an end of the specified period of the Bluetooth® data transfer on the single chip. The power save mode of the WiFi circuitry may be used with Bluetooth® ACL data packets in WiFi periodic data transfer gaps. The WiFi data transfer has no timing constraints, whereas the Bluetooth® data transfer has timing constraints and can only occur during the specified period. The WiFi data transfer does not occur when the Bluetooth® data transfer is occurring.

Abstract: A method of transceiving data includes providing a wireless transceiver chip that supports multiple wireless standards for transceiving data packets, wherein a first wireless standard comprises a first modulation and demodulation scheme, and wherein a second wireless standard comprises a second modulation and demodulation scheme, and wherein the first modulation and demodulation scheme is incompatible with the second modulation and demodulation scheme; activating only one PHY layer of the wireless transceiver chip during the transceiving of the data packets; using a MAC layer of the wireless transceiver chip to specify whether the first or second wireless standard is to be used for a given transceiving of the data packets; and the PHY layer receiving instructions from the MAC layer regarding which wireless standard is to be used for the transceiving of the data packets using hardware that is shared by the PHY layer corresponding to both wireless standards.

Abstract: Memory management for WiFi Media Access Control (MAC) frames includes dividing a memory into equally-sized smaller chunks; writing a MAC frame that is larger in size than one-chunk size into several chunks; appending special information to each chunk to specify whether the chunk is a starting chunk or an intermediate chunk of the MAC frame or whether the chuck is currently unoccupied at all; linking the chunks carrying the MAC frame; and specifying a task waiting to be performed for the MAC frame. The several chunks may be noncontiguous or contiguous. The memory management technique may further comprise searching the memory for chunks comprising frames waiting for a certain task. The memory management technique may further comprise marking the chunks as empty after the certain task is completed.

Abstract: Unbiased media contention in the presence of conflicting wireless operation of data transmission includes beginning media contention only during Bluetooth® operation; treating the Bluetooth® operation as a rejection of media transmission; holding a backoff timer associated with a backoff period steady for a specified duration; upon immediate completion of the Bluetooth® operation, WiFi contends with a small backoff value when media access is busy; using a small random number for the backoff period during a non-Bluetooth® data transfer period; and keeping an overall backoff timer unbiased for a duration of the data transmission. The specified duration may include an end of the Bluetooth® operation or a maximum backoff time that is reached. The random number for the backoff period includes uniform distribution in a contention window. A mean backoff timer value equals a uniform mean value minus a ratio of a Bluetooth® operation period to a total backoff period.

Abstract: A system and method includes a pair of voltage-controlled oscillators (VCOs) that include a first VCO generating a first signal associated with data transmission of a first type of wireless data signal; and a second VCO generating a second signal associated with data transmission of a second type of wireless data signal, wherein the first type of wireless data signal uses a different carrier frequency than the second type of wireless data signal. The system further includes a multiplexer operatively connected to the pair of VCOs that selectively outputs the first signal or the second signal to generate a selectively outputted signal; and a mixer operatively connected to the switch that combines the selectively outputted signal with at least one additional signal and outputs a composite signal. The first type of wireless data signal includes a WiFi signal. The second type of wireless data signal includes a Bluetooth® signal.

Abstract: Data transfer in a communications network includes a first communication device including a transceiver; and an interface operatively connected to the first communication device, wherein the interface provides multiple operative connections for data transfer, wherein the multiple operative connections include a WLAN connection adapted for communication with an access point that generates data exchange signals; and a P2P connection adapted for communication with a second communication device, wherein the transceiver is shared between the multiple operative connections. The first and second communication devices may include a WiFi device. The first communication device may further include a pair of data registers and state machines; a MAC layer controller that receives input from the pair of data registers and state machines; and a PHY layer controller that receives input from the pair of data registers and state machines and the MAC layer controller, and sends instructions to the transceiver.

Abstract: A technique for estimating a carrier frequency offset and a timing offset in a MediaFLO™ (Forward Link Only) communication system, wherein the method comprises includes receiving Orthogonal Frequency Division Multiplexing (OFDM) symbols; interpolating pilots on odd or even symbols of the received OFDM symbols; determining a phase difference between two successive symbols using the interpolated pilots; obtaining an estimate of the carrier frequency offset and the timing offset from the determined phase difference between two successive symbols; and correcting a sampling frequency in accordance with the estimated carrier frequency offset and timing offset.