Patents Assigned to Nippondenso Co., Ltd.
  • Patent number: 6650221
    Abstract: An ignition coil for an internal combustion engine is mainly made up of a transformer part and a control circuit part and a connecting part, and the transformer part is made up of a iron core which forms an open magnetic path, magnets, a secondary spool, a secondary coil, a primary spool and a primary coil. By respectively setting the cross-sectional area SC of the iron core between 39 to 54 mm2, the ratio of the cross-sectional area SM of the magnets with the cross-sectional area SC of the iron core in the 0.7 to 1.4 range, the ratio of the axial direction length LC of the iron core with the winding width L of the primary and secondary coils in the 0.9 to 1.2 range, and the winding width L in the 50 to 90 mm range, the primary energy produced in the primary coil can be increased without increasing the external diameter A of the case.
    Type: Grant
    Filed: November 30, 2001
    Date of Patent: November 18, 2003
    Assignee: Nippondenso Co., Ltd
    Inventors: Kazutoyo Oosuka, Masami Kojima, Keisuke Kawano
  • Publication number: 20020179959
    Abstract: A gate oxide film is formed on a surface of a semiconductor substrate. A tunnel insulating film having a thickness smaller than that of the gate insulating film is formed in a portion thereof corresponding to a tunnel region. A first silicon film having a low impurity concentration is formed on the gate insulating film. A second silicon film having an impurity concentration higher than that of the first silicon film is formed on the first silicon film so as to be connected thereto. A third silicon film is formed on the second silicon film through an insulating film. The second and third silicon films are formed into floating and control gates, respectively, thereby forming a semiconductor memory device.
    Type: Application
    Filed: February 21, 2002
    Publication date: December 5, 2002
    Applicant: NIPPONDENSO CO., LTD.
    Inventors: Tetsuo Fujii, Minekazu Sakai, Akira Kuroyanagi
  • Publication number: 20020135139
    Abstract: The invention relates to a heat resistant and oil resistant sealing member. The sealing member has a main body of acrylic rubber and a fixation-preventive layer made of silicone resin or rubber. The fixation-preventive layer prevents the main body from becoming affixed to an opposing member.
    Type: Application
    Filed: April 4, 2002
    Publication date: September 26, 2002
    Applicant: NIPPONDENSO CO., LTD.
    Inventors: Norio Tanaka, Masahiro Tomita, Shogo Oda
  • Patent number: 6390443
    Abstract: A metallic member including not more than 0.6% C, 12 to 19% Cr, 6 to 12% Ni, not more than 2% Mn, not more than 2% Mo, not more than 1% Nb and the balance being Fe and inevitable impurities, where Hirayama's equivalent H eq=[Ni %]+1.05 [Mn %]+0.65 [Cr %]+0.35 [Si %]+12.6 [C %] is 20 to 23%; Nickel equivalent Ni eq=[Ni %]+30 [C %]+0.5 [Mn %] is 9 to 12%, and Chromium equivalent Cr eq=[Cr %]+[Mo %]+1.5 [Si %]+0.5 [Nb %] is 16 to 19, wherein % is by weight, is made to have at least one ferromagnetized part having a magnetic flux density B4000 of not less than 0.3 T and at least one non-magnetized part having a relative magnetic permeability &mgr; of not more than 1.2 at a temperature of not less than −40° C., as continuously and integrally formed.
    Type: Grant
    Filed: May 24, 2000
    Date of Patent: May 21, 2002
    Assignees: Nippondenso Co. Ltd., Hitachi Metals, Ltd.
    Inventors: Yoshitada Katayama, Youzou Majima, Takayuki Shibata, Keizo Takeuchi, Toshiaki Terada, Shinya Sugiura, Hakaru Sasaki, Tsutomu Inui
  • Patent number: 6365458
    Abstract: A gate oxide film is formed on a surface of a semiconductor substrate. A tunnel insulating film having a thickness smaller than that of the gate insulating film is formed in a portion thereof corresponding to a tunnel region. A first silicon film having a low impurity concentration is formed on the gate insulating film. A second silicon film having an impurity concentration higher than that of the first silicon film is formed on the first silicon film so as to be connected thereto. A third silicon film is formed on the second silicon film through an insulating film. The second and third silicon films are formed into floating and control gates, respectively, thereby forming a semiconductor memory device.
    Type: Grant
    Filed: September 14, 2000
    Date of Patent: April 2, 2002
    Assignee: NipponDenso Co., Ltd.
    Inventors: Tetsuo Fujii, Minekazu Sakai, Akira Kuroyanagi
  • Publication number: 20020017732
    Abstract: An insert is held in a cavity within a die set by a movable hold member. Molten resin is injected into the cavity when the insert is held by the hold member. The hold member is separated from the insert at a given timing. A surface of the hold member is heated to a temperature higher than a temperature of an inner surface of the die set. The hold-member surface contacts the molten resin. The die-set inner surface is exposed in the cavity.
    Type: Application
    Filed: September 19, 2001
    Publication date: February 14, 2002
    Applicant: NIPPONDENSO CO., LTD.
    Inventors: Hiroshi Koyama, Tsutomu Onoue, Keigo Asano, Tadatsugu Nakamura, Izuru Shoji
  • Patent number: 6337249
    Abstract: A semiconductor device having an enhancement-type MOS structure which can prevent large leakage current is disclosed. A high-concentration region for threshold-value regulation use formed in a channel region below a gate electrode in an enhancement-type transistor is caused to be contiguous with a source region and not contiguous with a drain region. Herein, the distance between the high-concentration region and the drain region is set so as to preclude the depletion layer extending from the drain region side from reaching the high-concentration region. Therefore, the electrical field in the depletion layer does not become the critical field which causes avalanche or Zener breakdown, and so leakage current can be caused to be reduced.
    Type: Grant
    Filed: November 20, 2000
    Date of Patent: January 8, 2002
    Assignee: NipponDenso Co., Ltd.
    Inventors: Hiroyuki Yamane, Yasushi Higuchi, Mitsutaka Katada, Noriyuki Iwamori, Tsutomu Kawaguchi, Takeshi Kuzuhara
  • Patent number: 6314790
    Abstract: An oxygen concentration detecting apparatus precisely and easily performs diagnosis of a limit current type oxygen sensor. The limit current type oxygen sensor has an oxygen concentration detecting element for outputting limit current proportional to the oxygen concentration and a heater for heating the detecting element. A CPU of a microcomputer controls energization of the heater to activate the oxygen sensor. The CPU calculates element resistance based on the voltage applied to the oxygen sensor and the current detected in the sensor. In a sensor diagnosis routine, the CPU determines whether preconditions for the diagnosis have been met. If all the preconditions have been met, the CPU executes the diagnosis. That is, the CPU determines whether the element resistance is within a predetermined range. If it is below the range, the CPU determines that the sensor has high element temperature abnormality.
    Type: Grant
    Filed: October 12, 1999
    Date of Patent: November 13, 2001
    Assignee: Nippondenso Co., Ltd.
    Inventors: Yasuo Sagisaka, Yukihiro Yamashita
  • Patent number: 6309579
    Abstract: An insert is held in a cavity within a die set by a movable hold member. Molten resin is injected into the cavity when the insert is held by the hold member. The hold member is separated from the insert at a given timing. A surface of the hold member is heated to a temperature higher than a temperature of an inner surface of the die set. The hold-member surface contacts the molten resin. The die-set inner surface is exposed in the cavity.
    Type: Grant
    Filed: December 28, 1999
    Date of Patent: October 30, 2001
    Assignee: Nippondenso Co., Ltd.
    Inventors: Hiroshi Koyama, Tsutomu Onoue, Keigo Asano, Tadatsugu Nakamura, Izuru Shoji
  • Patent number: 6308263
    Abstract: A decoder decodes a branch instruction. An operating section executes logical, arithmetic, and shift operations. A register file store operation result of the operating section. A program counter counting the address of the present programs. A direct-setting bus is provided to allowing the decoder to directly set an immediate value to the program counter without passing through an output bus of the operating section. And, a switch selectively connects the direct-setting bus or the output bus to the program counter.
    Type: Grant
    Filed: October 29, 1999
    Date of Patent: October 23, 2001
    Assignee: Nippondenso Co., Ltd.
    Inventors: Hiroshi Hayakawa, Harutsugu Fukumoto, Hiroaki Tanaka
  • Patent number: 6304957
    Abstract: The microcomputer shall be offered which has realized more simplified peripheral circuits and more reduced price, besides being provided with the functions of timer, runaway monitor and backup logic. To that effect, the address register and the register are installed which have two areas each in correspondence with two tasks (CPU0 and CPU1) to perform a pipeline processing of the two tasks in parallel and in time division by changing over alternately the two areas of the address register and the register by means of task switching signal. Then, while composing one task (L-task) with a fix-looped program for which a branch instruction is prohibited, the L-task is embedded with a routine to execute a runaway monitor and a timer operation for the other task (A-task). Furthermore, in case where anything abnormal is detected by L-task about the processing of A-task and it is reset, the L-task will execute a backup sequence to obtain a failsafe of the system.
    Type: Grant
    Filed: February 25, 1994
    Date of Patent: October 16, 2001
    Assignee: Nippondenso Co., Ltd.
    Inventors: Hideaki Ishihara, Kouichi Maeda
  • Publication number: 20010023028
    Abstract: A soldering method, which secures reliable joints without using flux, is disclosed. Soldering is performed using an auxiliary connecting material capable of physically destroying and dispersing an oxide film, which is naturally grown on the surface of a main connecting material such as solder or brazing between two terminals, to realize a reliable solder wetting (a state of the main connecting material being fused and mixed). For an auxiliary connecting material, hydrocarbon such as n-tetradecane (C14H30), for example, can be used. N-tetradecane boils between connection surfaces and cubically expands; energy generated therefrom physically disperses the oxide film and causes a fresh surface to be exposed; solders on both terminals are mixed; and an electrical and mechanical joint is securely achieved. The residue of the auxiliary connecting material is an insulating material, and therefore does not need cleaning. An excellent electrical joint which is moisture-resistant as well as highly reliable is attained.
    Type: Application
    Filed: March 30, 2001
    Publication date: September 20, 2001
    Applicant: NIPPONDENSO CO., LTD.
    Inventors: Toshihiro Miyake, Koii Kondo, Takashi Kurahashi, Nozomu Okumura, Makoto Takagi
  • Patent number: 6291945
    Abstract: A lighting device for a discharge lamp includes a power supplying circuit for supplying electric power to the discharge lamp. A current sensing circuit is operative for sensing a lamp current which flows through the discharge lamp. A control circuit is operative for enabling the power supplying circuit to supply one of a direct-current electric power and a low-frequency electric power to the discharge lamp during a time interval in start of the discharge lamp. The control circuit is also operative for adjusting a duration time of supply of a one-polarity electric power to the discharge lamp in accordance with a magnitude of the lamp current sensed by the current sensing circuit. Further, the control circuit is operative for enabling the power supplying circuit to supply an alternating-current electric power to the discharge lamp after the time interval elapses.
    Type: Grant
    Filed: June 25, 1996
    Date of Patent: September 18, 2001
    Assignee: Nippondenso Co., Ltd.
    Inventors: Koichi Toyama, Koichi Kato, Kenji Aida
  • Patent number: 6286914
    Abstract: When it has been determined that a termination condition of brake TRC control has been fulfilled, SM valves 50FL and 50FR and a motor 80 are continuously placed in an ON state, and along with this, SR valves 70FL and 70FR are switched off, and furthermore holding valves 46FL and 46FR and pressure-reducing valves 48FL and 48FR of driving wheels are changed from an on-off switching state to an ON state, and termination control is initiated. Because of this, high-pressure brake fluid on the wheel-cylinder 2FL and 2FR side is expelled via the pressure-reducing valves 48FL and 48FR by drive of the motor 80. Consequently, high-pressure brake fluid can rapidly be expelled immediately after brake TRC control, and along with this, oil-shock noise can be alleviated.
    Type: Grant
    Filed: August 8, 1995
    Date of Patent: September 11, 2001
    Assignee: Nippondenso Co., Ltd.
    Inventors: Mamoru Sawada, Kouji Okazaki
  • Patent number: 6287933
    Abstract: A semiconductor device having a thin film resistor which comprises at least chromium, silicon and nitrogen, and formed on a substrate with having a special ratio of the chemical composition, the semiconductor device having a characteristic such that variations of the resistance value thereof due to temperature variations can be effectively suppressed.
    Type: Grant
    Filed: January 3, 1992
    Date of Patent: September 11, 2001
    Assignee: Nippondenso Co., Ltd.
    Inventors: Makio Iida, Shoji Miura, Kanemitsu Terada, Hiroyuki Ban, Kiyoshi Yamamoto, Katsuyoshi Oda, Yoshihiko Isobe
  • Patent number: 6267072
    Abstract: An indicating instrument includes a generally straight illumination lamp or cold cathode fluorescent lamp and a light conducting plate which are disposed on the back of a dial plate. The dial plate has plurality of trans-illuminous gauge or meter patterns. The cold cathode fluorescent lamp is disposed longitudinally at an upper side of the light conducting plate to guide the light of the lamp to the trans-illuminous gauge or meter patterns.
    Type: Grant
    Filed: November 3, 1995
    Date of Patent: July 31, 2001
    Assignee: Nippondenso Co., Ltd.
    Inventors: Tatsuya Seto, Hirofumi Ikeuchi, Ryouichi Nishikawa, Masaaki Muraki, Hiroshi Niimi, Naoyuki Aoki, Kozo Ono
  • Publication number: 20010009775
    Abstract: A gate oxide film is formed on a surface of a semiconductor substrate. A tunnel insulating film having a thickness smaller than that of the gate insulating film is formed in a portion thereof corresponding to a tunnel region. A first silicon film having a low impurity concentration is formed on the gate insulating film. A second silicon film having an impurity concentration higher than that of the first silicon film is formed on the first silicon film so as to be connected thereto. A third silicon film is formed on the second silicon film through an insulating film. The second and third silicon films are formed into floating and control gates, respectively, thereby forming a semiconductor memory device.
    Type: Application
    Filed: February 6, 2001
    Publication date: July 26, 2001
    Applicant: NIPPONDENSO CO., LTD.
    Inventors: Tetsuo Fujii, Minekazu Sakai, Akira Kuroyanagi
  • Patent number: 6266115
    Abstract: A liquid crystal cell and liquid crystal display device include: two electrode substrates facing each other through a plurality of spacers; each electrode substrate being formed by superimposing a glass substrate, a transparent electrode and an alignment film; and an antiferroelectric liquid crystal being injected between alignment films; wherein, an alignment treatment is performed to each alignment film so that an angle of layer rotation of the antiferroelectric liquid crystal is defined within a predetermined allowable range.
    Type: Grant
    Filed: September 9, 1996
    Date of Patent: July 24, 2001
    Assignees: Nippondenso Co., Ltd., Nippon Soken, Inc.
    Inventors: Takayuki Fujikawa, Akira Takeuchi, Norio Yamamoto, Yuichiro Yamada, Masaaki Ozaki
  • Patent number: 6262531
    Abstract: A thin-film EL display panel which has excellent packageability, high reliability and stable performance characteristics, and which can prevent nonuniformity of brightness and color from occurring and a fabrication method thereof are provided. In the above thin-film EL display panel, two thin-film EL elements 1 and 2 formed by sequentially laminating first electrodes 12 and 22, first insulating layers, luminescent layers, second insulating layers and second electrodes 16 and 26 respectively on glass substrates 11 and 21 are laminated into position and connecting terminal portions 12a, 22a, 16a and 26a for connecting the first electrodes 12 and 22 and second electrodes 16 and 26 are formed on the edge portions of the substrates 11 and 21 of the thin-film EL elements 1 and 2.
    Type: Grant
    Filed: November 5, 1998
    Date of Patent: July 17, 2001
    Assignee: Nippondenso Co., Ltd.
    Inventors: Kazuhiro Inoguchi, Nobuei Ito, Tadashi Hattori, Yutaka Hattori, Masahiko Osada
  • Patent number: RE38464
    Abstract: There is provided an alternating current generator comprising: a rotatably supported field rotor having a pair of opposed rotor pole cores, each being provided with P/2 claw poles wherein P is an even number, and a field winding wound on the rotor pole cores; an armature core located around the outer periphery of the field rotor and having axially extending 3nP slots wherein n is an integer more than one; n independent sets of three-phase windings, each being wound on the armature core by being inserted in the slots so that the n sets of three-phase windings are shifted from each other by electrical angle of &pgr;/(3n) radians; and three-phase rectifiers connected with the n sets of three-phase windings to rectify output voltages generated by the three-phase windings.
    Type: Grant
    Filed: July 19, 2002
    Date of Patent: March 16, 2004
    Assignee: Nippondenso Co., Ltd.
    Inventors: Sin Kusase, Keiichiro Banzai, Seiji Hayashi