Patents Assigned to Nippon Electric Company Limited
  • Patent number: 4596957
    Abstract: An amplifier switchable between a dual-channel amplifier and a BTL amplifier includes first and second amplifying circuits having a non-inverting input, an inverting input and an output, a first input terminal receiving a first input signal and applying it to the non-inverting input of the first amplifying circuit, a second input terminal receiving a second input signal, a first switch selectively applying a signal to the non-inverting input of the first or second amplifying circuit, a second switch controlling the application of an output from the first amplifying circuit to the inverting input of the second amplifying circuit, a controlling circuit controlling the first and second switches, first through third loads and a third switch controlling the application of an output from the first and second amplifying circuits to the first and second loads, respectively, or to the respective ends of the third load.
    Type: Grant
    Filed: August 10, 1984
    Date of Patent: June 24, 1986
    Assignee: Nippon Electric Company Limited
    Inventors: Hirokazu Fukaya, Haruo Niki
  • Patent number: 4388009
    Abstract: A line printer is provided with at least one cross flow fan positioned above the hammer actuators for directing an air flow across the actuators for cooling the same. The exiting heated air is ventilated to the outside and may pass through sound absorbers or mufflers in order to achieve quiet operation.
    Type: Grant
    Filed: May 30, 1980
    Date of Patent: June 14, 1983
    Assignee: Nippon Electric Company, Limited
    Inventors: Ikuo Kumagai, Yukiaki Koyanagi, Hiroshi Hidaka
  • Patent number: 4285027
    Abstract: The invention is concerned with a cooling system for cooling telecommunication equipment at an unattended microwave relay station or the like located in desert or like regions where there is a large difference between the maximum daytime temperature and minimum nighttime temperature. The cooling system includes an outdoor heat exchanger disposed outside and above a shelter accommodating the telecommunication equipment, an indoor heat exchanger disposed in the shelter and a heat storage means disposed at an intermediate level between these heat exchangers. These heat exchangers and the heat storage means are connected with one another by conduit means charged with a condenseable refrigerant, such that the refrigerant is naturally circulated in said conduit means by gravity.
    Type: Grant
    Filed: January 12, 1979
    Date of Patent: August 18, 1981
    Assignees: Daikin Kogyo Co., Ltd., Nippon Electric Company Limited
    Inventors: Shigeru Mori, Katsumi Sakitani
  • Patent number: 4284859
    Abstract: An adaptive hybrid circuit for connecting two-wire and four-wire telephone transmission lines to minimize singing, oscillation or echoes due to impedance mismatch. The circuit comprises a variable impedance circuit connected between the two-wire and four-wire circuits. In one embodiment one end of the variable impedance circuit is connected to the two-wire circuit and to one input of an adder to which the reception signal from the four-wire circuit is also applied and compared in reverse phase and half amplitude. The resulting transmission signal is used to adjust the variable impedance circuit so as to minimize the transmission signal. In another embodiment the variable impedance element is connected to an impedance through which the four-wire reception signal is applied and is further connected to one input of an adder which compares this input in reverse phase with the two-wire signal to produce a transmission signal.
    Type: Grant
    Filed: April 10, 1979
    Date of Patent: August 18, 1981
    Assignee: Nippon Electric Company, Limited
    Inventor: Takashi Araseki
  • Patent number: 4063043
    Abstract: An intraoffice trunk switching system wherein a connecting path between the called subscriber and the intraoffice trunk is established first; the connecting path between the calling subscriber and the intraoffice trunk to which the called subscriber is connected is then selected so that if no idle channel is available the first connecting path is released and simultaneously therewith the connecting operation between the calling subscriber and the intraoffice trunk is stopped and an idle intraoffice trunk is selected. The connecting path between the called subscriber and the selected intraoffice trunk is established and then the connecting path between the calling subscriber and the selected intraoffice trunk is set to improve the link block ratio of the intraoffice connection.
    Type: Grant
    Filed: June 6, 1975
    Date of Patent: December 13, 1977
    Assignees: Nippon Telegraph and Telephone Public Corporation, Oki Electric Industry Co., Ltd., Nippon Electric Company, Limited, Hitachi, Ltd., Fujitsu Limited
    Inventors: Joji Tashiro, Tadahiko Kawanabe, Noboru Araki, Kazuo Ashihara, Toshio Ando, Sadayuki Hiragi, Kazuo Itoh, Yukio Ozawa, Eiichi Odera, Kosuke Inoue
  • Patent number: 4060782
    Abstract: A switching device is provided which is of a highly integrated structure and particularly adapted for a matrix arrangement of switch elements. The structure characteristically enables the switching device to be efficiently fabricated with maximum component density and minimum cost, and includes a base plate in the form of an integral combination of two insulating plates lying on each other, fixed contacts formed in an appropriate pattern on one of the insulating plates, and movable contacts formed integrally with spring strips supported on the base plate.
    Type: Grant
    Filed: February 19, 1976
    Date of Patent: November 29, 1977
    Assignee: Nippon Electric Company, Limited
    Inventors: Takashi Inagawa, Sadayuki Mitsuhashi
  • Patent number: 4048646
    Abstract: A dual-gate Schottky barrier gate field effect transistor is provided with an intermediate electrode between a first and a second gate electrode. This intermediate electrode forms an ohmic contact with a semiconductor substrate of the transistor. The transistor is produced by etching a first film formed on a planar surface of the substrate by the use of a pair of mask pieces to leave a pair of gate electrodes narrower than the mask pieces and projecting a metal capable of forming an ohmic contact with the semiconductor towards the planar surface perpendicularly thereof. The projected metal provides source and drain electrode on both sides of the gate electrode pair and an intermediate electrode between the gate electrodes. The intermediate electrode may be left floating during operation.
    Type: Grant
    Filed: February 25, 1976
    Date of Patent: September 13, 1977
    Assignee: Nippon Electric Company, Limited
    Inventors: Masaki Ogawa, Takashi Furutsuka, Masaoki Ishikawa
  • Patent number: 4048447
    Abstract: A PCM-TASI signal transmission system utilizes assignment control means responsive to an output signal from means for detecting the presence of information on each of a plurality (m) of input trunks arranged in time-serial fashion. The assignment control means selectively assigns a PCM signal representing the input trunk signal, during the period when information is present thereon, to one of a second plurality (s) of transmission channels (s<m). The assignment control means includes means for generating and transmitting signals representing the selected assignments state of the input trunks.
    Type: Grant
    Filed: May 20, 1976
    Date of Patent: September 13, 1977
    Assignee: Nippon Electric Company, Limited
    Inventor: Rikio Maruta
  • Patent number: 4037248
    Abstract: A system for coding a composite color television signal and a system for decoding the received coded composite color television signal are disclosed. Coding is achieved by the use of a sampling frequency lower than the Nyquist sampling frequency to provide a direct-coding system in which the composite television signal is sampled at a timing where the subcarriers stand at phases about 180.degree. away from each other in each scanning line and at a timing where the subcarriers stand at phases about 90.degree. away from each other between adjacent scanning lines. In the decoding system, an interspatial signal component lying at a midpoint between every two sampling points is produced from the sampled signals. A composite television signal is produced from the sample signal and the interspatial signal.
    Type: Grant
    Filed: February 26, 1976
    Date of Patent: July 19, 1977
    Assignee: Nippon Electric Company Limited
    Inventors: Yukihiko Iijima, Tatsuo Ishiguro
  • Patent number: 4037168
    Abstract: As an input and/or an output matching circuit for a transistor, a transistorized high-frequency power amplifier comprises at least one pattern of a conductive material on a sheet of a ferroelectric material placed on a conductive base plate in direct contact therewith. The ferroelectric material is represented by the formula:(1 - x) BaO.xTiO.sub.2,where 0.7 .ltoreq. x < 1.0. Preferably, x .ltoreq. 0.95. The pattern may be in direct contact with the ferroelectric sheet to form a capacitor together with the base plate, a quarter-wavelength impedance transformer, or both. Preferably, the pattern is formed by integrated circuit techniques. An inductor may preferably be provided either by a portion of the pattern with a conventional dielectric material substituted for the ferroelectric material at that part of the sheet which is below the pattern portion or by a chip inductor.
    Type: Grant
    Filed: September 9, 1976
    Date of Patent: July 19, 1977
    Assignee: Nippon Electric Company Limited
    Inventors: Hidehiko Katoh, Yuji Kajiwara, Hideo Takamizawa
  • Patent number: 4037130
    Abstract: A gas discharge display device includes a center plate which comprises cells for defining a display area. The center plate, which is sandwiched between two electrode holding plates each of which has an electrode coated with a dielectric layer, is in the form of a porous insulating layer having a low dielectric constant.
    Type: Grant
    Filed: May 20, 1975
    Date of Patent: July 19, 1977
    Assignee: Nippon Electric Company Limited
    Inventors: Takao Mimitsuka, Tunekiyo Iwakawa
  • Patent number: 4027292
    Abstract: A synchronous digital data processing system employing single-phase clock pulses comprises arithmetic and control units which are capable of completing an operation during one clock pulse period. The data processing system includes closed data paths wherein only one stage of a memory circuit capable of the same operation as a master/slave flip-flop is used as a data register in the arithmetic unit and as an address register in the control unit. In either case, during one cycle of a single-phase clock pulse, an input data is set in the memory circuit, and the output of the memory circuit is renewed in response to the input data. The output of the memory circuit is held until it is renewed in the following cycle.
    Type: Grant
    Filed: December 27, 1974
    Date of Patent: May 31, 1977
    Assignee: Nippon Electric Company, Limited
    Inventors: Kiyokazu Okamoto, Masayoshi Isomura, Atsuto Kobayashi
  • Patent number: RE29217
    Abstract: A digital circuit is formed by transistors operable in an unsaturated state. A pair of first transistors are connected in a differential relationship with their emitters commonly connected. A pair of second transistors are also connected in a differential relationship and have their emitters connected in common and their collectors connected respectively to the bases of the first transistors. At least one of the first transistors is connected to the bases of the second transistors to form a feedback loop. First and second current sources are connected to the emitters of the first and second transistors respectively. The state of the circuit is switched by a control signal applied to the bases of one pair of transistors.
    Type: Grant
    Filed: October 4, 1976
    Date of Patent: May 10, 1977
    Assignee: Nippon Electric Company, Limited
    Inventor: Yoshiki Higo
  • Patent number: RE29218
    Abstract: A packaged semiconductor device for use at ultra-high frequencies is characterized by improved high frequency characteristics as a result of reduced stay capacitance and reduced energy loss. The device includes a dielectric substrate and at least two conductor layers each of which is integral and extends over the top, side, and bottom surfaces of the dielectric substrate. No part of the conductor layer on the top surface overlaps the part on the bottom surface when viewed in a direction normal to the substrate.
    Type: Grant
    Filed: October 4, 1976
    Date of Patent: May 10, 1977
    Assignee: Nippon Electric Company, Limited
    Inventors: Shinzo Anazawa, Seiichi Ueno, Isamu Nagasako, Shigeru Sando
  • Patent number: RE29286
    Abstract: A power amplifier includes a bootstrapped driver circuit in which the load element is divided into two parts. A single-ended push-pull circuit provides a feedback to the junction point of those two parts. A resistor element having 0.1 to 10 times the resistance of the load element is connected in parallel with the load element.
    Type: Grant
    Filed: October 4, 1976
    Date of Patent: June 28, 1977
    Assignee: Nippon Electric Company, Limited
    Inventors: Hirokazu Fukaya, Naotoshi Higashiyama
  • Patent number: RE29395
    Abstract: A semiconductor laser device includes a narrow elongated semiconductor region of the same conductivity type as another semiconductor region lying in the vicinity of the active region of the laser device. The elongated region extends in depth from the surface of the device to the vicinity of the active region. A surface semiconductor layer of an opposite conductivity type covers the entire surface of the device except for the elongated region.
    Type: Grant
    Filed: June 15, 1976
    Date of Patent: September 13, 1977
    Assignee: Nippon Electric Company, Limited
    Inventor: Hiroo Yonezu
  • Patent number: RE29461
    Abstract: A hologram graphic tablet apparatus is described which has an improved resolution. The apparatus includes a hologram plate which includes a plurality of mini-holograms having position code data therein. The hologram plate is sequentially illuminated by a reference laser and an array of vernier lasers. The light from the laser that is diffracted by the mini-holograms is detected to form a reconstructed image of the position data, and the detected information is processed to produce a positional code that has a greater number of bits, and hence greater position resolution, than that directly obtained from the mini-hologram, depending on whether the output codes from the detector are the result of irradiation of the mini-hologram by the reference laser or by the vernier laser array.
    Type: Grant
    Filed: October 4, 1976
    Date of Patent: October 25, 1977
    Assignee: Nippon Electric Company, Limited
    Inventors: Masahiro Moriwaki, Mitsuhito Sakaguchi, Yoshinari Mita
  • Patent number: RE29484
    Abstract: A ceramic composition having a high dielectric constant which has good stability with temperature variation and the passage of time includes BaTiO.sub.3 in which the molecular ratio of Ba to Ti ranges from about 0.9 to 1.1 as the basic constituent and about 0.1 to 10 mol % of at least one compound selected from the group of Nb.sub.2 O.sub.5 and Ta.sub.2 O.sub.5 and about 0.01 to 15 mol % of at least one compound selected from the group consisting of In.sub.2 O.sub.3, Ga.sub.2 O.sub.3, Tl.sub.2 O.sub.3, MgO, ZnO and NiO as sub constituents.
    Type: Grant
    Filed: October 4, 1976
    Date of Patent: November 29, 1977
    Assignee: Nippon Electric Company, Limited
    Inventors: Kazuaki Utsumi, Norio Tsubouchi, Tomeji Ohno
  • Patent number: RE29676
    Abstract: A plurality of resistance elements arranged in an n-row by n-column matrix are of substantially equal lengths and widths. The sides of the resistance elements which are in common rows and columns are colinear and first and second electrodes are provided at substantially the same location on each resistance element. The electrodes of the resistance elements are connected in a manner such that a series connection is formed between resistance elements belonging to different adjacent columns in the matrix between two sets of n external terminals.
    Type: Grant
    Filed: October 4, 1976
    Date of Patent: June 20, 1978
    Assignee: Nippon Electric Company, Limited
    Inventors: Kyuichi Hareyama, Shuzi Nakazawa
  • Patent number: RE29866
    Abstract: A semiconductor laser device includes a narrow elongated semiconductor region of the same conductivity type as another semiconductor region lying in the vicinity of the active region of the laser device. The elongated region extends in depth from the surface of the device to the vicinity of the active region. A surface semiconductor layer of an opposite conductivity type covers the entire surface of the device except for the elongated region.
    Type: Grant
    Filed: February 14, 1978
    Date of Patent: December 19, 1978
    Assignee: Nippon Electric Company, Limited
    Inventor: Hiroo Yonezu