Patents Assigned to NVidia
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Patent number: 12026845Abstract: Apparatuses, systems, and techniques are presented to generate augmented images. In at least one embodiment, one or more neural networks are used to modify one or more first objects in an image based at least in part upon a modification to be made to one or more second objects in the image.Type: GrantFiled: August 31, 2020Date of Patent: July 2, 2024Assignee: NVIDIA CorporationInventor: Siddhant Pardeshi
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Patent number: 12026822Abstract: In various examples, the actual spatial properties of a virtual environment are used to produce, for a pixel, an anisotropic filter kernel for a filter having dimensions and weights that accurately reflect the spatial characteristics of the virtual environment. Geometry of the virtual environment may be computed based at least in part on a projection of a light source onto a surface through an occluder, in order to determine a footprint that reflects a contribution of the light source to lighting conditions of the pixel associated with a point on the surface. The footprint may define a size, orientation, and/or shape of the anisotropic filter kernel and corresponding filter weights. The anisotropic filter kernel may be applied to the pixel to produce a graphically-rendered image of the virtual environment.Type: GrantFiled: June 21, 2022Date of Patent: July 2, 2024Assignee: NVIDIA CorporationInventor: Shiqui Liu
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Patent number: 12026955Abstract: In various examples, live perception from sensors of an ego-machine may be leveraged to detect objects and assign the objects to bounded regions (e.g., lanes or a roadway) in an environment of the ego-machine in real-time or near real-time. For example, a deep neural network (DNN) may be trained to compute outputs—such as output segmentation masks—that may correspond to a combination of object classification and lane identifiers. The output masks may be post-processed to determine object to lane assignments that assign detected objects to lanes in order to aid an autonomous or semi-autonomous machine in a surrounding environment.Type: GrantFiled: September 29, 2021Date of Patent: July 2, 2024Assignee: NVIDIA CorporationInventors: Mehmet Kocamaz, Neeraj Sajjan, Sangmin Oh, David Nister, Junghyun Kwon, Minwoo Park
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Patent number: 12027198Abstract: Embodiments include a memory device with an improved circuit to mitigate degradation of memory devices due to aging. Memory device input/output pins include delay elements for adjusting the delay in each memory input/output signal path to synchronize the input/output signal paths with one another. Certain data patterns, including a long series of logic zero values or a long series of logic one values, can cause asymmetric degradation of transistors included in the delay elements. This asymmetric degradation can reduce the operating frequency of the memory device, leading to lower performance. The disclosed embodiments change the polarity of signals passing through the delay elements to mitigate the effects of asymmetric degradation resulting from these data patterns. As a result, the performance of memory devices is improved relative to prior approaches.Type: GrantFiled: July 15, 2022Date of Patent: July 2, 2024Assignee: NVIDIA CORPORATIONInventors: Ish Chadha, Virendra Kumar, Vipul Katyal, Abhijith Kashyap
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Patent number: 12026626Abstract: Apparatuses, systems, and techniques to classify content. In at least one embodiment, a mixture of neural networks each trained to generate labels for various types of input are used to automatically generate appropriate content labels given an input.Type: GrantFiled: February 18, 2020Date of Patent: July 2, 2024Assignee: NVIDIA CORPORATIONInventors: Siddhant Prakash Pardeshi, Pranit P. Kothari, Vinayak Vilas Gaikwad
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Patent number: 12026830Abstract: In order to perform denoising on a three-dimensional (3D) spherical measurement of light (such as spherical irradiance probe information or the results of a 3D gonioreflectometry capture), the 3D spherical measurement of light is converted to a two-dimensional (2D) measurement by creating multiple copies of the 3D spherical measurement of light, determining a two-dimensional sub-domain (e.g., a rectangular sub-domain) for each of the multiple copies, and stitching the plurality of two-dimensional sub-domains together in a toroidal configuration. Denoising may then be performed on this 2D measurement via a machine learning implementation or other means. This may result in more accurate 3D spherical light probes that require fewer light measurement samples to generate accurate light measurements.Type: GrantFiled: May 17, 2022Date of Patent: July 2, 2024Assignee: NVIDIA CORPORATIONInventors: Nicholas Vining, Paul Lalonde, Alexander Majercik
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Publication number: 20240211748Abstract: In various examples, systems and methods are disclosed relating to determining associations between objects represented in sensor data and predicted states of the objects in multi-sensor systems such as autonomous or semi-autonomous vehicle perception systems. Systems and methods are disclosed that employ neural network models, such as multi-layer perceptron (MLP) models or other deep neural network (DNN) models, in learning association costs between sensor measurements and predicted states of objects. During training, the systems and methods can generate data for updating parameters of the neural network models such that, during deployment, the neural network models can receive sensor data and predicted states, and provide corresponding association costs.Type: ApplicationFiled: December 27, 2022Publication date: June 27, 2024Applicant: NVIDIA CorporationInventors: Neeraj Sajjan, Mehmet Kocamaz, Parthiv Parikh
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Patent number: 12022633Abstract: A graphics subsystem includes a printed circuit board (PCB), a blower, and a heat sink. A graphics processing unit (GPU) is integrated into the PCB. The PCB is shortened to occupy a portion of the width of the graphics subsystem. The heat sink is coupled to the PCB and/or GPU similarly occupies just a portion of the width of the graphics subsystem. The blower is disposed adjacent to the PCB and heat sink and configured to occupy the full height of the graphics subsystem. The blower is further configured to intake air from both the top side of the graphics subsystem and the bottom side of the graphics subsystem. In this configuration, the blower provides an elevated air flow rate in order to facilitate cooling of the PCB and/or GPU.Type: GrantFiled: September 3, 2020Date of Patent: June 25, 2024Assignee: NVIDIA CorporationInventors: David Haley, Xiang Sun, Gabriele Gorla, Andrew Bell, Boris Landwehr
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Patent number: 12020035Abstract: This specification describes a programmatic multicast technique enabling one thread (for example, in a cooperative group array (CGA) on a GPU) to request data on behalf of one or more other threads (for example, executing on respective processor cores of the GPU). The multicast is supported by tracking circuitry that interfaces between multicast requests received from processor cores and the available memory. The multicast is designed to reduce cache (for example, layer 2 cache) bandwidth utilization enabling strong scaling and smaller tile sizes.Type: GrantFiled: March 10, 2022Date of Patent: June 25, 2024Assignee: NVIDIA CORPORATIONInventors: Apoorv Parle, Ronny Krashinsky, John Edmondson, Jack Choquette, Shirish Gadre, Steve Heinrich, Manan Patel, Prakash Bangalore Prabhakar, Jr., Ravi Manyam, Wish Gandhi, Lacky Shah, Alexander L. Minkin
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Patent number: 12020076Abstract: In various embodiments, a dispatch application performs multiply-accumulate (“MAC”) computations across parallel processing elements. In operation, the dispatch application determines a first quantity of iterations associated with a given MAC computation. The dispatch application determines a maximum number of tasks that can execute concurrently across a set of parallel processing elements. Subsequently, the dispatch application causes the maximum number of tasks to be executed concurrently across the set of parallel processing elements in order to perform the MAC computation. During execution, each task performs a substantially similar number of the first quantity of iterations. Relative to conventional tile-based approaches to performing MAC computations across parallel processing elements, the dispatch application can more evenly distribute iterations across the different parallel processing elements.Type: GrantFiled: March 22, 2021Date of Patent: June 25, 2024Assignee: NVIDIA CorporationInventor: Duane George Merrill, III
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Patent number: 12020367Abstract: Enhanced techniques applicable to a ray tracing hardware accelerator for traversing a hierarchical acceleration structure are disclosed. The traversal efficiency of such hardware accelerators are improved, for example, by transforming a ray, in hardware, from the ray's coordinate space to two or more coordinate spaces at respective points in traversing the hierarchical acceleration structure. In one example, the hardware accelerator is configured to transform a ray, received from a processor, from the world space to at least one alternate world space and then to an object space in hardware before a corresponding ray-primitive intersection results are returned to the processor. The techniques disclosed herein facilitate the use of additional coordinate spaces to orient acceleration structures in a manner that more efficiently approximate the space occupied by the underlying primitives being ray-traced.Type: GrantFiled: February 11, 2022Date of Patent: June 25, 2024Assignee: NVIDIA CORPORATIONInventors: Gregory Muthler, John Burgess, James Robertson, Magnus Anderson
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Patent number: 12019498Abstract: An optimized power saving technique is described for a processor, such as, for example, a graphic processing unit (GPU), which includes one or more processing cores and at least one data link interface. According to the technique, the processor is operable in a low power mode in which power to the at least one processing core is off and power to the at least one data link interface is on. This technique provides reduced exit latencies compared to currently available approaches in which the core power is turned off.Type: GrantFiled: October 30, 2018Date of Patent: June 25, 2024Assignee: NVIDIA CORPORATIONInventors: Thomas E. Dewey, Narayan Kulshrestha, Ramachandiran V, Sachin Idgunji, Lordson Yue
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Patent number: 12017352Abstract: Apparatuses, systems, and techniques to map coordinates in task space to a set of joint angles of an articulated robot. In at least one embodiment, a neural network is trained to map task-space coordinates to joint space coordinates of a robot by simulating a plurality of robots at various joint angles, and determining the position of their respective manipulators in task space.Type: GrantFiled: February 16, 2021Date of Patent: June 25, 2024Assignee: NVIDIA CORPORATIONInventors: Visak Chadalavada Vijay Kumar, David Hoeller, Balakumar Sundaralingam, Jonathan Tremblay, Stanley Thomas Birchfield
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Patent number: 12019967Abstract: The disclosure provides a general solution for determining connections between terminals of various types of circuits using machine learning (ML). A ML method that uses reinforcement learning (RL), such as deep RL, to determine and optimize routing of circuit connections using a game process is provided. In one example a method of determining routing connection includes: (1) receiving a circuit design having known terminal groups, (2) establishing terminal positions for the terminal groups in a routing environment, and (3) determining, by the RL agent, routes of nets between the known terminal groups employing a model that is independent of a number of the nets of the circuit. A method of creating a model for routing nets using RL, a method of employing a game for training a RL agent to determine routing connections, and a RL agent for routing connections of a circuit are also disclosed.Type: GrantFiled: April 14, 2021Date of Patent: June 25, 2024Assignee: NVIDIA CorporationInventors: Haoxing Ren, Matthew Fojtik
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Patent number: 12016154Abstract: Systems and methods for cooling a datacenter are disclosed. In at least one embodiment, an in-row cooling unit is located within a row of racks and between racks so that it can use an interchangeable heat exchanger (IHE) to receive a primary coolant and can use one or more flow controllers to provide a first part of the primary coolant to cool a secondary coolant that is to be distributed to at least one cold plate, and to provide a second part of the primary coolant to cool air to be circulated through at least one server tray or rack.Type: GrantFiled: July 23, 2021Date of Patent: June 18, 2024Assignee: Nvidia CorporationInventor: Ali Heydari
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Patent number: 12012125Abstract: In various examples, an integrated circuit includes first and second portions. The first portion includes a timer that starts when the first portion transmits at least one error signal to the second portion. The timer may reset when data corresponding to at least one fault has been cleared from the first portion. The first portion transmits a timeout error signal when the timer indicates at least a predetermined amount of time has elapsed. The second portion receives the at least one error signal and the timeout error signal when the timeout error signal has been sent. The second portion may notify an external system after the timeout error signal is received.Type: GrantFiled: September 16, 2021Date of Patent: June 18, 2024Assignee: NVIDIA CORPORATIONInventors: Padam Patt Krishnani, Avinash J V, Shraddha Manohar Gondkar, Sowmya Satya Venkata Naga Siva Sai Bindu Mandapati
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Patent number: 12013844Abstract: Approaches in accordance with various embodiments can perform spatial hash map updates while ensuring the atomicity of the updates for arbitrary data structures. A hash map can be generated for a dataset where entries in the hash map may correspond to multiple independent values, such as pixels of an image to be rendered. Update requests for independent values may be received on multiple concurrent threads, but change requests for independent values corresponding to a hash map entry can be aggregated from a buffer and processed iteratively in a single thread for a given hash map entry. In the case of multi-resolution spatial hashing where data can be stored at various discretization levels, this operation can be repeated to propagate changes from one level to another.Type: GrantFiled: March 20, 2023Date of Patent: June 18, 2024Assignee: Nvidia CorporationInventor: Pascal Gautron
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Patent number: 12014547Abstract: In various examples, natural language processing may be performed on text generated by a game to extract one or more in-game events from the game. The system (e.g., a client device and/or server) may receive the text in the form of one or more strings generated by a game application. The system may then extract one or more in-game events from the text using natural language processing. The game may include the text in a message it sends to the system (e.g., using an Application Programming Interface (API)) and/or in a game log entry or notification. The text may be generated based at least on the game determining one or more conditions are satisfied in the gameplay (e.g., victory, points scored, milestones, eliminations, item acquisition, etc.). The text may be mapped to event templates, which may then be used to extract parameters of events therefrom.Type: GrantFiled: September 7, 2021Date of Patent: June 18, 2024Assignee: NVIDIA CorporationInventors: James Lewis van Welzen, Prakash Yadav, Charu Kalani, Jonathan White, Shyam Raikar, Stephen Holmes, David Wilson
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Patent number: 12013244Abstract: In various examples, live perception from sensors of a vehicle may be leveraged to generate potential paths for the vehicle to navigate an intersection in real-time or near real-time. For example, a deep neural network (DNN) may be trained to compute various outputs—such as heat maps corresponding to key points associated with the intersection, vector fields corresponding to directionality, heading, and offsets with respect to lanes, intensity maps corresponding to widths of lanes, and/or classifications corresponding to line segments of the intersection. The outputs may be decoded and/or otherwise post-processed to reconstruct an intersection—or key points corresponding thereto—and to determine proposed or potential paths for navigating the vehicle through the intersection.Type: GrantFiled: April 14, 2020Date of Patent: June 18, 2024Assignee: NVIDIA CorporationInventors: Trung Pham, Hang Dou, Berta Rodriguez Hervas, Minwoo Park, Neda Cvijetic, David Nister
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Patent number: 12014460Abstract: Robust temporal gradients, representing differences in shading results, can be computed between current and previous frames in a temporal denoiser for ray-traced renderers. Backward projection can be used to locate matching surfaces, with the relevant parameters of those surfaces being carried forward and used for patching. Backward projection can be performed for each stratum in a current frame, a stratum representing a set of adjacent pixels. A pixel from each stratum is selected that has a matching surface in the previous frame, using motion vectors generated during the rendering process. A comparison of the depth of the normals, or the visibility buffer data, can be used to determine whether a given surface is the same in the current frame and the previous frame, and if so then parameters of the surface from the previous frame G-buffer is used to patch the G-buffer for the current frame.Type: GrantFiled: May 15, 2023Date of Patent: June 18, 2024Assignee: Nvidia CorporationInventor: Alexey Panteleev
