Patents Assigned to NVidia
  • Patent number: 11283349
    Abstract: This disclosure relates to current flattening circuits for an electrical load. The current flattening circuits incorporate randomize various parameters to add noise onto the supply current. This added noise may act to reduce the signal to noise ratio in the supply current, increasing the difficulty of identifying a computational artifact signal from power rail noise.
    Type: Grant
    Filed: April 23, 2020
    Date of Patent: March 22, 2022
    Assignee: NVIDIA Corp.
    Inventors: Sudhir Shrikantha Kudva, Nikola Nedovic, Sanquan Song
  • Patent number: 11282258
    Abstract: Image quality can be improved by rendering the image based on an importance map that indicates regions of the image that will benefit from more samples. Adaptive sampling determines a number of samples for each pixel of the image using a target sampling rate and the importance map for the image. The number of samples for each pixel needs to be a non-negative integer value, so the per-pixel sampling rates are quantized using per-pixel random values. The resulting quantized sampling rates provides a distribution of samples that closely matches the importance map. The per-pixel random values may vary over time so that the average of the distribution more closely matches the importance map.
    Type: Grant
    Filed: February 9, 2021
    Date of Patent: March 22, 2022
    Assignee: NVIDIA Corporation
    Inventors: Tomas Guy Akenine-Möller, Jim Kjell David Nilsson, Johan Pontus Andersson
  • Patent number: 11281221
    Abstract: A method, computer readable medium, and system are disclosed for performing autonomous path navigation using deep neural networks. The method includes the steps of receiving image data at a deep neural network (DNN), determining, by the DNN, both an orientation of a vehicle with respect to a path and a lateral position of the vehicle with respect to the path, utilizing the image data, and controlling a location of the vehicle, utilizing the orientation of the vehicle with respect to the path and the lateral position of the vehicle with respect to the path.
    Type: Grant
    Filed: July 6, 2020
    Date of Patent: March 22, 2022
    Assignee: Nvidia Corporation
    Inventors: Nikolai Smolyanskiy, Alexey Kamenev, Jeffrey David Smith, Stanley Thomas Birchfield
  • Patent number: 11275662
    Abstract: Unavoidable physical phenomena, such as an alpha particle strikes, can cause soft errors in integrated circuits. Materials that emit alpha particles are ubiquitous, and higher energy cosmic particles penetrate the atmosphere and also cause soft errors. Some soft errors have no consequence, but others can cause an integrated circuit to malfunction. In some applications (e.g. driverless cars), proper operation of integrated circuits is critical to human life and safety. To minimize or eliminate the likelihood of a soft error becoming a serious malfunction, detailed assessment of individual potential soft errors and subsequent processor behavior is necessary. Embodiments of the present disclosure facilitate emulating a plurality of different, specific soft errors. Resilience may be assessed over the plurality of soft errors and application code may be advantageously engineered to improve resilience.
    Type: Grant
    Filed: January 7, 2021
    Date of Patent: March 15, 2022
    Assignee: NVIDIA Corporation
    Inventors: Jonah M. Alben, Sachin Satish Idgunji, Jue Wu
  • Patent number: 11276648
    Abstract: An on-chip electromagnetic (EM) pulse protection circuit detects EM pulse attacks, generates an alarm, and performs a defensive action to protect the integrated circuit. The EM pulse protection circuit can be used with various integrated circuits or manufactured chips in which, for example, there is a desire to keep information secure, maintain the security of the chip, secure boot processes, and/or protect private keys.
    Type: Grant
    Filed: July 31, 2018
    Date of Patent: March 15, 2022
    Assignee: Nvidia Corporation
    Inventors: Chinmay Apte, Brian Smith, Tezaswi Raja, Roman Surgutchik
  • Publication number: 20220076110
    Abstract: A distributed deep neural net (DNN) utilizing a distributed, tile-based architecture includes multiple chips, each with a central processing element, a global memory buffer, and a plurality of additional processing elements. Each additional processing element includes a weight buffer, an activation buffer, and vector multiply-accumulate units to combine, in parallel, the weight values and the activation values using stationary data flows.
    Type: Application
    Filed: November 19, 2021
    Publication date: March 10, 2022
    Applicant: NVIDIA Corp.
    Inventors: Yakun Shao, Rangharajan Venkatesan, Miaorong Wang, Daniel Smith, William James Dally, Joel Emer, Stephen W. Keckler, Brucek Khailany
  • Patent number: 11270161
    Abstract: When a computer image is generated from a real-world scene having a semi-reflective surface (e.g. window), the computer image will create, at the semi-reflective surface from the viewpoint of the camera, both a reflection of a scene in front of the semi-reflective surface and a transmission of a scene located behind the semi-reflective surface. Similar to a person viewing the real-world scene from different locations, angles, etc., the reflection and transmission may change, and also move relative to each other, as the viewpoint of the camera changes. Unfortunately, the dynamic nature of the reflection and transmission negatively impacts the performance of many computer applications, but performance can generally be improved if the reflection and transmission are separated. The present disclosure uses deep learning to separate reflection and transmission at a semi-reflective surface of a computer image generated from a real-world scene.
    Type: Grant
    Filed: July 8, 2020
    Date of Patent: March 8, 2022
    Assignee: NVIDIA Corporation
    Inventors: Orazio Gallo, Jinwei Gu, Jan Kautz, Patrick Wieschollek
  • Patent number: 11270495
    Abstract: In examples, a list of elements may be divided into spans and each span may be allocated a respective memory range for output based on a worst-case compression ratio of a compression algorithm that will be used to compress the span. Worker threads may output compressed versions of the spans to the memory ranges. To ensure placement constraints of a data structure will be satisfied, boundaries of the spans may be adjusted prior to compression. The size allocated to a span (e.g., each span) may be increased (or decreasing) to avoid padding blocks while allowing for the span's compressed data to use a block allocated to an adjacent span. Further aspects of the disclosure provide for compaction of the portions of compressed data in memory in order to free up space which may have been allocated to account for the memory gaps which may result from variable compression ratios.
    Type: Grant
    Filed: May 21, 2020
    Date of Patent: March 8, 2022
    Assignee: NVIDIA Corporation
    Inventors: Timo Tapani Viitanen, Tero Tapani Karras, Samuli Laine
  • Patent number: 11270197
    Abstract: A distributed deep neural net (DNN) utilizing a distributed, tile-based architecture includes multiple chips, each with a central processing element, a global memory buffer, and a plurality of additional processing elements. Each additional processing element includes a weight buffer, an activation buffer, and vector multiply-accumulate units to combine, in parallel, the weight values and the activation values using stationary data flows.
    Type: Grant
    Filed: November 4, 2019
    Date of Patent: March 8, 2022
    Assignee: NVIDIA Corp.
    Inventors: Yakun Shao, Rangharajan Venkatesan, Miaorong Wang, Daniel Smith, William James Dally, Joel Emer, Stephen W. Keckler, Brucek Khailany
  • Patent number: 11270496
    Abstract: The disclosure provides a renderer and a rendering process employing ray tracing and image-space filtering that interleaves the pixels of a frame into partial image fields and corresponding reduced-resolution images that are individually processed in parallel. In one example, the renderer includes: (1) an interface configured to receive scene information for rendering a full frame, and (2) a graphics processing system, coupled to the interface, configured to separate pixels of the full frame into different partial image fields that each include a unique set of interleaved pixels, render reduced-resolution images of the full frame by ray tracing the different partial image fields in parallel, independently apply image-space filtering to the reduced-resolution images in parallel, and merge the reduced-resolution images to provide a full rendered frame.
    Type: Grant
    Filed: May 22, 2020
    Date of Patent: March 8, 2022
    Assignee: Nvidia Corporation
    Inventors: Nuno Raposo Subtil, Manuel Kraemer, Alexey Panteleev, Mike Songy
  • Patent number: 11270041
    Abstract: Embodiments of the present invention provide a position-based dynamics approach for simulating objects using a set of points and constraints, applied as equations that restrict the relative motion of bodies. Forces are applied to the points to move them, and the constraints ensure that the points will not move in a way that is inconsistent with rules of the simulation. The present invention improves upon existing PBD approaches by using regularized constraints that directly correspond to well-defined energy potentials, and which can advantageously be solved independent of time step and iteration count.
    Type: Grant
    Filed: September 24, 2018
    Date of Patent: March 8, 2022
    Assignee: NVIDIA Corporation
    Inventors: Miles Macklin, Matthias Müller, Nuttapong Chentanez
  • Publication number: 20220067513
    Abstract: Solutions improving efficiency of Softmax computation applied for efficient deep learning inference in transformers and other neural networks. The solutions utilize a reduced-precision implementation of various operations in Softmax, replacing ex with 2x to reduce instruction overhead associated with computing ex, and replacing floating point max computation with integer max computation. Further described is a scalable implementation that decomposes Softmax into UnNormalized Softmax and Normalization operations.
    Type: Application
    Filed: December 4, 2020
    Publication date: March 3, 2022
    Applicant: NVIDIA Corp.
    Inventors: Jacob Robert Stevens, Rangharajan Venkatesan, Steve Haihang Dai, Brucek Khailany
  • Patent number: 11263525
    Abstract: A neural network learns a particular task by being shown many examples. In one scenario, a neural network may be trained to label an image, such as cat, dog, bicycle, chair, etc. In other scenario, a neural network may be trained to remove noise from videos or identify specific objects within images, such as human faces, bicycles, etc. Rather than training a complex neural network having a predetermined topology of features and interconnections between the features to learn the task, the topology of the neural network is modified as the neural network is trained for the task, eventually evolving to match the predetermined topology of the complex neural network. In the beginning the neural network learns large-scale details for the task (bicycles have two wheels) and later, as the neural network becomes more complex, learns smaller details (the wheels have spokes).
    Type: Grant
    Filed: January 18, 2019
    Date of Patent: March 1, 2022
    Assignee: NVIDIA Corporation
    Inventors: Tero Tapani Karras, Timo Oskari Aila, Samuli Matias Laine, Jaakko T. Lehtinen, Janne Hellsten
  • Patent number: 11263051
    Abstract: Accesses between a processor and its external memory is reduced when the processor internally maintains a compressed version of values stored in the external memory. The processor can then refer to the compressed version rather than access the external memory. One compression technique involves maintaining a dictionary on the processor mapping portions of a memory to values. When all of the values of a portion of memory are uniform (e.g., the same), the value is stored in the dictionary for that portion of memory. Thereafter, when the processor needs to access that portion of memory, the value is retrieved from the dictionary rather than from external memory. Techniques are disclosed herein to extend, for example, the capabilities of such dictionary-based compression so that the amount of accesses between the processor and its external memory are further reduced.
    Type: Grant
    Filed: May 5, 2020
    Date of Patent: March 1, 2022
    Assignee: NVIDIA Corporation
    Inventors: Ram Rangan, Suryakant Patidar, Praveen Krishnamurthy, Wishwesh Anil Gandhi
  • Patent number: 11265599
    Abstract: In various examples, a media stream may be received by a re-encode system that may leverage a recode engine to convert (e.g., at an interval, based on a request, etc.) an inter-frame associated with the media stream to an intra-frame. The intra-frame may be converted from the inter-frame using parameters or other information associated with and received with the media stream. The converted intra-frame may be merged into an updated segment of the media stream in place of the original inter-frame to enable storage of the updated segment—or a portion thereof—for later use.
    Type: Grant
    Filed: November 21, 2019
    Date of Patent: March 1, 2022
    Assignee: NVIDIA Corporation
    Inventors: Olivier Lapicque, Srinivas Anne
  • Patent number: 11256961
    Abstract: Segmentation is the identification of separate objects within an image. An example is identification of a pedestrian passing in front of a car, where the pedestrian is a first object and the car is a second object. Superpixel segmentation is the identification of regions of pixels within an object that have similar properties. An example is identification of pixel regions having a similar color, such as different articles of clothing worn by the pedestrian and different components of the car. A pixel affinity neural network (PAN) model is trained to generate pixel affinity maps for superpixel segmentation. The pixel affinity map defines the similarity of two points in space. In an embodiment, the pixel affinity map indicates a horizontal affinity and vertical affinity for each pixel in the image. The pixel affinity map is processed to identify the superpixels.
    Type: Grant
    Filed: July 6, 2020
    Date of Patent: February 22, 2022
    Assignee: NVIDIA Corporation
    Inventors: Wei-Chih Tu, Ming-Yu Liu, Varun Jampani, Deqing Sun, Ming-Hsuan Yang, Jan Kautz
  • Patent number: 11256835
    Abstract: A system and method for solving linear complementarity problems for rigid body simulation is disclosed. The method includes determining one or more contact constraints affecting an original object having an original mass. The method includes splitting the original object by a total number of the contact constraints into a plurality of sub-bodies. The method includes assigning a contact constraint to a corresponding sub-body. The method further includes solving contact constraints in isolation for each sub-body. The method also includes enforcing positions and orientations of each sub-body are identical.
    Type: Grant
    Filed: February 20, 2020
    Date of Patent: February 22, 2022
    Assignee: NVIDIA Corporation
    Inventors: Andrey Voroshilov, Feodor Benevolenski, Richard Tonge
  • Patent number: 11256528
    Abstract: The present disclosure relates to streaming individual application windows and/or other desktop elements of a remote desktop. Data used to represent irrelevant desktop areas may be replaced with lower entropy data that may be highly compressed in a video stream and/or with data representative of other visual content. The video stream may also include desktop metadata (e.g., locations for desktop visuals, etc.) used to render the desktop elements on the local desktop. The desktop visuals of an application window may be rendered in a proxy window on the local desktop.
    Type: Grant
    Filed: June 14, 2019
    Date of Patent: February 22, 2022
    Assignee: NVIDIA Corporation
    Inventors: Andrija Bosnjakovic, Johannes Zimmermann, Ashley Reid
  • Patent number: 11256568
    Abstract: The present invention facilitates efficient and effective utilization of storage management features. In one embodiment, a memory device comprises a memory interface, an ECC generation component, and storage components. The memory interface is configured to receive an access request to an address at which data is stored. The memory interface can also forward responses to the request including the data and ECC information associated with the data. The ECC generation component is configured to automatically establish an address at which the ECC information is stored based upon the receipt of the access request to an address at which data is stored. In one exemplary implementation, the internal establishment of the address at which the ECC information is stored is automatic. The storage components are configured to store the information.
    Type: Grant
    Filed: November 25, 2019
    Date of Patent: February 22, 2022
    Assignee: Nvidia Corporation
    Inventors: Bruce Lam, Alok Gupta, David G. Reed, Barry Wagner
  • Patent number: 11257253
    Abstract: The disclosure provides methods of encoding a path, a stroking system for paths, a renderer that generates a stroked tessellation of a path, and a method of determining a type of link of a path from a data structure. The data structure can be an array of indexed links that compactly encode a path. The position of one or more index values, such as a null index value, within an indexed link can encode the link's type. In one example, a method of encoding includes: (1) receiving a path having multiple links, wherein the links include at least one segment and at least one junction, and (2) generating an encoded path by encoding the links based on positional information of the links, wherein the encoding employs a same data structure for each of the links.
    Type: Grant
    Filed: June 29, 2020
    Date of Patent: February 22, 2022
    Assignee: Nvidia Corporation
    Inventor: Mark Kilgard