Abstract: A receiver to receive a signal associated with a low-density parity-check (LDPC) code. The receiver includes a memory device, an address generator, and an LDPC decoder. The LDPC decoder includes a row designator and a position designator. The memory device stores data related to an LDPC decoding process. The address generator generates an access address to the stored data. The LDPC decoder performs the LDPC decoding process. The row designator designates a row from a parity-check matrix as a parent row and designates a plurality of corresponding rows from the parity-check matrix as child rows. The position designator designates an original position order of each parent non-zero element of 10 the parent row according to an actual position order of each parent non-zero element in the parent row. The actual position order includes a numerical order of the parent non-zero elements.

Abstract: A method for manufacturing a microelectronic package (1) comprises the steps of providing at least two members (10, 11, 16) comprising electrically conductive material; providing a microelectronic device (15); placing the electrically conductive members (10, 11, 16) and the microelectronic device (15) in predetermined positions with respect to each other, and establishing electrical connections between each of the electrically conductive members (10, 11, 16) and the microelectronic device (15); and providing a non-conductive material for encapsulating the microelectronic device (15) and a portion of the electrically conductive members (10, 11, 16) connected thereto. The electrically conductive members (10, 11, 16) are intended to be used for realizing contact of the microelectronic device (15) arranged inside the package (1) to the external world.

Abstract: A method of manufacturing a MEMS device comprises forming a MEMS device element (14). A sacrificial layer (20) is provided over the device element and a package cover layer (22) is provided over the sacrificial layer. The sacrificial layer is removed using at least one opening (22) in the cover layer and the at least one opening (24) is sealed by an anneal process.

Abstract: A bus driver circuit for driving a bus voltage is provided. The bus driver circuit comprises: a bus line output (CANL) the bus voltage of which is driven by the bus driver circuit; a first transistor (M1) having a gate, the voltage at the gate of the first transistor (M1) determining the bus voltage at the bus line output (CANL); a first capacitor (C1) connected to the gate of the first transistor (M1) for driving the voltage at the gate of the first transistor (M1); a first switch (S1) connecting/disconnecting the first capacitor (C1) to a first voltage source (Vgm) via a first RC network comprising at least one resistor and at least one capacitor; and a second switch (S2) connecting/disconnecting the first capacitor (C1) to a predetermined fixed potential (GND 2) for discharging the first capacitor (C1) via a second RC network comprising at least one resistor and at least one capacitor. The first switch (S1) and the second switch (S2) are complementarily driven by a signal (TxD) on a data line.

Abstract: A system and method for processing data utilizes a matrix of processing units using an array of commands stored in memory to process input data words to generate output data words, which can be used in various applications.

Abstract: A visual prosthesis implant (1) is provided which comprises an SIMD-based processor array (6) adapted for receiving image signals from an image sensor (5) and outputting processed signals, and a bio-compatible electrode implant (7) receiving the processed signals and adapted for coupling to neurons. Using the SIMD-based processor array (6) provides high performance at small power dissipation and small chip area such that a fully implantable is visual prosthesis is achieved.

Abstract: A method of streaming data from a server (S) at a server data rate (Cs) via a network to at least one terminal at a terminal reception data rate (Crec) is provided. A streaming section from the server (S) is requested by the terminal (T). Streaming data is forwarded from the server (S) to the network (N) at a server data rate (Cs) and from the network (N) to the terminal (T) at a reception data rate (Crec). Data received from the network (N) is buffered in the terminal buffer (AL) for at least a first period. The rendering of the buffered data is initiated after the first period at a first rendering rate (Cren), which is lower than the server data rate (Cs) or the reception data rate (Crec). The first rendering data rate (Cren) is adapted according to the filling of the terminal buffer (AL) with received streaming data until the rendering data rate (Cren) corresponds to the server data rate (Cs).

Abstract: The present invention discloses a programmable device (10) comprising a controller (14) for processing a sequence of program instructions to control the programmable device; and a near field communication device (12) for retrieving the program instructions from at least one transmission tag (24) and for providing the controller (14) with the retrieved sequence of program instructions. In an embodiment, the controller (14) is arranged to receive individual instructions from respective transmission tags (24). This facilitates the programming of the device (10) by means of instruction-carrying transmission tags, which, amongst others, allows for easy programming of programmable toys such as robots.

Abstract: A wireless interconnect for an integrated circuit and a method of making the wireless interconnect. The interconnect includes a first antenna and a second antenna arranged over a plurality of electrically conductive interconnects. The interconnect also includes a propagation layer. The first and second antennae are arranged in between the propagation layer and the electrically conductive interconnects.

Abstract: A sigma-delta modulator (400) 400, 500, 600) for converting an input signal (X(s)) (X(s)) to a quantized output signal (Y(z)) (Y(z)), in which a feedback loop is provided between a filter (402) and a quantizer (403) of the modulator, the feedback loop configured to reduce quantization errors from the modulator by filtering and subtracting quantization noise fed back to an input of the quantizer (403).

Abstract: A semiconductor device eg. a MOSFET (1) comprising a substrate (40) including a first region (18) and a second region (16) of a first conductivity type and a third region (42) between the first and second regions of a type opposite to the first conductivity type, and being covered by a dielectric layer (20), a plurality of trenches (12) laterally extending between the third and second region, said trenches being filled with an insulating material, and being separated by active stripes (14) comprising a doping profile having a depth not exceeding the depth of the trenches wherein each trench terminates before reaching the dielectric layer (20),namely is separated from the third region by a substrate portion (26) such that the respective boundaries between the substrate portions and the trenches are not covered by the dielectric layer. A method for manufacturing such a semiconductor device is also disclosed.

Abstract: The invention relates to a semiconductor device (30) comprising a substrate (1), a semiconductor body (25) comprising a bipolar transistor that comprises a collector region (3), a base region (4), and an emitter region (15), wherein at least a portion of the collector region (3) is surrounded by a first isolation region (2, 8), the semiconductor body (25) further comprises an extrinsic base region (35) arranged in contacting manner to the base region (4). In this way, a fast semiconductor device with reduced impact of parasitic components is obtained.

Abstract: A container (100) is disclosed comprising a compartment (110); a controller (120) for controlling access to the compartment (110); a near-field communication device (130) for providing the controller (120) with identification information, said controller (120) being responsive to said identification information, wherein the near-field communication device (130) comprises a plurality of antennae (132), each of said antennae being accessible in a different surface area of the container (100). The container (100) may be used in games using near-field communication (NFC) technology, such as a NFC-based version of pass the parcel. An electronic game system (300) comprising such a container and a game controller (200) for use in such an electronic game system (100) are also disclosed.

Abstract: An electronic circuit (1) comprises an input stage (2) and a driver stage (3). The input stage (2) comprises first, second, third and fourth inputs (In1-In4), and is configured to generate a first intermediate signal (Int1) which is the sum or the weighted sum of the first and third input signals (In1, In3), and a second intermediate signal (Int2) which is the sum or the weighted sum of the second and fourth input signals (In2, In4). The driver stage (3) comprises an output (OUT), is configured to generate an output signal (6) present at the output (OUT), and is configured to directly compare the first and second intermediate signals (Int1, Int2) such that the output signal (6) indicates which of the two intermediate signals (Int1, Int2) is larger.

Abstract: An edge rate suppression circuit arrangement is provided for operation with an open drain bus. The circuit arrangement includes a variable resistive circuit having an input for receiving a variable voltage signal and an output coupled to the open drain bus, and a control circuit configured to operate the variable resistive circuit. The control circuit operates the variable resistive circuit in respective high and low resistance states in response to the variable voltage signal.

Abstract: An amplifier circuit, comprising a differential input stage (M1, M2), two cross-coupled current mirrors (M3, M4; M5, M6) coupled to respective outputs of the differential input stage (M1, M2), and a minimum selector circuit (M11, M12, M13, M14) coupled to outputs of the current mirrors.

Abstract: An electric circuit (30) for generating a clock-sampling signal (CLK) for a sampling device (31) comprises a clock generator (1, 40, 50, 60) for generating a plurality of clock signals (21-24, 51-54, 61-64), a correlation device (L) for correlating a characteristic signal section (LE) of a digital signal (DS) with the plurality of clock signals (21, 22, 23, 24, 51-56, 61-64), and a selecting device (MX) for selecting one of the clock signals (21, 22, 23, 24, 51-55, 61-64) as the clock-sampling signal (CLK) for the sampling device (31) on the basis of the correlation by the correlation device (L). The clock signals (21-24, 51-54, 61-64) have the same cycle duration (T) and are phase-shifted with respect to each other. The sampling device (31) subsequently samples the digital signal (DS) with the clock-sampling signal (CLK).

Abstract: An antenna arrangement comprises a ground plane (14) and a planar antenna element (30) mounted spaced from and parallel to the ground plane. An open-ended slot (16) is provided in the ground plane (14), the slot being coextensive with an edge portion of the ground plane and having a first end (18) opening into the edge portion of the ground plane and a second closed end (20). An antenna feed (22) is coupled to the slot at a location intermediate the first and second ends. The planar antenna element is connected by an electrically conductive wall (28) to the edge portion of the ground plane, the wall (28) being co-extensive with the slot (16). The combination of the slot shape, slot location and the wall serves to increase the bandwidth of the antenna arrangement.

Abstract: A personal cooling fan is integrated into a mobile electronic device (110, 210, 310). The mobile electronic device (110, 210, 310) has a vibration alert system that includes control circuitry (140, 340) to control a vibration motor (120, 320), and the personal cooling fan system is also controlled by the control circuitry (140, 340). The personal cooling fan system includes a rotary motor (130, 320) contained within a housing (112, 212, 110 312) of the device, a drive shaft (150, 250, 350) having a first portion engaged by the rotary motor (130, 320) and having a second portion protruding from the housing (112, 212, 312), and fan blades (160, 260, 360) removably attached to the second portion of the drive shaft (150, 250, 350) such that the rotary motor (130, 320) is operable to rotate the drive shaft (150, 250, 350) thereby spinning the fan blades (160, 260, 360).

Abstract: Consistent with an example embodiment, a wirebonding process comprises forming a bond pad with a roughened upper surface, lowering a copper wirebond ball onto the roughened bond bad, and applying a force to the wirebond ball against the roughened surface, A heat treatment is applied to form the bond between the wirebond ball and the roughened surface, wherein the bond is formed without use of ultrasonic energy. This process avoids the use of ultrasonic welding and thereby reduces the occurrence of microcracks and resulting Chip Out of the Bond (COUB) and Metal Peel Off (MPO) failures. The roughened surface of the bond pad improves the reliability of the connection.