Abstract: A method of calculating the x-coordinate(xM) of a point mapping in an elliptic curve Diffie-Hellman key exchange protocol (EC-DHKF), wherein the point mapping is defined as sG+H, where sG is a point (xS,yS) on an elliptic curve and H is a point (xH,yH) on the elliptic curve, including: computing V=yS2 based upon the elliptic curve and xS; computing W=yH2 based upon the elliptic curve and xH; computing U=sqrt(W·V)mod p, where p is a large prime number; choosing U?=U or U?=p?U such that U? based upon a characteristic agreed upon by the parties to the EC-DHKF; computing xM based upon V, W, U?, xS, xH, and p.

Abstract: In accordance with a first aspect of the present disclosure, a biometric sensing system is provided, comprising: a sensor module configured to generate sensing data; a processing unit configured to process data received from said sensor module; wherein the sensor module and the processing unit are communicatively coupled to each other via a universal synchronous asynchronous receiver transmitter (USART) communication interface. In accordance with a second aspect of the present disclosure, a corresponding communication method is conceived. In accordance with a third aspect of the present disclosure, a corresponding computer program is provided.

Abstract: According to a first aspect of the present disclosure, a fingerprint sensing system is provided, comprising: a sensing unit configured to measure a physical property of a sensing cell and to produce a voltage in dependence on said physical property; and an analog-to-digital converter configured to convert said voltage into a digital signal, wherein said analog-to-digital converter implements a non-linear conversion function. According to a second aspect of the present disclosure, a corresponding fingerprint sensing method is conceived. According to a third aspect of the present disclosure, a corresponding computer program product is provided.

Abstract: A method is provided for secure firmware provisioning of a device. In the method, an integrated circuit (IC) is manufactured by a first entity for use in the device. The IC is provided to a second entity for manufacturing the device using the IC. The IC has a unique identifier (UID) and secret key derivation data (KDD). A secure memory is provided to a third entity. The secure memory has a first key pair, and the secure memory is used with a firmware provisioning toolchain of the second entity. During manufacturing of the device by the second entity, the secure memory is enabled to verify the IC by verifying the UID. The secure memory stores a firmware decryption key, and is enabled to encrypt the firmware decryption key. The encrypted firmware decryption key is then provided to the IC, and the IC decrypts the encrypted firmware decryption key for use by the IC in decrypting the firmware.

Abstract: Various embodiments are directed to electrostatic discharge (ESD) protection apparatus comprising a bipolar junction transistor (BJT) having terminals, a field-effect transistor (FET) having terminals, and a common base region connected to a recombination region. The BJT and the FET are integrated with one another and include a common region that is shared by the BJT and the FET. The BJT and FET collectively bias the common base region and prevent triggering of the BJT by causing a potential of the common base region to follow a potential of one of the terminals of the BJT in response to an excessive but tolerable non-ESD voltage change at one or more of the terminals.

Abstract: A system for simultaneously driving a plurality of antennas for transmission of an electromagnetic wave includes a first terminal, a second terminal, a first driver coupled to the first terminal, and a second driver coupled to the second terminal. The system includes a circuit configured to generate an indication of a phase difference between a first current through the first terminal and a second current through the second terminal. The system includes a control circuit configured to enable the first driver and the second driver to concurrently drive a first signal through the first terminal and a second signal through the second terminal, respectively, and configured to adjust a delay between the first signal and the second signal based on the indication of the phase difference and a predetermined target phase difference.

Abstract: A linear regulator is disclosed, comprising: a transistor having a control terminal, a first main terminal being a supply terminal connected to a supply input, and a second main terminal being an output terminal configured to provide a regulated output at an output connection; an error amplifier having a reference input, a feedback input and an output connected to the control terminal; a reference current source; a reference circuit configured to provide a reference voltage to the reference input from the reference current source; and a feedback circuit from the second main terminal through a feedback resistance (Rfb) and configured to provide a feedback voltage to the feedback input of the error amplifier; wherein the feedback circuit and the reference circuit include a common resistance (Rtail, Rd3), and at least one of the reference circuit and the reference circuit comprises a capacitive path (Cref) to a ground.

Abstract: A successive approximation register, SAR, analog-to-digital converter, ADC, (400) is described. The SAR ADC (400) includes: an analog input signal (410); an ADC core (414) configured to receive the analog input signal (410) and comprising: a digital to analog converter, DAC (430) located in a feedback path; and a SAR controller (418) configured to control an operation of the DAC (430), wherein the DAC (430) comprises a number of DAC cells, arranged to convert a digital code from the SAR controller (418) to an analog form; a digital signal reconstruction circuit (450) configured to convert the digital codes from the SAR controller (418) to a binary form; and an output coupled to the digital signal reconstruction circuit (450) and configured to provide a digital data output (460).

Abstract: One example discloses a vibration sensor, comprising: an RF receiver circuit configured to receive an RF input signal; an RF signal characterization circuit configured to measure an attribute of the RF input signal over a set time-period; wherein the attribute of the RF input signal varies based on a physical motion between the vibration sensor and an RF source transmitting the RF input signal; and a vibration profiling circuit configured to map the attribute of the RF input signal to a vibration level.

Abstract: A power converter including a buck converter to receive input power and set operating voltages of the power converter, a current sensing circuit to determine an input current of the power converter, a charge pump circuit to store charge delivered by the voltage regulation circuit and output to a load and to a battery pack a current larger than the input current, and a battery pack controller to control switching and provide feedback within the power converter.

Abstract: Embodiments of a method and a device are disclosed. In an embodiment, a method for operating a wired communications device involves including a frame boundary bit sequence and a random data sequence as a preamble of a bit stream, encoding the bit stream into an encoded bit stream, and transmitting the encoded bit stream using the wired communications device.

Abstract: Embodiments of a method and a device are disclosed. In an embodiment, a method for operating a wired communications device involves performing a bit mapping operation on an input bit stream to generate a mapped bit stream, performing a bit scrambling operation in response to the mapped bit stream to generate a scrambled bit stream, generating an encoded bit stream in response to the scrambled bit stream, and transmitting the encoded bit stream using the wired communications device.

Abstract: Certain aspects of the disclosure are directed to electrostatic discharge protection of an integrated circuit clock. According to a specific example, circuitry includes a direct-current power supply, a voltage-controlled oscillation (VCO) circuit, an electrostatic protection circuit, and a voltage regulator. The VCO circuit has an oscillation frequency and includes an amplification circuit and capacitance circuitry. The electrostatic protection circuit is arranged to connect power to the VCO circuit while reducing variation in the oscillation frequency of the VCO circuit resulting from electrostatic energy. The voltage regulator is connected between the direct-current power supply and a power supply connection at which the direct-current power is connected to the VCO, and is configured to mitigate an imbalance of electric charges from adversely altering a tuning capacitance of the VCO established by the capacitance circuitry.

Abstract: The disclosure relates to a dual-interface integrated circuit (IC) card module for use in a dual-interface IC card. Embodiments disclosed include a dual-interface integrated circuit card module (150), the module comprising: a substrate (104) having first and second opposing surfaces; a contact pad (102) on the first surface of the substrate; an integrated circuit (110) on the second surface of the substrate (104), the integrated circuit (110) having electrical connections to the contact pad (102) through the substrate (104); and a pair of antenna pads (108) disposed in recesses (103) in the second surface of the substrate (104) and electrically connected to corresponding antenna connections on the integrated circuit (110).

Abstract: Embodiments of methods and systems for automatic power control (APC) in a communications device that communicates via inductive coupling are described. In an embodiment, a method for APC in a communications device that communicates via inductive coupling involves obtaining multiple system parameters, determining an APC configuration of the communications device from the system parameters, and controlling a transmission configuration of the communications device based on the APC configuration. Other embodiments are also described.

Abstract: A method and apparatus are provided for controlling a vehicle travelling in a platoon. A first set of information is received at a first vehicle in a platoon, the first set of information relating to at least one other vehicle in the platoon. One of a plurality of control algorithms is selected in dependence on the first set of information, wherein each of the plurality of control algorithms correspond to a respective platoon communication topology. The first vehicle is controlled in response to the first set of information and the selected one of the control algorithms.

Abstract: A network node for a wireless network comprises a processor, a memory and an antenna. The network node is operable to generate a random or pseudo-random number and to assign said number as an address for identifying said node to other nodes in said network.

Abstract: A method and operates for generating a boost control signal for a DC-DC-booster is described. An audio signal may be received comprising a plurality of audio sample values. The audio signal may be delayed for a delay time. A maximum-delayed-value of the audio sample values during the delay time may be determined. The boost control signal may be generated from the maximum of the non-delayed audio signal sample value and the maximum-delayed-value.

Abstract: Embodiments of a device and method are disclosed. In an embodiment, a CAN device is disclosed. The CAN device includes a transmit data (TXD) input interface, a TXD output interface, a receive data (RXD) input interface, an RXD output interface and a traffic control system connected between the TXD input and output interfaces and between the RXD input and output interfaces. The traffic control system is configured to detect the presence of classic CAN traffic on the RXD input interface and if the presence of classic CAN traffic is detected on the RXD input interface, emulate an error management protocol of a classic CAN controller in response to signals received on the TXD input interface.

Abstract: A signal processor comprising: a modelling block, configured to receive a frequency-domain-input-signal, a fundamental-frequency-signal representative of a fundamental frequency of the frequency-domain-input-signal; and configured to provide a pitch-model-signal based on a periodic function, the pitch-model-signal spanning a plurality of discrete frequency bins, each discrete frequency bin having a respective discrete frequency bin index, wherein within each discrete frequency bin the pitch-model-signal is defined by: the periodic function; the fundamental frequency; the frequency-domain-input-signal; and the respective discrete frequency bin index. The signal processor further comprises a manipulation block, configured to provide an output-signal based on the frequency-domain-input-signal and the pitch-model-signal.