Abstract: A radar system comprising a transmitter controller, configured to control an oscillator such that the oscillator provides a transmit-radar-signal a transmit-first-overlapping-portion and a transmit-second-overlapping-portion that corresponds to the instantaneous frequency of the transmit-first-frequency-overlapping-portion. The transmitter controller is configured to reconfigure the oscillator from a first-operating-mode to a second-operating-mode between a transmit-first-ramp-frequency-portion and a transmit-second-ramp rising-frequency-portion. The radar system also includes a receiver controller configured to receive a received-radar-signal that represents a reflected version of the transmit-radar-signal, and provide a combined-overlapping-portion based on a combination of the transmit-first-overlapping-portion, the transmit-second-overlapping-portion, a received-first-overlapping-portion, and a received-second-overlapping-portion.

Abstract: An interference sensor device is disclosed. The interference sensor device includes a first conductive plate, a second conductive plate aligned parallel to the first conductive plate, a non-conductive matter between the first conductive plate and the second conductive plate and a coil electrically coupled to the first conductive plate and the second conductive plate.

Abstract: A Field Effect Transistor (FET) capable of operating at high frequencies and includes comb-shaped source and drain electrodes. The comb-shaped drain electrode includes a plurality of thin comb-shape drain electrode layers at corresponding levels of the FET, each comb-shaped drain electrode layer including a plurality of drain electrode fingers having substantially the same width as the comb-shaped drain electrodes of each other layer. The comb-shaped source electrode includes a plurality of comb-shape source electrode layers at the corresponding levels, each comb-shaped drain electrode layer including a plurality of drain electrode fingers having substantially the same width as the comb-shaped source electrodes of each other layer. In addition, the inter-level retraction of adjacent drain electrode layers is the same or substantially the same. Similarly, the inter-level retraction of adjacent source electrode layers is the same or substantially the same.

Abstract: The disclosure relates to an integrated circuit for a radio-frequency identification (RFID) tag. Example embodiments include an integrated circuit (101) for an RFID tag, the integrated circuit (101) comprising: a memory (104) for storing data; a transceiver (107) for receiving signals from, and transmitting signals to, an antenna (102); and a controller (103) configured to process signals received via the transceiver (107) and to access data stored in the memory (104); wherein upon receiving, via the transceiver module (107), a lock command referring to a data block in the memory (104), the controller (103) is configured to generate error correction data for the data block and to store the error correction data in the memory.

Abstract: An embedded system is described. The embedded system includes a processing circuit comprising at least one processor configured to support an implementation of a non-power-of-2 fast Fourier transform of length N using a multiplication of at least two smaller FFTs of a respective first length N1 and second length N2, where N1 and N2 are whole numbers; and a memory, operably coupled to the processing circuit and comprising at least input data.

Abstract: An apparatus can include a first circuit that is configured to provide electrostatic discharge (ESD) protection against an ESD pulse applied between a first node and a second node. The first circuit includes a series stack of bipolar transistors that are configured to shunt current between the first and second nodes in response to the ESD pulse; and a diode connected in series with the stack of bipolar transistors and configured to lower a snapback holding voltage of the first circuit when shunting current between the first and second nodes.

Abstract: A matching network is integrated into a multilayer surface mount device containing an RFID integrated circuit to provide both an antenna and a matching network for the RFID integrated circuit in the ultra high frequency regime. The surface mount device may be mounted on a printed circuit board to provide RF and RFID functionality to the printed circuit board.

Abstract: A method for localizing a wireless node includes synchronizing a respective time reference of a plurality of wideband spectrum-sensing units and a master transceiver. A sensing location of each wideband spectrum-sensing unit is stored in a first memory. Each wideband spectrum-sensing unit stores in a second memory a plurality of time-limited samples of a transmission received from a slave transceiver. The time limit of the transmission is determined by the master transceiver, receiving the transmission. The samples from the second memory are correlated with a corresponding plurality of reconstructed samples stored in the first memory to form a respective power delay profile for each of the of the wideband spectrum-sensing units. A slave location of the slave transceiver is determined by applying a Time Difference Of Arrival method to the respective power delay profiles.

Abstract: A receiver circuit comprising an averaging-processing-block that is configured to receive an OFDM signal. The OFDM signal comprises a plurality of sample-values, wherein the sample-values comprise: a middle-sample-value; a lower-sample-value-group; and a higher-sample-value-group. The averaging-processing-block can determine an averaged-sample-value for the middle-sample-value by performing an averaging operation on the sample-values of the lower-sample-value-group and the higher-sample-value-group, but not on the middle-sample-value.

Abstract: The disclosure relates to range-determining-module for a transceiver, configured to: receive a signal comprising a received-data-packet, identify a plurality of known-sequence-sections of the received-data-packet, each known-sequence-section containing a known-data-sequence that is known to the range-determining-module; determine a reception-time-stamp associated with each of the plurality of known-sequence-sections; verify the received-data-packet using the reception-time-stamps associated with different respective known-sequence-sections of the received-data-packet; and provide a verified range estimate in accordance with one or more of the time stamps of the verified received-data-packet.

Abstract: A method of obscuring the input and output of a modular exponentiation function, including: receiving modular exponentiation parameters including an exponent e having N bits and a modulus m; generating randomly a pre-multiplier; calculating a post-multiplier based upon the pre-multiplier, exponent e, and modulus m; multiplying an input to the modular exponentiation function by the pre-multiplier; performing the modular exponentiation function; and multiplying the output of the modular exponentiation function by the post-multiplier, wherein multiplying an input to the modular exponentiation function by the pre-multiplier, performing the modular exponentiation function, and multiplying the output of the modular exponentiation function by the post-multiplier are split variable operations.

Abstract: According to a first aspect of the present disclosure, an electronic device for use in a touch-based user interface is provided, the electronic device comprising a first capacitor, a second capacitor, a third capacitor, and an analog-to-digital converter, wherein: the first capacitor and the second capacitor are switchably coupled to each other; the first capacitor is switchably coupled to an input of the analog-to-digital converter; the second capacitor is coupled to the input of the analog-to-digital converter; the third capacitor is coupled to the first capacitor; the third capacitor is switchably coupled to the second capacitor; the third capacitor is switchably coupled to the input of the analog-to-digital converter. According to a second aspect of the present disclosure, a corresponding method of manufacturing an electronic device for use in a touch-based user interface is conceived.

Abstract: A gesture recognition device (100) for recognising gestures made by a user is disclosed. The device comprises a gesture detector for detecting a gesture made be a user and a gesture analysis block, the gesture analysis block comprising a memory configured to store known gestures, and a pattern recognition block configured to associate a gesture detected by the gesture detector with a known gesture stored in the memory. The device (100) further comprises a magnetic field generator for interacting with a wearable tag (200), the magnetic field generator configured to provide a magnetic force (202) on the wearable tag (200) when a particular gesture is recognised by the gesture analysis block.

Abstract: It is described an arrangement (560, 660, 760) for fingerprint sensing/verification, comprising: a sensor system (100) comprising plural sensor capacitors (101), each sensor capacitor including a central electrode (103) and a peripheral electrode (105) annularly surrounding the central electrode and being connected to a ground potential; wherein changes of the electric fields between each of the central electrode and the peripheral electrode of the plural sensor capacitors upon positioning a finger (317) close to the sensor system is used to detect the fingerprint.

Abstract: According to a first aspect of the present disclosure, a fingerprint sensing system is provided, comprising: at least one sensing element configured and arranged to generate a sensing characteristic; a detection unit configured and arranged to detect changes of said sensing characteristic over time; a processing unit configured and arranged to determine if the changes of said sensing characteristic substantially conform to a predefined liveness function. According to a second aspect of the present disclosure, a corresponding fingerprint sensing method is conceived. According to a third aspect of the present disclosure, a corresponding computer program product is provided.

Abstract: Signal equalization is provided, according to certain aspects, by a frequency-domain equalization circuit, a noise-whitening filter and a noise predictor. A sequencer is used to control ordering of the equalization circuit, a noise-whitening filter and a noise predictor. The equalization circuit provides equalization the frequency domain by converging on symbols of the input signal. The noise-whitening filter and the noise predictor filter colored noise from a signal responsive to the equalization circuit. The sequencer controls operation of the noise-whitening filter by detecting an indication of convergence of the symbols from input signal and causing the noise-whitening filter to commence suppression of colored noise from a signal derived from an output by the equalization circuit.

Abstract: The disclosure relates to a dual-interface integrated circuit (IC) card.

Abstract: A power supply ready indicator circuit is described. The power supply ready indicator circuit includes a first power-supply-ready-input interfacing with a first power supply rail; a second power-supply-ready-input interfacing with a second power supply rail; and a power ready indicator output. The power supply ready indicator circuit is configured to divide the voltage on the first power supply rail, and to compare the divided voltage with the second power supply rail voltage. The power supply ready indicator circuit generates a power ready signal on the power ready indicator output in response to the divided voltage value being greater than the second power supply rail voltage value. The final value of the first power supply rail voltage is greater than the final value of the second power supply rail voltage.

Abstract: Various embodiments relate to a method for classifying received radio frequency signals, including: receiving an input signal; matched filtering the input signal to produce a correlation result signal; sampling the correlation result signal at a plurality of half-bit-grids and a plurality of bit-grids to produce a set of modulated phase correlation result samples and a set of non-modulated phase correlation result samples; calculating a minimum of the set of modulated phase correlation result samples; calculating a maximum of the set of non-modulated phase correlation result samples; and classifying the input signal as valid data or collision data based on the minimum and the maximum.

Abstract: There is disclosed a method for managing content, including generating, by a service provider, an authenticable management script configured to manage content comprised in a secure element; providing, by the service provider, the authenticable management script to the secure element. Furthermore, there is disclosed a method for managing content, comprising: receiving, by a secure element, an authenticable management script for managing content comprised in the secure element; authenticating, by the secure element, the authenticable management script; executing, by the secure element, the management script if the management script is authentic. Furthermore, there are disclosed corresponding computer program products and a corresponding secure element.