Abstract: An interactive, multi-user media delivery system having a number of media storage mediums, each of containing a particular media selection, and a number of media players structured to selectively deliver the media selection to users. Each of the media players includes a control assembly structured to selectively control and regulate delivery of the media selection to the user, and at least one of the media players is selectively designatable as a slave unit. A master control assembly is further provided and is operatively associated with the media players, a connectivity assembly being included to establish a communicative link at least between the slave unit(s) and the master control assembly. The master control assembly is further structured to receive synchronization data from each of the media players, and to simultaneously and uniformly control the delivery of the media selection by the media players.

Abstract: A field programmable object array integrated circuit has video data compression capability. The integrated circuit comprises an array of programmable objects and a video compression co-processor communicatively coupled to the array of objects. The video compression co-processor comprises a set of search engines and a subpixel engine. The subpixel engine can interpolate subpixels from integer pixels and shift the integer pixels by a predetermined number of subpixels. The search engines can perform a plurality of sum of absolute differences (SAD) computations between search window pixels and macroblock pixels to locate the best SAD value using either integer pixels and/or the interpolated subpixels.

Abstract: A method and system for managing awareness information relating to a mobile device's visibility with respect to other buddy devices, the system comprising; the mobile device, a mobile application listing one or more buddies, an application listener which tracks the one or more buddies zoom operations and radar zoom factors, and a server, the server comprising an encounter manager, an approach manager and a notification marshalling system.

Abstract: An item of information (212) is transmitted to a distal computer (220), translated to a different sense modality and/or language (222), and in substantially real time, and the translation (222) is transmitted back to the location (211) from which the item was sent. The device sending the item is preferably a wireless device, and more preferably a cellular or other telephone (210). The device receiving the translation is also preferably a wireless device, and more preferably a cellular or other telephone, and may advantageously be the same device as the sending device. The item of information (212) preferably comprises a sentence of human of speech having at least ten words, and the translation is a written expression of the sentence. All of the steps of transmitting the item of information, executing the program code, and transmitting the translated information preferably occurs in less than 60 seconds of elapsed time.

Abstract: In a secure network where the network characteristics are not known, a call admission control algorithm and a preemption control algorithm based on a destination node informing the source node of the observed carried traffic are used to regulate the amount of traffic that needs to be preempted by the source. The amount of traffic that needs to be preempted is based on the carried traffic measured at the destination node. The traffic to be preempted is based on the priority of the traffic, where the lowest priority traffic is the first to be preempted until the amount of traffic preempted is sufficient to allow the remaining traffic to pass through the network without congestion.

Abstract: A field programmable object array integrated circuit has video data compression capability. The integrated circuit comprises an array of programmable objects and a video compression co-processor communicatively coupled to the array of objects. The video compression co-processor comprises a set of search engines and a subpixel engine. The subpixel engine can interpolate subpixels from integer pixels and shift the integer pixels by a predetermined number of subpixels. The search engines can perform a plurality of sum of absolute differences (SAD) computations between search window pixels and macroblock pixels to locate the best SAD value using either integer pixels and/or the interpolated subpixels.

Abstract: An item of information (212) is transmitted to a distal computer (220), translated to a different sense modality and/or language (222), and in substantially real time, and the translation (222) is transmitted back to the location (211) from which the item was sent. The device sending the item is preferably a wireless device, and more preferably a cellular or other telephone (210). The device receiving the translation is also preferably a wireless device, and more preferably a cellular or other telephone, and may advantageously be the same device as the sending device. The item of information (212) preferably comprises a sentence of human of speech having at least ten words, and the translation is a written expression of the sentence. All of the steps of transmitting the item of information, executing the program code, and transmitting the translated information preferably occurs in less than 60 seconds of elapsed time.

Abstract: A method and system for managing awareness information relating to a mobile device's visibility with respect to other buddy devices, the system comprising; the mobile device, a mobile application listing one or more buddies, an application listener which tracks the one or more buddies zoom operations and radar zoom factors, and a server, the server comprising an encounter manager, an approach manager and a notification marshalling system.

Abstract: Different numbers of delay slots are assigned by a compiler/scheduler to each different type of jump operation in a pipelined processor system. The number of delay slots is variable and kept to the minimum needed by each type of jump operation. A compatible processor uses a corresponding number of branch delay slots to exploit the difference in predictability of different types of branch or jump operations. Different types of jump operations resolved their target addresses in different numbers of delay slots. As a result, the compiler/scheduler is able to generate more efficient code than for a processor with a fixed number of delay slots for all jump types, resulting in better processor performance.

Abstract: A technique is provided for use in a handheld multimedia device that uses the historical load profile statistics of a particular multimedia stream to dynamically scale the computational power of a computing engine, depending upon the complexity of the multimedia content and thereby reduce the power consumption for computationally less intensive content and consequently reduce the power consumption by a significant amount over a duration of time.

Abstract: The invention provides for a method of encrypting and executing an executable image, comprising; flagging sections of the executable image to be encrypted using commands in source files and compiling said executable images so as to generate object files, linking one or more of said executable images using a linker to produce a final executable image, passing said linked executable images to a post-linker encryption engine to encrypt a relocation fix-up patch table and sections of executable images flagged for encryption, and at load time decrypting relocating and executing the executable images.

Abstract: A circuit contains a shared memory (12), that is used by a plurality of processing elements (10) that contain cache circuits (102) for caching data from the shared memory (12). The processing elements perform a plurality of cooperating tasks, each task involving caching data from the shared memory (12) and sending cache message traffic. Consistency between cached data for different tasks is maintained by transmission of cache coherence requests via a communication network. Information from cache coherence requests generated for all of said tasks is buffered. One of the processing elements provides an indication signal indicating a current task stage of at least one of the processing elements. Additional cache message traffic is generated adapted dependent on the indication signal and the buffered information from the cache coherence requests. Thus conditions of cache traffic stress may be created to verify operability of the circuit, or cache message traffic may be delayed to avoid stress.

Abstract: A translation lookaside buffer (TLB) is disclosed formed using RAM and synthesisable logic circuits. The TLB provides logic within the synthesisable logic for pairing down a number of memory locations that must be searched to find a translation to a physical address from a received virtual address. The logic provides a hashing circuit for hashing the received virtual address and uses the hashed virtual address to index the RAM to locate a line within the RAM that provides the translation.

Abstract: A compressed instruction format for a VLIW processor allows greater efficiency in use of cache and memory. Instructions are byte aligned and variable length. Branch targets are uncompressed. Format bits specify how many issue slots are used in a following instruction. NOPS are not stored in memory. Individual operations are compressed according to features such as whether they are resultless, guarded, short, zeroary, unary, or binary. Instructions are stored in compressed form in memory and in cache. Instructions are decompressed on the fly after being read out from cache.

Abstract: A multi-threaded processor comprises a processing unit (PU) for concurrently processing multiple threads. A register file means (RF) is provided having a plurality of registers, wherein a first register (LI) is used for storing loop invariant values and N second registers (LVI-LVN) are each used for storing loop variant values. Furthermore N program counters (PCI-PCN) are provided each being associated to one of the multiple threads, wherein N being the number of threads being processed.

Abstract: A data processing apparatus has an instruction memory system arranged to output an instruction word addressed by an instruction address. An instruction execution unit, processes a plurality of instructions from the instruction word in parallel. A detection unit, detects in which of a plurality of ranges the instruction address lies. The detection unit is coupled to the instruction execution unit and/or the instruction memory system, to control a way in which the instruction execution unit parallelizes processing of the instructions from the instruction word, dependent on a detected range. In an embodiment the instruction execution unit and/or the instruction memory system adjusts a width of the instruction word that determines a number of instructions from the instruction word that is processed in parallel, dependent on the detected range.

Abstract: A data processing apparatus has an instruction memory system arranged to output an instruction word addressed by an instruction address. An instruction execution unit, processes a plurality of instructions from the instruction word in parallel. A detection unit, detects in which of a plurality of ranges the instruction address lies. The detection unit is coupled to the instruction execution unit and/or the instruction memory system, to control a way in which the instruction execution unit parallelizes processing of the instructions from the instruction word, dependent on a detected range. In an embodiment the instruction execution unit and/or the instruction memory system adjusts a width of the instruction word that determines a number of instructions from the instruction word that is processed in parallel, dependent on the detected range.

Abstract: A technique is provided for use in a handheld multimedia device that uses the historical load profile statistics of a particular multimedia stream to dynamically scale the computational power of a computing engine, depending upon the complexity of the multimedia content and thereby reduce the power consumption for computationally less intensive content and consequently reduce the power consumption by a significant amount over a duration of time.

Abstract: A technique is provided for use in a handheld multimedia device that uses the historical load profile statistics of a particular multimedia stream to dynamically scale the computational power of a computing engine, depending upon the complexity of the multimedia content and thereby reduce the power consumption for computationally less intensive content and consequently reduce the power consumption by a significant amount over a duration of time.

Abstract: An electronic device is provided with at least one functional unit (HB) performing a processing, wherein the functional unit (HB) receives a supply current (Isupply). A supply current monitor (SCM) is provided for monitoring the supply current (Isupply) to determine an average supply current (Iavg). A characterization unit (CU) is provided for determining a first relation between the averaged supply current (Iavg) and an operation frequency of the functional unit and/or for determining a second relation between a workload of the functional unit (HB) and the average supply current (Iavg) of the functional unit (HB). Furthermore, a slope calculation unit (SCU) is provided for determining the slope of the first and/or second relation. The operation of the functional unit (HB) is controlled according to the results of the slope calculation unit (SCU).