Patents Assigned to Octec, Inc.
  • Patent number: 10109501
    Abstract: A semiconductor device having a voltage resistant structure in a first aspect of the present invention is provided, comprising a semiconductor substrate, a semiconductor layer on the semiconductor substrate, a front surface electrode above the semiconductor layer, a rear surface electrode below the semiconductor substrate, an extension section provided to a side surface of the semiconductor substrate, and a resistance section electrically connected to the front surface electrode and the rear surface electrode. The extension section may have a lower permittivity than the semiconductor substrate. The resistance section may be provided to at least one of the upper surface and the side surface of the extension section.
    Type: Grant
    Filed: September 1, 2017
    Date of Patent: October 23, 2018
    Assignees: FUJI ELECTRIC CO., LTD., Octec, Inc.
    Inventors: Koh Yoshikawa, Haruo Nakazawa, Kenichi Iguchi, Yasukazu Seki, Katsuya Okumura
  • Patent number: 9786749
    Abstract: A semiconductor device having a voltage resistant structure in a first aspect of the present invention is provided, comprising a semiconductor substrate, a semiconductor layer on the semiconductor substrate, a front surface electrode above the semiconductor layer, a rear surface electrode below the semiconductor substrate, an extension section provided to a side surface of the semiconductor substrate, and a resistance section electrically connected to the front surface electrode and the rear surface electrode. The extension section may have a lower permittivity than the semiconductor substrate. The resistance section may be provided to at least one of the upper surface and the side surface of the extension section.
    Type: Grant
    Filed: September 29, 2016
    Date of Patent: October 10, 2017
    Assignees: FUJI ELECTRIC CO., LTD., Octec, Inc.
    Inventors: Koh Yoshikawa, Haruo Nakazawa, Kenichi Iguchi, Yasukazu Seki, Katsuya Okumura
  • Patent number: 9035453
    Abstract: A semiconductor device that improves the heat cycle resistance and power cycle resistance of a power module. An electrode member in which copper posts are formed in a plurality of perforations cut in a support made of a ceramic material is soldered onto a side of an IGBT where an emitter electrode is formed. By soldering the copper posts onto the electrode, heat generated in the IGBT is transferred to the electrode member and is radiated. In addition, even if a material of which the IGBT is made and copper differ in thermal expansivity, stress on a soldered interface is reduced and distortion is reduced. This suppresses the appearance of a crack. As a result, the heat cycle resistance and power cycle resistance of a power module can be improved.
    Type: Grant
    Filed: November 30, 2012
    Date of Patent: May 19, 2015
    Assignees: OCTEC, INC., FUJI ELECTRIC CO., LTD., KYOCERA CORPORATION
    Inventors: Katsuya Okumura, Yoshikazu Takahashi, Kazunori Takenouchi
  • Patent number: 8531007
    Abstract: A semiconductor device is disclosed which includes active section 100, edge termination section 110 having a voltage blocking structure and disposed around active section 100, and separation section 120 having a device separation structure and disposed around edge termination section 110. A surface device structure is formed on the first major surface of active section 100, trench 23 is formed in separation section 120 from the second major surface side, and p+-type separation region 24 is formed on the side wall of trench 23 such that p+-type separation region 24 is in contact with p-type channel stopper region 21 formed in the surface portion on the first major surface side and p-type collector layer 9 formed in the surface portion on the second major surface side. The semiconductor device and the method for manufacturing the semiconductor device according to the invention facilitate preventing the reverse blocking voltage from decreasing and shorten the manufacturing time of the semiconductor device.
    Type: Grant
    Filed: May 20, 2010
    Date of Patent: September 10, 2013
    Assignees: Octec, Inc., Fuji Electric Co., Ltd.
    Inventors: Katsuya Okumura, Hiroki Wakimoto, Kazuo Shimoyama, Tomoyuki Yamazaki
  • Publication number: 20130093082
    Abstract: A semiconductor device that improves the heat cycle resistance and power cycle resistance of a power module. An electrode member in which copper posts are formed in a plurality of perforations cut in a support made of a ceramic material is soldered onto a side of an IGBT where an emitter electrode is formed. By soldering the copper posts onto the electrode, heat generated in the IGBT is transferred to the electrode member and is radiated. In addition, even if a material of which the IGBT is made and copper differ in thermal expansivity, stress on a soldered interface is reduced and distortion is reduced. This suppresses the appearance of a crack. As a result, the heat cycle resistance and power cycle resistance of a power module can be improved.
    Type: Application
    Filed: November 30, 2012
    Publication date: April 18, 2013
    Applicants: Octec, Inc., Kyocera Corporation, Fuji Electric Co., Ltd.
    Inventors: Octec, Inc., Fuji Electric Co., Ltd., Kyocera Corporation
  • Patent number: 8324726
    Abstract: A semiconductor device that improves the heat cycle resistance and power cycle resistance of a power module. An electrode member in which copper posts are formed in a plurality of perforations cut in a support made of a ceramic material is soldered onto a side of an IGBT where an emitter electrode is formed. By soldering the copper posts onto the electrode, heat generated in the IGBT is transferred to the electrode member and is radiated. In addition, even if a material of which the IGBT is made and copper differ in thermal expansivity, stress on a soldered interface is reduced and distortion is reduced. This suppresses the appearance of a crack. As a result, the heat cycle resistance and power cycle resistance of a power module can be improved.
    Type: Grant
    Filed: February 10, 2006
    Date of Patent: December 4, 2012
    Assignees: Octec, Inc., Fuji Electric Co., Ltd., Kyocera Corporation
    Inventors: Katsuya Okumura, Yoshikazu Takahashi, Kazunori Takenouchi
  • Publication number: 20120244697
    Abstract: A semiconductor device that improves the heat cycle resistance and power cycle resistance of a power module. An electrode member in which copper posts are formed in a plurality of perforations cut in a support made of a ceramic material is soldered onto a side of an IGBT where an emitter electrode is formed. By soldering the copper posts onto the electrode, heat generated in the IGBT is transferred to the electrode member and is radiated. In addition, even if a material of which the IGBT is made and copper differ in thermal expansivity, stress on a soldered interface is reduced and distortion is reduced. This suppresses the appearance of a crack. As a result, the heat cycle resistance and power cycle resistance of a power module can be improved.
    Type: Application
    Filed: June 11, 2012
    Publication date: September 27, 2012
    Applicants: Octec, Inc., Kyocera Corporation, Fuji Electric Device Technology Co., Ltd.
    Inventors: Katsuya Okumura, Yoshikazu Takahashi, Kazunori Takenouchi
  • Patent number: 8021062
    Abstract: A developing apparatus has a substrate holder to hold a substrate, a heater which is provided in a substrate holder, and heats a substrate on a substrate holder for processing a resist film by PEB, a cooler to cool a substrate on a substrate holder, a developing solution nozzle to supply a developing solution to a substrate on a substrate holder, and a controller to control a heater, a cooler and a developing nozzle.
    Type: Grant
    Filed: May 5, 2010
    Date of Patent: September 20, 2011
    Assignees: Tokyo Electron Limited, Octec Inc.
    Inventors: Takanori Nishi, Takahiro Kitano, Katsuya Okumura
  • Patent number: 7994443
    Abstract: A first wiring layer 16 is disposed on an insulating film 14 on the lower surface of an upper substrate 15, while a second wiring layer 13three-dimensionally crossing the first wiring layer 16 is provided on the insulating film 12 on a lower substrate 11. A cantilever 17 has one end connected to the first wiring layer 16 and the other end opposed to the second wiring layer 13 with a space therebetween. A thermoplastic sheet 19 is arranged on the upper substrate 15 so as to cover the through-hole 18. The thermoplastic sheet 19 is pressed by a heated pin 20 against the cantilever 17 and deformed so as to maintain the connection between the cantilever 17and the second wiring layer 13, and therefore close the switch 10.
    Type: Grant
    Filed: March 20, 2006
    Date of Patent: August 9, 2011
    Assignees: Tokyo Electron Limited, Octec Inc.
    Inventors: Masato Hayashi, Masami Yakabe, Tetsuya Hasebe, Muneo Harada, Katsuya Okumura
  • Patent number: 7988429
    Abstract: A chemical liquid supply system that prevents the generation of heat during operation in a pump and allows downsizing the discharge pump for instilling a chemical liquid from a tip nozzle. Compressed air is supplied to an upper space of a resist bottle and the chemical liquid is conferred positive pressure and sent out to a pump chamber of a discharge pump, thereby the pump chamber is filled with a resist liquid. This eliminates the need of a conventional construction where a spring or others are used to drive a flexible membrane of the discharge pump to the operation chamber side to take in the resist liquid. As a result, no electric motor is used, so there is obviously no risk of heat damage to a semiconductor wafer and the discharge pump itself can be further downsized.
    Type: Grant
    Filed: July 29, 2005
    Date of Patent: August 2, 2011
    Assignees: Octec Inc., Tokyo Electron Limited
    Inventors: Katsuya Okumura, Shigenobu Itoh, Tetsuya Toyoda, Kazuhiro Sugata
  • Patent number: 7942647
    Abstract: An opening 22d of a supply/withdrawal passage 22b is positioned at the center part of the internal wall surface 22c of the operating chamber 26 (concave area 22a), and a pin 24 that protrudes toward the diaphragm 23 is provided in a position that is offset from the center of the wall surface 22c. When the diaphragm 23 is deformed toward the operating chamber 26 by the suction of an operation air into the operating chamber 26 during drawing in the chemical liquid, a part of the diaphragm 23 opposing to the pin 24 rides on the pin 24 and this part becomes a slightly convex shape toward the pump chamber 25. When the operation air is supplied from the opening 22d into the operating chamber 26 during the discharge of the chemical liquid, the deformation begins first from the part of the diaphragm 23 riding on the pin 24.
    Type: Grant
    Filed: September 26, 2005
    Date of Patent: May 17, 2011
    Assignees: Octec Inc., CKD Corporation
    Inventors: Katsuya Okumura, Shigenobu Itoh, Kazuhiro Sugata, Kazuhiro Arakawa
  • Patent number: 7922862
    Abstract: A plasma processing apparatus for performing a plasma process on a target substrate includes a process container configured to accommodate the target substrate and to reduce pressure therein. A first electrode is disposed within the process container. A supply system is configured to supply a process gas into the process container. An electric field formation system is configured to form an RF electric field within the process container so as to generate plasma of the process gas. A number of protrusions are discretely disposed on a main surface of the first electrode and protrude toward a space where the plasma is generated.
    Type: Grant
    Filed: July 20, 2009
    Date of Patent: April 12, 2011
    Assignees: Octec Inc., Tokyo Electron Limited
    Inventors: Katsuya Okumura, Shinji Himori, Kazuya Nagaseki, Hiroki Matsumaru, Shoichiro Matsuyama, Toshiki Takahashi
  • Patent number: 7862959
    Abstract: The present invention is a transfer mask for exposure comprising a mask portion having a plurality of cells, each of which an opening of a predetermined pattern is formed in. When one side of the plurality of cells is exposed to a charged particle beam, each of the plurality of cells is adapted to make the charged particle beam pass through itself to the other side thereof based on the pattern of the opening formed in the cell. Thus, when a substrate to be processed is arranged on the other side of the cell, the pattern of the opening formed in the cell is transferred to the substrate to be processed and hence an exposure pattern is formed on the substrate to be processed. The feature of the present invention is that a part of or all the plurality of cells can be exchanged at the mask portion.
    Type: Grant
    Filed: January 10, 2005
    Date of Patent: January 4, 2011
    Assignees: Octec Inc., Tokyo Electron Limited
    Inventors: Katsuya Okumura, Kazuya Nagaseki, Naoyuki Satoh
  • Patent number: 7766341
    Abstract: A seal structure in which a sealing member 510 fitted in the seal holding part 120 is elastically deformed to hermetically seal a flow passage joining portion. The seal holding part 120 opening on a flow passage side and including a first retaining surface 121, a second retaining surface 122, and a circumferential surface 123. The sealing member 510 includes a first surface 511 in contact with the first retaining surface 121, a second surface 512 in contact with the retaining surface 122, and an inner surface 513 located inside the seal holding part 510 and tapered to have a diameter becoming smaller from the first surface 511 side to the second surface 512 side. An engagement portion 515 engaged in the seal holding part 120 is formed protruding from an outer surface 514 located on the circumferential surface 123 side and on the first surface 511 side.
    Type: Grant
    Filed: March 23, 2005
    Date of Patent: August 3, 2010
    Assignees: CKD Corporation, Octec, Inc.
    Inventors: Katsuya Okumura, Shoichi Kitagawa, Shigenobu Itoh, Kazuhiro Sugata, Kazuhiro Arakawa, Hiroshi Tomita
  • Patent number: 7750654
    Abstract: A probe method of this invention includes a step of reducing an electrode of a wafer by using a forming gas, and a step of bringing the electrode and a probe pin into contact with each other in a dry atmosphere. The probe method further includes, prior to a reducing process of an electrode of the object to be tested, placing the object to be tested in an inert gas atmosphere and heating the object to be tested. The reducing process is performed by bringing a reducing gas into contact with the electrode of the object to be tested under atmospheric pressure.
    Type: Grant
    Filed: March 2, 2005
    Date of Patent: July 6, 2010
    Assignees: Octec Inc., Tokyo Electron Limited
    Inventors: Katsuya Okumura, Shigekazu Komatsu, Yuichi Abe, Kunihiro Furuya, Vincent Vezin, Kenichi Kubo
  • Patent number: 7740410
    Abstract: A developing apparatus has a substrate holder to hold a substrate, a heater which is provided in a substrate holder, and heats a substrate on a substrate holder for processing a resist film by PEB, a cooler to cool a substrate on a substrate holder, a developing solution nozzle to supply a developing solution to a substrate on a substrate holder, and a controller to control a heater, a cooler and a developing nozzle.
    Type: Grant
    Filed: July 13, 2005
    Date of Patent: June 22, 2010
    Assignees: Tokyo Electron Limited, Octec Inc.
    Inventors: Takanori Nishi, Takahiro Kitano, Katsuya Okumura
  • Patent number: 7686588
    Abstract: A liquid chemical supply system that performs accurate pressure feedback control and controls the discharge flow rate of liquid chemical with high precision, even when the pressure setting value of the operation pressure differs due to changes in the type of liquid chemical, includes a pump having a pump chamber and an operation chamber separated by a diaphragm comprised of a flexible membrane. The intake and discharge of liquid chemical is performed in accordance with the change in pressure inside the operation chamber. An electro-pneumatic regulator supplies operation gas pressure to the operation chamber. A plurality of pressure sensors having different pressure detection ranges is provided for detecting the operation gas pressure. A controller selectively employs any of the detection results of the plurality of sensors in accordance with the pressure setting value of the operation air that is set for each use, and performs pressure feedback control.
    Type: Grant
    Filed: October 17, 2006
    Date of Patent: March 30, 2010
    Assignees: OCTEC Inc., CKD Corporation
    Inventors: Katsuya Okumura, Tetsuya Toyoda, Tomohiro Ito, Akira Murakumo, Atsuyuki Sakai
  • Publication number: 20100032357
    Abstract: A high separation efficiency column 10 for chromatography and a manufacturing method thereof are provided. The column 10 for chromatography includes a first substrate 11 having a plurality of pillars 22 formed on one surface thereof and a second substrate 12 bonded to the one surface of the first substrate 11 and constituting a flow path 13 together with the plurality of pillars 22 formed on the first substrate. At least a surface of each pillar is formed in a porous shape.
    Type: Application
    Filed: August 14, 2007
    Publication date: February 11, 2010
    Applicants: TOKYO ELECTRON LIMITED, OCTEC INC.
    Inventors: Tomofumi Kiyomoto, Muneo Harada, Hiroyuki Moriyama, Katsuya Okumura
  • Patent number: 7649369
    Abstract: In accordance with an increase in speed, a wiring structure has rapidly become more microscopic and thinner and a wiring layer has become extremely thin, and therefore, giving a contact load to a probe for the inspection as has been conventionally done causes damage to a wiring layer and an insulation layer because the probe penetrates not only the oxide film but also the wiring layer or because of a concentration stress from the probe. On the other hand, decreasing the contact load causes unstable continuity between the probe and an electrode pad. It is an object of the present invention to surely and stably inspect an object to be inspected by breaking an oxide film with a low stylus pressure.
    Type: Grant
    Filed: March 3, 2005
    Date of Patent: January 19, 2010
    Assignees: Octec Inc., TOKYO Electron Limited
    Inventors: Katsuya Okumura, Toshihiro Yonezawa
  • Patent number: 7641806
    Abstract: By steps of forming first masks 13, 14 each having a first pattern on a first surface of a substrate 11 on which a membrane is to be formed, etching the first surface of the substrate 11 by using the first masks 13, 14 to forming first support beams 15, positioning a second surface of the substrate 11 on the basis of the first pattern on the first surface, forming a second mask 17 having a second pattern on the second surface of the substrate 11 based on the alignment and etching the second surface of the substrate 11 in dry by using the second mask 17 to form the second support beams 20, a membrane member 22a where the first and second support beams 15, 20 are formed on both surfaces of the membrane 12 is manufactured. Consequently, it is possible to provide the membrane member that is sufficient in strength and is hard to be deformed by heat.
    Type: Grant
    Filed: June 10, 2004
    Date of Patent: January 5, 2010
    Assignees: Tokyo Electron Limited, OCTEC Inc.
    Inventors: Katsuya Okumura, Kazuya Nagaseki, Naoyuki Satoh, Koji Maruyama